Searched refs:ExcCodeTr (Results 1 - 2 of 2) sorted by relevance

/gem5/src/arch/mips/
H A Dfaults.cc64 { "Trap", 0x180, ExcCodeTr };
H A Dfaults.hh67 ExcCodeTr = 13, enumerator in enum:MipsISA::ExcCode

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