Searched refs:Enable (Results 1 - 6 of 6) sorted by relevance
| /gem5/src/dev/ps2/ | ||
| H A D | types.hh | 59 Enable = 0xF4, enumerator in enum:Ps2::__anon23 |
| H A D | keyboard.cc | 85 case Ps2::Enable: |
| H A D | mouse.cc | 71 case Ps2::Enable: |
| H A D | touchkit.cc | 102 case Ps2::Enable: |
| /gem5/src/dev/arm/ | ||
| H A D | gic_v3_cpu_interface.hh | 106 Bitfield<0> Enable; member in class:Gicv3CPUInterface 111 Bitfield<0> Enable; member in class:Gicv3CPUInterface 129 Bitfield<3> Enable; member in class:Gicv3CPUInterface 137 Bitfield<3> Enable; member in class:Gicv3CPUInterface |
| H A D | gic_v3_cpu_interface.cc | 167 // Interrupt Group 0 Enable register EL1 184 // Interrupt Group 1 Enable register EL1 202 // Interrupt Group 1 Enable register EL3 207 MISCREG_ICC_IGRPEN1_EL1_S)).Enable; 210 MISCREG_ICC_IGRPEN1_EL1_NS)).Enable; 500 // System Register Enable Register EL1 516 // System Register Enable Register EL2 520 * Enable [3] == 1 530 icc_sre_el2.Enable = 1; 535 // System Register Enable Registe [all...] |
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