Searched refs:vector (Results 751 - 763 of 763) sorted by relevance

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/gem5/ext/pybind11/include/pybind11/
H A Dpybind11.h459 std::vector<function_call> second_pass;
477 5. Pack everything into a vector; if we have py::args or py::kwargs, they are an
605 // 5. Put everything in a vector. Not technically step 5, we've been building it
612 std::vector<bool> second_pass_convert;
1644 .emplace(type, std::vector<detail::type_info *>());
H A Dpytypes.h1332 static std::vector<Py_ssize_t> py_strides { };
1333 static std::vector<Py_ssize_t> py_shape { };
/gem5/src/arch/hsail/insts/
H A Dmem.hh529 std::vector<uint32_t> regVec;
1521 std::vector<uint32_t> regVec;
/gem5/ext/dsent/model/
H A DElectricalModel.cc165 const vector<String>& split_str = driving_strengths_.split("[,");
/gem5/src/cpu/o3/
H A Dinst_queue_impl.hh49 #include <vector>
103 // As the vector registers have two addressing modes, they are added twice
365 .desc("Number of vector instruction queue reads")
370 .desc("Number of vector instruction queue writes")
375 .desc("Number of vector instruction queue wakeup accesses")
390 .desc("Number of vector alu accesses")
H A Dcommit_impl.hh276 DefaultCommit<Impl>::setThreads(std::vector<Thread *> &threads)
/gem5/src/mem/cache/
H A Dbase.cc837 std::vector<CacheBlk*> evict_blks;
1458 std::vector<CacheBlk*> evict_blks;
/gem5/ext/systemc/src/sysc/communication/
H A Dsc_signal_ports.h67 typedef std::vector<sc_trace_params*> sc_trace_params_vec;
/gem5/src/gpu-compute/
H A Dcompute_unit.cc98 // calculate how many cycles a vector load or store will need to transfer
298 // so that the vector access is correct
331 // calculate the number of 32-bit vector registers required by wavefront
348 // reserve vector registers for the scheduled wavefront
382 // calculate the number of 32-bit vector registers required by each
392 std::vector<int> numWfsPerSimd;
1404 .desc("Number of vector ALU insts issued.")
1408 .desc("The avg. number of vector ALU insts issued per-wavefront.")
1428 .desc("Number of thread cycles used to execute vector ALU ops. "
1434 .desc("Percentage of active vector AL
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/gem5/src/arch/arm/
H A Dtlb.cc49 #include <vector>
H A Disa.cc119 std::vector<struct ISA::MiscRegLUTEntry> ISA::lookUpMiscReg(NUM_MISCREGS);
2129 "A ThreadContext is needed to determine the SVE vector length "
/gem5/src/sim/
H A Dsyscall_emul.hh879 std::vector<std::string> special_paths =
2146 auto read_in = [](std::vector<std::string> &vect,
/gem5/ext/googletest/googlemock/include/gmock/
H A Dgmock-generated-matchers.h44 #include <vector>

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