Searched refs:Port (Results 76 - 100 of 158) sorted by relevance

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/gem5/src/dev/x86/
H A Di8042.hh131 Port &
/gem5/src/gpu-compute/
H A Dtlb_coalescer.hh214 Port &getPort(const std::string &if_name,
/gem5/util/tlm/src/
H A Dsc_slave_port.cc368 ExternalSlave::Port(name_, owner_),
387 ExternalSlave::Port*
H A Dsc_master_port.cc88 : ExternalMaster::Port(name_, owner_),
415 ExternalMaster::Port*
/gem5/ext/sst/
H A Dgem5.cc251 ExternalMaster::Port*
261 ExternalSlave::Port*
H A DExtSlave.cc57 Port(name, port),
H A DExtMaster.cc61 Port(n, p), out(o), port(p), simPhase(CONSTRUCTION),
/gem5/src/systemc/tests/systemc/compliance_1666/test200/
H A Dtest200.cpp13 struct Port: sc_port<i_f> struct in inherits:sc_port
36 Port port;
/gem5/src/systemc/core/
H A Dprocess.cc429 Port *port = Port::fromPort(pb);
/gem5/src/dev/net/
H A DEthernet.py48 Port.compat(ETHERNET_ROLE, ETHERNET_ROLE)
50 class EtherInt(Port):
124 port = Param.UInt16(3500, "Port helper should send packets to")
H A Ddist_etherlink.cc111 Port &
/gem5/src/cpu/kvm/
H A Dbase.hh100 Port &getDataPort() override { return dataPort; }
101 Port &getInstPort() override { return instPort; }
612 /** Port for data requests */
/gem5/src/cpu/minor/
H A Dcpu.cc324 Port &
330 Port &
/gem5/src/cpu/simple/
H A Dtiming.hh267 Port &getDataPort() override { return dcachePort; }
270 Port &getInstPort() override { return icachePort; }
/gem5/src/mem/
H A Daddr_mapper.cc56 Port &
H A Dexternal_slave.cc196 Port &
H A Dmem_delay.cc63 Port &
H A Dsimple_mem.cc244 Port &
H A Dcomm_monitor.hh87 Port &getPort(const std::string &if_name,
/gem5/src/arch/x86/
H A Dpagetable_walker.hh61 // Port for accessing memory
166 Port &getPort(const std::string &if_name,
H A Dinterrupts.hh174 // Port for receiving interrupts
222 Port &getPort(const std::string &if_name,
/gem5/src/mem/ruby/slicc_interface/
H A DAbstractController.hh70 { return "Port rejected message based on type"; }
136 Port &getPort(const std::string &if_name,
230 * Port that forwards requests and receives responses from the
/gem5/src/cpu/testers/traffic_gen/
H A Dbase.hh248 Port &getPort(const std::string &if_name,
/gem5/src/mem/ruby/network/
H A DMessageBuffer.hh125 Port &
/gem5/src/systemc/ext/core/
H A Dsc_module.hh63 class Port;
103 virtual ::Port &gem5_getPort(const std::string &if_name, int idx=-1);

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