Searched refs:Addr (Results 151 - 175 of 767) sorted by relevance

1234567891011>>

/gem5/src/base/loader/
H A Ddtb_object.cc155 Addr
164 Addr rel_addr = 0;
175 DtbObject::loadAllSymbols(SymbolTable *symtab, Addr base, Addr offset,
176 Addr addr_mask)
182 DtbObject::loadGlobalSymbols(SymbolTable *symtab, Addr base, Addr offset,
183 Addr addr_mask)
190 DtbObject::loadLocalSymbols(SymbolTable *symtab, Addr base, Addr offse
[all...]
/gem5/src/cpu/
H A Dpc_event.hh49 Addr evpc;
52 PCEvent(PCEventQueue *q, const std::string &desc, Addr pc);
60 Addr pc() const { return evpc; }
75 bool operator()(const record_t &l, Addr pc) const {
78 bool operator()(Addr pc, const record_t &r) const {
111 range_t equal_range(Addr pc);
119 PCEvent::PCEvent(PCEventQueue *q, const std::string &desc, Addr pc)
140 BreakPCEvent(PCEventQueue *q, const std::string &desc, Addr addr,
145 void sched_break_pc_sys(System *sys, Addr addr);
147 void sched_break_pc(Addr add
[all...]
/gem5/src/mem/ruby/slicc_interface/
H A DRubySlicc_Util.hh64 addressToInt(Addr addr)
70 inline Addr
101 testAndRead(Addr addr, DataBlock& blk, Packet *pkt)
103 Addr pktLineAddr = makeLineAddress(pkt->getAddr());
104 Addr lineAddr = makeLineAddress(addr);
127 testAndReadMask(Addr addr, DataBlock& blk, WriteMask& mask, Packet *pkt)
129 Addr pktLineAddr = makeLineAddress(pkt->getAddr());
130 Addr lineAddr = makeLineAddress(addr);
156 testAndWrite(Addr addr, DataBlock& blk, Packet *pkt)
158 Addr pktLineAdd
[all...]
/gem5/src/arch/power/insts/
H A Dcondition.cc36 CondLogicOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
49 CondMoveOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
/gem5/src/arch/x86/bios/
H A Dsmbios.hh92 virtual uint16_t writeOut(PortProxy& proxy, Addr addr);
101 void writeOutStrings(PortProxy& proxy, Addr addr);
148 uint16_t writeOut(PortProxy& proxy, Addr addr);
216 Addr getTableAddr()
221 void setTableAddr(Addr addr)
226 void writeOut(PortProxy& proxy, Addr addr,
227 Addr &headerSize, Addr &structSize);
/gem5/src/cpu/pred/
H A Dbtb.cc75 DefaultBTB::getIndex(Addr instPC, ThreadID tid)
84 Addr
85 DefaultBTB::getTag(Addr instPC)
91 DefaultBTB::valid(Addr instPC, ThreadID tid)
95 Addr inst_tag = getTag(instPC);
112 DefaultBTB::lookup(Addr instPC, ThreadID tid)
116 Addr inst_tag = getTag(instPC);
130 DefaultBTB::update(Addr instPC, const TheISA::PCState &target, ThreadID tid)
H A D2bit_local.cc66 LocalBP::btbUpdate(ThreadID tid, Addr branch_addr, void * &bp_history)
74 LocalBP::lookup(ThreadID tid, Addr branch_addr, void * &bp_history)
93 LocalBP::update(ThreadID tid, Addr branch_addr, bool taken, void *bp_history,
94 bool squashed, const StaticInstPtr & inst, Addr corrTarget)
129 LocalBP::getLocalIndex(Addr &branch_addr)
135 LocalBP::uncondBranch(ThreadID tid, Addr pc, void *&bp_history)
H A Dtournament.hh79 bool lookup(ThreadID tid, Addr branch_addr, void * &bp_history);
87 void uncondBranch(ThreadID tid, Addr pc, void * &bp_history);
95 void btbUpdate(ThreadID tid, Addr branch_addr, void * &bp_history);
108 void update(ThreadID tid, Addr branch_addr, bool taken, void *bp_history,
109 bool squashed, const StaticInstPtr & inst, Addr corrTarget);
130 inline unsigned calcLocHistIdx(Addr &branch_addr);
H A Dtage_sc_l.hh95 ThreadID tid, Addr branch_pc, TAGEBase::BranchInfo* bi) override;
97 unsigned getUseAltIdx(TAGEBase::BranchInfo* bi, Addr branch_pc) override;
100 ThreadID tid, Addr branch_pc, bool taken, TAGEBase::BranchInfo* b,
102 Addr target) override;
104 int bindex(Addr pc_in) const override;
105 int gindex(ThreadID tid, Addr pc, int bank) const override;
109 virtual uint16_t gtag(ThreadID tid, Addr pc, int bank) const override = 0;
112 Addr target) override;
116 Addr branch_pc, Addr targe
[all...]
/gem5/src/arch/sparc/insts/
H A Dmem.hh55 Addr pc, const SymbolTable *symtab) const override;
71 Addr pc, const SymbolTable *symtab) const override;
H A Dtrap.hh60 Addr pc, const SymbolTable *symtab) const override;
71 generateDisassembly(Addr pc, const SymbolTable *symtab) const override
/gem5/src/arch/riscv/insts/
H A Dmem.cc48 Load::generateDisassembly(Addr pc, const SymbolTable *symtab) const
57 Store::generateDisassembly(Addr pc, const SymbolTable *symtab) const
/gem5/src/arch/generic/
H A Dlocked_mem.hh60 handleLockedSnoop(XC *xc, PacketPtr pkt, Addr cacheBlockMask)
79 handleLockedWrite(XC *xc, const RequestPtr &req, Addr cacheBlockMask)
H A Dtypes.hh57 Addr _pc;
58 Addr _npc;
61 PCStateBase(Addr val) : _pc(0), _npc(0) { set(val); }
69 Addr
80 Addr
103 void set(Addr val);
148 Addr pc() const { return _pc; }
149 void pc(Addr val) { _pc = val; }
151 Addr npc() const { return _npc; }
152 void npc(Addr va
[all...]
/gem5/src/mem/cache/prefetch/
H A Dtagged.cc50 Addr blkAddr = blockAddress(pfi.getAddr());
53 Addr newAddr = blkAddr + d*(blkSize);
H A Dstride.hh91 Addr instAddr;
92 Addr lastAddr;
124 StrideEntry* findEntry(Addr pc, bool is_secure);
132 StrideEntry* findVictim(Addr pc);
151 Addr pcHash(Addr pc) const;
/gem5/src/mem/ruby/system/
H A DVIPERCoalescer.hh62 void wbCallback(Addr address);
63 void invCallback(Addr address);
/gem5/src/base/filters/
H A Dbulk_bloom_filter.cc46 (std::numeric_limits<Addr>::digits - offsetBits),
55 Bulk::hash(Addr addr, int hash_number) const
71 Addr
72 Bulk::permute(Addr addr) const
75 Addr part1 = bits(addr, offsetBits + 6, offsetBits),
87 Addr result =
93 Addr remaining_bits = bits(addr, std::numeric_limits<Addr>::digits - 1,
H A Dblock_bloom_filter.cc53 std::numeric_limits<Addr>::digits,
64 Block::set(Addr addr)
70 Block::unset(Addr addr)
76 Block::getCount(Addr addr) const
82 Block::hash(Addr addr) const
84 Addr hashed_addr = 0;
/gem5/src/mem/ruby/structures/
H A DTimerTable.hh59 Addr nextAddress() const;
60 bool isSet(Addr address) const { return !!m_map.count(address); }
61 void set(Addr address, Tick ready_time);
62 void unset(Addr address);
76 typedef std::map<Addr, Tick> AddressMap;
80 mutable Addr m_next_address; // Only valid if m_next_valid is true
/gem5/src/arch/arm/
H A Dstage2_mmu.hh78 Addr oVAddr;
84 Addr _oVAddr);
93 void setVirt(Addr vaddr, int size, Request::Flags flags, int masterId)
115 Fault readDataUntimed(ThreadContext *tc, Addr oVAddr, Addr descAddr,
117 void readDataTimed(ThreadContext *tc, Addr descAddr,
/gem5/src/arch/alpha/
H A Dstacktrace.cc51 Addr addr = 0;
76 Addr
77 ProcessInfo::task(Addr ksp) const
79 Addr base = ksp & ~0x3fff;
83 Addr tsk;
86 tsk = vp.read<Addr>(base + task_off, GuestByteOrder);
92 ProcessInfo::pid(Addr ksp) const
94 Addr task = this->task(ksp);
107 ProcessInfo::name(Addr ksp) const
109 Addr tas
[all...]
/gem5/src/sim/
H A Dfaults.hh96 Addr vaddr;
99 GenericPageTableFault(Addr va) : vaddr(va) {}
102 Addr getFaultVAddr() const { return vaddr; }
108 Addr vaddr;
111 GenericAlignmentFault(Addr va) : vaddr(va) {}
114 Addr getFaultVAddr() const { return vaddr; }
/gem5/src/mem/
H A Dpage_table.cc49 EmulationPageTable::map(Addr vaddr, Addr paddr, int64_t size, uint64_t flags)
76 EmulationPageTable::remap(Addr vaddr, int64_t size, Addr new_vaddr)
98 EmulationPageTable::getMappings(std::vector<std::pair<Addr, Addr>> *addr_maps)
105 EmulationPageTable::unmap(Addr vaddr, int64_t size)
121 EmulationPageTable::isUnmapped(Addr vaddr, int64_t size)
134 EmulationPageTable::lookup(Addr vaddr)
136 Addr page_add
[all...]
/gem5/src/mem/cache/tags/
H A Dbase.hh79 const Addr blkMask;
202 virtual CacheBlk *findBlock(Addr addr, bool is_secure) const;
218 Addr blkAlign(Addr addr) const
228 int extractBlkOffset(Addr addr) const
284 virtual CacheBlk* findVictim(Addr addr, const bool is_secure,
299 virtual CacheBlk* accessBlock(Addr addr, bool is_secure, Cycles &lat) = 0;
307 virtual Addr extractTag(const Addr addr) const;
323 virtual Addr regenerateBlkAdd
[all...]

Completed in 25 milliseconds

1234567891011>>