Searched hist:9898 (Results 1 - 5 of 5) sorted by relevance
/gem5/util/m5/ | ||
H A D | Makefile.x86 | 9898:2935441b0870 Sun Sep 29 18:20:00 EDT 2013 Andreas Sandberg <andreas@sandberg.pp.se> x86: Add support for m5ops through a memory mapped interface In order to support m5ops in virtualized environments, we need to use a memory mapped interface. This changeset adds support for that by reserving 0xFFFF0000-0xFFFFFFFF and mapping those to the generic IPR interface for m5ops. The mapping is done in the X86ISA::TLB::finalizePhysical() which means that it just works for all of the CPU models, including virtualized ones. |
H A D | m5op_x86.S | 9898:2935441b0870 Sun Sep 29 18:20:00 EDT 2013 Andreas Sandberg <andreas@sandberg.pp.se> x86: Add support for m5ops through a memory mapped interface In order to support m5ops in virtualized environments, we need to use a memory mapped interface. This changeset adds support for that by reserving 0xFFFF0000-0xFFFFFFFF and mapping those to the generic IPR interface for m5ops. The mapping is done in the X86ISA::TLB::finalizePhysical() which means that it just works for all of the CPU models, including virtualized ones. |
H A D | m5.c | 9898:2935441b0870 Sun Sep 29 18:20:00 EDT 2013 Andreas Sandberg <andreas@sandberg.pp.se> x86: Add support for m5ops through a memory mapped interface In order to support m5ops in virtualized environments, we need to use a memory mapped interface. This changeset adds support for that by reserving 0xFFFF0000-0xFFFFFFFF and mapping those to the generic IPR interface for m5ops. The mapping is done in the X86ISA::TLB::finalizePhysical() which means that it just works for all of the CPU models, including virtualized ones. |
/gem5/src/arch/x86/ | ||
H A D | tlb.cc | 9898:2935441b0870 Sun Sep 29 18:20:00 EDT 2013 Andreas Sandberg <andreas@sandberg.pp.se> x86: Add support for m5ops through a memory mapped interface In order to support m5ops in virtualized environments, we need to use a memory mapped interface. This changeset adds support for that by reserving 0xFFFF0000-0xFFFFFFFF and mapping those to the generic IPR interface for m5ops. The mapping is done in the X86ISA::TLB::finalizePhysical() which means that it just works for all of the CPU models, including virtualized ones. |
/gem5/configs/common/ | ||
H A D | FSConfig.py | 9898:2935441b0870 Sun Sep 29 18:20:00 EDT 2013 Andreas Sandberg <andreas@sandberg.pp.se> x86: Add support for m5ops through a memory mapped interface In order to support m5ops in virtualized environments, we need to use a memory mapped interface. This changeset adds support for that by reserving 0xFFFF0000-0xFFFFFFFF and mapping those to the generic IPR interface for m5ops. The mapping is done in the X86ISA::TLB::finalizePhysical() which means that it just works for all of the CPU models, including virtualized ones. |
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