Searched hist:9518 (Results 1 - 5 of 5) sorted by relevance

/gem5/src/cpu/simple/
H A DTimingSimpleCPU.py9518:8faae62af8c3 Fri Feb 15 17:40:00 EST 2013 Andreas Sandberg <Andreas.Sandberg@ARM.com> cpu: Add CPU metadata om the Python classes

The configuration scripts currently hard-code the requirements of each
CPU. This is clearly not optimal as it makes writing new configuration
scripts painful and adding new CPU models requires existing scripts to
be updated. This patch adds the following class methods to the base
CPU and all relevant CPUs:

* memory_mode -- Return a string describing the current memory mode
(invalid/atomic/timing).

* require_caches -- Does the CPU model require caches?

* support_take_over -- Does the CPU support CPU handover?
H A DAtomicSimpleCPU.py9518:8faae62af8c3 Fri Feb 15 17:40:00 EST 2013 Andreas Sandberg <Andreas.Sandberg@ARM.com> cpu: Add CPU metadata om the Python classes

The configuration scripts currently hard-code the requirements of each
CPU. This is clearly not optimal as it makes writing new configuration
scripts painful and adding new CPU models requires existing scripts to
be updated. This patch adds the following class methods to the base
CPU and all relevant CPUs:

* memory_mode -- Return a string describing the current memory mode
(invalid/atomic/timing).

* require_caches -- Does the CPU model require caches?

* support_take_over -- Does the CPU support CPU handover?
/gem5/src/cpu/o3/
H A DO3CPU.py9518:8faae62af8c3 Fri Feb 15 17:40:00 EST 2013 Andreas Sandberg <Andreas.Sandberg@ARM.com> cpu: Add CPU metadata om the Python classes

The configuration scripts currently hard-code the requirements of each
CPU. This is clearly not optimal as it makes writing new configuration
scripts painful and adding new CPU models requires existing scripts to
be updated. This patch adds the following class methods to the base
CPU and all relevant CPUs:

* memory_mode -- Return a string describing the current memory mode
(invalid/atomic/timing).

* require_caches -- Does the CPU model require caches?

* support_take_over -- Does the CPU support CPU handover?
/gem5/configs/common/
H A DSimulation.py9518:8faae62af8c3 Fri Feb 15 17:40:00 EST 2013 Andreas Sandberg <Andreas.Sandberg@ARM.com> cpu: Add CPU metadata om the Python classes

The configuration scripts currently hard-code the requirements of each
CPU. This is clearly not optimal as it makes writing new configuration
scripts painful and adding new CPU models requires existing scripts to
be updated. This patch adds the following class methods to the base
CPU and all relevant CPUs:

* memory_mode -- Return a string describing the current memory mode
(invalid/atomic/timing).

* require_caches -- Does the CPU model require caches?

* support_take_over -- Does the CPU support CPU handover?
/gem5/src/cpu/
H A DBaseCPU.py9518:8faae62af8c3 Fri Feb 15 17:40:00 EST 2013 Andreas Sandberg <Andreas.Sandberg@ARM.com> cpu: Add CPU metadata om the Python classes

The configuration scripts currently hard-code the requirements of each
CPU. This is clearly not optimal as it makes writing new configuration
scripts painful and adding new CPU models requires existing scripts to
be updated. This patch adds the following class methods to the base
CPU and all relevant CPUs:

* memory_mode -- Return a string describing the current memory mode
(invalid/atomic/timing).

* require_caches -- Does the CPU model require caches?

* support_take_over -- Does the CPU support CPU handover?

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