Searched hist:9161 (Results 1 - 5 of 5) sorted by relevance
| /gem5/src/cpu/ | ||
| H A D | CheckerCPU.py | 9161:e353c178fb36 Tue Aug 21 05:49:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> CPU: Remove overloaded function_trace_start parameter This patch removes the overloading of the parameter, which seems both redundant, and possibly incorrect. The inorder CPU is particularly interesting as it uses a different name for the parameter, and never make any use of it internally. |
| H A D | BaseCPU.py | 9161:e353c178fb36 Tue Aug 21 05:49:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> CPU: Remove overloaded function_trace_start parameter This patch removes the overloading of the parameter, which seems both redundant, and possibly incorrect. The inorder CPU is particularly interesting as it uses a different name for the parameter, and never make any use of it internally. |
| /gem5/src/cpu/o3/ | ||
| H A D | O3Checker.py | 9161:e353c178fb36 Tue Aug 21 05:49:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> CPU: Remove overloaded function_trace_start parameter This patch removes the overloading of the parameter, which seems both redundant, and possibly incorrect. The inorder CPU is particularly interesting as it uses a different name for the parameter, and never make any use of it internally. |
| /gem5/src/arch/riscv/ | ||
| H A D | faults.hh | 12848:67652b15de3b Sun Feb 18 22:28:00 EST 2018 Alec Roelke <ar4jc@virginia.edu> arch-riscv: Add support for fault handling This patch adds support for handling RISC-V faults, including tracking current and previous execution privilege, correctly switching to the privilege mode specified by CSRs, and setting/storing the PC. It also includes changes introduced by patch #9821, which disables interrupts during handling of a fault. Change-Id: Ie9c0f29719620c20783540d3bdb2db44f6114fc9 Reviewed-on: https://gem5-review.googlesource.com/9161 Maintainer: Alec Roelke <ar4jc@virginia.edu> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> |
| H A D | faults.cc | 12848:67652b15de3b Sun Feb 18 22:28:00 EST 2018 Alec Roelke <ar4jc@virginia.edu> arch-riscv: Add support for fault handling This patch adds support for handling RISC-V faults, including tracking current and previous execution privilege, correctly switching to the privilege mode specified by CSRs, and setting/storing the PC. It also includes changes introduced by patch #9821, which disables interrupts during handling of a fault. Change-Id: Ie9c0f29719620c20783540d3bdb2db44f6114fc9 Reviewed-on: https://gem5-review.googlesource.com/9161 Maintainer: Alec Roelke <ar4jc@virginia.edu> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> |
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