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/gem5/src/arch/x86/
H A Dremote_gdb.hh4161:3147493a5c6b Mon Mar 05 12:58:00 EST 2007 Gabe Black <gblack@eecs.umich.edu> Add in NumGDBRegs so the constructor to the base class can get all it's arguments.
/gem5/configs/dram/
H A Dsweep.py10219:4161cfba9658 Fri May 09 18:58:00 EDT 2014 Andreas Hansson <andreas.hansson@arm.com> config: Bump DRAM sweep bus speed to match DDR4 config

This patch bumps the bus clock speed such that the interconnect does
not become a bottleneck with a DDR4-2400-x64 DRAM delivering 19.2
GByte/s theoretical max.

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