Searched hist:12248 (Results 1 - 3 of 3) sorted by relevance

/gem5/src/arch/arm/isa/formats/
H A Dbranch.isa12248:858685d552f6 Wed Nov 01 11:33:00 EDT 2017 Giacomo Travaglini <giacomo.travaglini@arm.com> arch-arm: Corrected encoding for T32 HVC instruction

This patch corrects the encoding of the HVC (Hypervisor Call) for the
T32 instruction set.

Change-Id: I6f77eaf5c586697e9ccd588419c61e6d90c6c7bf
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Chuan Zhu <chuan.zhu@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/5541
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
/gem5/src/systemc/core/
H A Dscheduler.hh13076:c9e2a8bfe907 Wed Aug 22 17:54:00 EDT 2018 Gabe Black <gabeblack@google.com> systemc: Clear out the scheduler more agressively and with common code.

It's be useful/necessary to flush pending activity even when not
tearing down the scheduler, specifically when stopping.

Change-Id: I6b3716a8ca1f8ca151222e08f30bd3c9a43364b9
Reviewed-on: https://gem5-review.googlesource.com/12248
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
H A Dscheduler.cc13076:c9e2a8bfe907 Wed Aug 22 17:54:00 EDT 2018 Gabe Black <gabeblack@google.com> systemc: Clear out the scheduler more agressively and with common code.

It's be useful/necessary to flush pending activity even when not
tearing down the scheduler, specifically when stopping.

Change-Id: I6b3716a8ca1f8ca151222e08f30bd3c9a43364b9
Reviewed-on: https://gem5-review.googlesource.com/12248
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

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