Searched hist:11970 (Results 1 - 15 of 15) sorted by relevance

/gem5/src/mem/qos/
H A Dmem_ctrl.hh12966:3b20a7f755d5 Wed Jan 10 08:38:00 EST 2018 Matteo Andreozzi <Matteo.Andreozzi@arm.com> mem: Add a QoS-aware Memory Controller type

This is the implementation of QoS algorithms support for gem5 memory
objects. This change-list provides a framework for specifying QoS
algorithm which can be used to prioritise service to specific masters in
the memory controller.
The QoS support implemented here is designed to be extendable so that
new QoS algorithms can be easily plugged into the memory controller as
"QoS Policies".

Change-Id: I0b611f13fce54dd1dd444eb806f8e98afd248bd5
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/11970
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
H A Dpolicy.cc12966:3b20a7f755d5 Wed Jan 10 08:38:00 EST 2018 Matteo Andreozzi <Matteo.Andreozzi@arm.com> mem: Add a QoS-aware Memory Controller type

This is the implementation of QoS algorithms support for gem5 memory
objects. This change-list provides a framework for specifying QoS
algorithm which can be used to prioritise service to specific masters in
the memory controller.
The QoS support implemented here is designed to be extendable so that
new QoS algorithms can be easily plugged into the memory controller as
"QoS Policies".

Change-Id: I0b611f13fce54dd1dd444eb806f8e98afd248bd5
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/11970
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
H A Dpolicy.hh12966:3b20a7f755d5 Wed Jan 10 08:38:00 EST 2018 Matteo Andreozzi <Matteo.Andreozzi@arm.com> mem: Add a QoS-aware Memory Controller type

This is the implementation of QoS algorithms support for gem5 memory
objects. This change-list provides a framework for specifying QoS
algorithm which can be used to prioritise service to specific masters in
the memory controller.
The QoS support implemented here is designed to be extendable so that
new QoS algorithms can be easily plugged into the memory controller as
"QoS Policies".

Change-Id: I0b611f13fce54dd1dd444eb806f8e98afd248bd5
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/11970
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
H A Dq_policy.cc12966:3b20a7f755d5 Wed Jan 10 08:38:00 EST 2018 Matteo Andreozzi <Matteo.Andreozzi@arm.com> mem: Add a QoS-aware Memory Controller type

This is the implementation of QoS algorithms support for gem5 memory
objects. This change-list provides a framework for specifying QoS
algorithm which can be used to prioritise service to specific masters in
the memory controller.
The QoS support implemented here is designed to be extendable so that
new QoS algorithms can be easily plugged into the memory controller as
"QoS Policies".

Change-Id: I0b611f13fce54dd1dd444eb806f8e98afd248bd5
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/11970
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
H A Dturnaround_policy.hh12966:3b20a7f755d5 Wed Jan 10 08:38:00 EST 2018 Matteo Andreozzi <Matteo.Andreozzi@arm.com> mem: Add a QoS-aware Memory Controller type

This is the implementation of QoS algorithms support for gem5 memory
objects. This change-list provides a framework for specifying QoS
algorithm which can be used to prioritise service to specific masters in
the memory controller.
The QoS support implemented here is designed to be extendable so that
new QoS algorithms can be easily plugged into the memory controller as
"QoS Policies".

Change-Id: I0b611f13fce54dd1dd444eb806f8e98afd248bd5
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/11970
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
H A DQoSTurnaround.py12966:3b20a7f755d5 Wed Jan 10 08:38:00 EST 2018 Matteo Andreozzi <Matteo.Andreozzi@arm.com> mem: Add a QoS-aware Memory Controller type

This is the implementation of QoS algorithms support for gem5 memory
objects. This change-list provides a framework for specifying QoS
algorithm which can be used to prioritise service to specific masters in
the memory controller.
The QoS support implemented here is designed to be extendable so that
new QoS algorithms can be easily plugged into the memory controller as
"QoS Policies".

Change-Id: I0b611f13fce54dd1dd444eb806f8e98afd248bd5
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/11970
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
H A Dmem_ctrl.cc12966:3b20a7f755d5 Wed Jan 10 08:38:00 EST 2018 Matteo Andreozzi <Matteo.Andreozzi@arm.com> mem: Add a QoS-aware Memory Controller type

This is the implementation of QoS algorithms support for gem5 memory
objects. This change-list provides a framework for specifying QoS
algorithm which can be used to prioritise service to specific masters in
the memory controller.
The QoS support implemented here is designed to be extendable so that
new QoS algorithms can be easily plugged into the memory controller as
"QoS Policies".

Change-Id: I0b611f13fce54dd1dd444eb806f8e98afd248bd5
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/11970
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
H A Dq_policy.hh12966:3b20a7f755d5 Wed Jan 10 08:38:00 EST 2018 Matteo Andreozzi <Matteo.Andreozzi@arm.com> mem: Add a QoS-aware Memory Controller type

This is the implementation of QoS algorithms support for gem5 memory
objects. This change-list provides a framework for specifying QoS
algorithm which can be used to prioritise service to specific masters in
the memory controller.
The QoS support implemented here is designed to be extendable so that
new QoS algorithms can be easily plugged into the memory controller as
"QoS Policies".

Change-Id: I0b611f13fce54dd1dd444eb806f8e98afd248bd5
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/11970
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
H A DQoSMemCtrl.py12966:3b20a7f755d5 Wed Jan 10 08:38:00 EST 2018 Matteo Andreozzi <Matteo.Andreozzi@arm.com> mem: Add a QoS-aware Memory Controller type

This is the implementation of QoS algorithms support for gem5 memory
objects. This change-list provides a framework for specifying QoS
algorithm which can be used to prioritise service to specific masters in
the memory controller.
The QoS support implemented here is designed to be extendable so that
new QoS algorithms can be easily plugged into the memory controller as
"QoS Policies".

Change-Id: I0b611f13fce54dd1dd444eb806f8e98afd248bd5
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/11970
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
H A DSConscript12966:3b20a7f755d5 Wed Jan 10 08:38:00 EST 2018 Matteo Andreozzi <Matteo.Andreozzi@arm.com> mem: Add a QoS-aware Memory Controller type

This is the implementation of QoS algorithms support for gem5 memory
objects. This change-list provides a framework for specifying QoS
algorithm which can be used to prioritise service to specific masters in
the memory controller.
The QoS support implemented here is designed to be extendable so that
new QoS algorithms can be easily plugged into the memory controller as
"QoS Policies".

Change-Id: I0b611f13fce54dd1dd444eb806f8e98afd248bd5
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/11970
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
H A DQoSPolicy.py12966:3b20a7f755d5 Wed Jan 10 08:38:00 EST 2018 Matteo Andreozzi <Matteo.Andreozzi@arm.com> mem: Add a QoS-aware Memory Controller type

This is the implementation of QoS algorithms support for gem5 memory
objects. This change-list provides a framework for specifying QoS
algorithm which can be used to prioritise service to specific masters in
the memory controller.
The QoS support implemented here is designed to be extendable so that
new QoS algorithms can be easily plugged into the memory controller as
"QoS Policies".

Change-Id: I0b611f13fce54dd1dd444eb806f8e98afd248bd5
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/11970
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
/gem5/src/arch/riscv/
H A Dprocess.hh11970:98a9b0f154f6 Thu Mar 30 16:35:00 EDT 2017 Alec Roelke <ar4jc@virginia.edu> riscv: Fix crashes with large or frequent mmaps

This patch fixes a bug where increasing the mmap region too much causes
it to run into already-allocated memory, which causes gem5 to fail an
assertion. Previously, the stack was incorrectly set up such that the
end of the mmap region and the top of the stack were the same address
and both would grow downward. With this patch, the top of the stack has
been separated from the end of mmap and moved up, and the mmap region
now grows upward instead of downward.

[Rebase to master branch and remove dependencies.]

Change-Id: I7271ff478fff2994f918bc5003a6139b9ba6a520
Reviewed-on: https://gem5-review.googlesource.com/2680
Maintainer: Alec Roelke <ar4jc@virginia.edu>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
H A Dprocess.cc11970:98a9b0f154f6 Thu Mar 30 16:35:00 EDT 2017 Alec Roelke <ar4jc@virginia.edu> riscv: Fix crashes with large or frequent mmaps

This patch fixes a bug where increasing the mmap region too much causes
it to run into already-allocated memory, which causes gem5 to fail an
assertion. Previously, the stack was incorrectly set up such that the
end of the mmap region and the top of the stack were the same address
and both would grow downward. With this patch, the top of the stack has
been separated from the end of mmap and moved up, and the mmap region
now grows upward instead of downward.

[Rebase to master branch and remove dependencies.]

Change-Id: I7271ff478fff2994f918bc5003a6139b9ba6a520
Reviewed-on: https://gem5-review.googlesource.com/2680
Maintainer: Alec Roelke <ar4jc@virginia.edu>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
/gem5/src/mem/
H A DSConscript12966:3b20a7f755d5 Wed Jan 10 08:38:00 EST 2018 Matteo Andreozzi <Matteo.Andreozzi@arm.com> mem: Add a QoS-aware Memory Controller type

This is the implementation of QoS algorithms support for gem5 memory
objects. This change-list provides a framework for specifying QoS
algorithm which can be used to prioritise service to specific masters in
the memory controller.
The QoS support implemented here is designed to be extendable so that
new QoS algorithms can be easily plugged into the memory controller as
"QoS Policies".

Change-Id: I0b611f13fce54dd1dd444eb806f8e98afd248bd5
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/11970
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
H A Dpacket.hh12966:3b20a7f755d5 Wed Jan 10 08:38:00 EST 2018 Matteo Andreozzi <Matteo.Andreozzi@arm.com> mem: Add a QoS-aware Memory Controller type

This is the implementation of QoS algorithms support for gem5 memory
objects. This change-list provides a framework for specifying QoS
algorithm which can be used to prioritise service to specific masters in
the memory controller.
The QoS support implemented here is designed to be extendable so that
new QoS algorithms can be easily plugged into the memory controller as
"QoS Policies".

Change-Id: I0b611f13fce54dd1dd444eb806f8e98afd248bd5
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/11970
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>

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