Searched hist:10561 (Results 1 - 4 of 4) sorted by relevance

/gem5/src/mem/
H A Ddrampower.cc10561:e1a853349529 Tue Dec 02 06:07:00 EST 2014 Omar Naji <Omar.Naji@arm.com> mem: Add a GDDR5 DRAM config

This patch adds a first cut GDDR5 config to accommodate the users
combining gem5 and GPUSim. The config is based on a SK Hynix
datasheet, and the Nvidia GTX580 specification. Someone from the
GPUSim user-camp should tweak the default page-policy and static
frontend and backend latencies.
H A DDRAMCtrl.py10561:e1a853349529 Tue Dec 02 06:07:00 EST 2014 Omar Naji <Omar.Naji@arm.com> mem: Add a GDDR5 DRAM config

This patch adds a first cut GDDR5 config to accommodate the users
combining gem5 and GPUSim. The config is based on a SK Hynix
datasheet, and the Nvidia GTX580 specification. Someone from the
GPUSim user-camp should tweak the default page-policy and static
frontend and backend latencies.
H A Ddram_ctrl.cc10561:e1a853349529 Tue Dec 02 06:07:00 EST 2014 Omar Naji <Omar.Naji@arm.com> mem: Add a GDDR5 DRAM config

This patch adds a first cut GDDR5 config to accommodate the users
combining gem5 and GPUSim. The config is based on a SK Hynix
datasheet, and the Nvidia GTX580 specification. Someone from the
GPUSim user-camp should tweak the default page-policy and static
frontend and backend latencies.
/gem5/src/mem/slicc/
H A Dmain.py12765:8c15915ba978 Mon May 28 16:52:00 EDT 2018 Jason Lowe-Power <jason@lowepower.com> ruby: Revamp standalone SLICC script

There was some bitrot in the standalone SLICC script (util/slicc and
src/mem/slicc/main.py). Fix the changes to the SLICC interface and also
add some better documentation.

Change-Id: I91c0ec78d5072fba83edf32b661ae67967af7822
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/10561
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>

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