Searched defs:time (Results 26 - 48 of 48) sorted by relevance

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/gem5/src/dev/arm/
H A Dflash_device.cc365 Tick time = accessTimes(locationTable[logic_page_addr].block, local
374 Tick time = ((GCActivePercentage * local
408 Tick time = 0; local
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H A Dflash_device.hh91 Tick time; member in struct:FlashDevice::CallBackEntry
H A Dtimer_cpulocal.cc115 Tick time; local
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H A DRealView.py435 time = Param.Time('01/01/2009', "System time to use ('Now' for actual time)") variable in class:PL031
/gem5/src/sim/
H A Deventq.cc323 Tick time = 0; local
/gem5/src/mem/ruby/system/
H A DCacheRecorder.cc152 addRecord(int cntrl, Addr data_addr, Addr pc_addr, RubyRequestType type, Tick time, DataBlock& data) argument
/gem5/src/dev/sparc/
H A DT1000.py47 time = Param.Time('01/01/2009', "System time to use ('Now' for real time)") variable in class:DumbTOD
/gem5/src/mem/ruby/slicc_interface/
H A DMessage.hh88 void setLastEnqueueTime(const Tick& time) { m_LastEnqueueTime = time; } argument
/gem5/src/base/
H A Dtime.hh263 operator <<(std::ostream &out, const Time &time) argument
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H A Dcp_annotate.hh195 Tick time; member in struct:CPA::AnnotateData
/gem5/ext/drampower/src/
H A DCmdScheduler.h83 int64_t time; member in class:Data::cmdScheduler::commandItem
/gem5/src/mem/ruby/network/garnet2.0/
H A DRouter.cc174 Router::schedule_wakeup(Cycles time) argument
H A DInputUnit.hh116 need_stage(int vc, flit_stage stage, Cycles time) argument
H A Dflit.hh66 void set_time(Cycles time) { m_time = time; } argument
70 void set_dequeue_time(Cycles time) { m_dequeue_time = time; } argument
76 is_stage(flit_stage stage, Cycles time) argument
/gem5/src/systemc/core/
H A Dsc_time.cc50 set(::sc_core::sc_time *time, double d, ::sc_core::sc_time_unit tu) argument
/gem5/src/systemc/tests/systemc/misc/stars/star110089/
H A Dstar110089.cpp260 unsigned int time; member in struct:lp_struct
/gem5/src/dev/alpha/
H A DTsunami.py46 time = Param.Time('01/01/2009', variable in class:TsunamiIO
/gem5/src/gpu-compute/
H A Dgpu_dyn_inst.hh260 Tick time; member in class:GPUDynInst
/gem5/src/mem/ruby/network/
H A DMessageBuffer.cc141 Tick time = 1; local
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/gem5/ext/systemc/src/tlm_utils/
H A Dtlm2_base_protocol_checker.h317 sc_core::sc_time time; // Current time + annotated delay member in struct:tlm_utils::tlm2_base_protocol_checker::state_t
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/gem5/src/mem/cache/
H A Dbase.hh135 void schedSendEvent(Tick time) argument
1071 MSHR *allocateMissBuffer(PacketPtr pkt, Tick time, bool sched_send = true) argument
1089 allocateWriteBuffer(PacketPtr pkt, Tick time) argument
1172 schedMemSideSendEvent(Tick time) argument
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/gem5/src/mem/
H A Drequest.hh295 setPhys(Addr paddr, unsigned size, Flags flags, MasterID mid, Tick time) argument
437 Request(Addr paddr, unsigned size, Flags flags, MasterID mid, Tick time) argument
447 Request(Addr paddr, unsigned size, Flags flags, MasterID mid, Tick time, argument
654 time() const function
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/gem5/ext/googletest/googletest/include/gtest/internal/
H A Dgtest-port.h1449 const timespec time = { local
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