| /gem5/src/cpu/ |
| H A D | base.cc | 281 BaseCPU::armMonitor(ThreadID tid, Addr address) argument
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| /gem5/src/dev/x86/ |
| H A D | cmos.hh | 47 uint8_t address; member in class:X86ISA::Cmos
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| /gem5/src/mem/cache/prefetch/ |
| H A D | delta_correlating_prediction_tables.cc | 57 DeltaCorrelatingPredictionTables::DCPTEntry::addAddress(Addr address, argument
134 Addr address = pfi.getAddr(); local
[all...] |
| H A D | irregular_stream_buffer.hh | 72 Addr address; member in struct:IrregularStreamBufferPrefetcher::AddressMapping
[all...] |
| H A D | indirect_memory.hh | 71 Addr address; member in struct:IndirectMemoryPrefetcher::PrefetchTableEntry
[all...] |
| /gem5/src/mem/ |
| H A D | port_proxy.hh | 293 write(Addr address, const T &data) const argument
300 read(Addr address, ByteOrder byte_order) const argument
309 write(Addr address, T data, ByteOrder byte_order) const argument
[all...] |
| /gem5/src/mem/ruby/structures/ |
| H A D | PerfectCacheMemory.hh | 128 allocate(Addr address) argument
139 deallocate(Addr address) argument
156 lookup(Addr address) argument
178 changePermission(Addr address, AccessPermission new_perm) argument
[all...] |
| H A D | Prefetcher.cc | 139 Prefetcher::observeMiss(Addr address, const RubyRequestType& type) argument
207 Prefetcher::observePfMiss(Addr address) argument
215 Prefetcher::observePfHit(Addr address) argument
223 issueNextPrefetch(Addr address, PrefetchEntry *stream) argument
288 initializeStream(Addr address, int stride, uint32_t index, const RubyRequestType& type) argument
329 getPrefetchEntry(Addr address, uint32_t &index) argument
347 accessUnitFilter(std::vector<Addr>& filter_table, uint32_t *filter_hit, uint32_t &index, Addr address, int stride, bool &alloc) argument
380 accessNonunitFilter(Addr address, int *stride, bool &alloc) argument
[all...] |
| H A D | CacheMemory.cc | 163 CacheMemory::tryCacheAccess(Addr address, RubyRequestType type, argument
190 testCacheAccess(Addr address, RubyRequestType type, DataBlock*& data_ptr) argument
255 allocate(Addr address, AbstractCacheEntry *entry, bool touch) argument
295 deallocate(Addr address) argument
323 lookup(Addr address) argument
345 setMRU(Addr address) argument
363 setMRU(Addr address, int occupancy) argument
[all...] |
| H A D | CacheMemory.hh | 79 AbstractCacheEntry* allocate(Addr address, AbstractCacheEntry* new_entry) argument
83 allocateVoid(Addr address, AbstractCacheEntry* new_entry) argument
[all...] |
| /gem5/ext/libfdt/ |
| H A D | fdt.h | 62 fdt64_t address; member in struct:fdt_reserve_entry
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| /gem5/util/m5/jni/ |
| H A D | gem5Op.java | 47 public native void arm(long address); argument
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| /gem5/src/arch/hsail/ |
| H A D | operand.cc | 383 uint64_t address = offset; local
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| /gem5/src/dev/arm/ |
| H A D | flash_device.cc | 165 FlashDevice::accessDevice(uint64_t address, uint32_t amount, Callback *event, argument
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| /gem5/src/systemc/tests/include/ |
| H A D | SimpleBusLT.h | 64 unsigned int getPortId(const sc_dt::uint64& address) argument
79 unsigned int decode(const sc_dt::uint64& address) argument
143 sc_dt::uint64 address = trans.get_address(); local
[all...] |
| H A D | SimpleLTInitiator2_DMI.h | 171 sc_dt::uint64 address = trans.get_address(); //save original address local
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| H A D | SimpleLTInitiator3_DMI.h | 169 sc_dt::uint64 address = trans.get_address(); //save original address local
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| H A D | SimpleBusAT.h | 72 unsigned int getPortId(const sc_dt::uint64& address) argument
87 unsigned int decode(const sc_dt::uint64& address) argument
299 sc_dt::uint64 address = trans.get_address(); local
[all...] |
| /gem5/src/cpu/testers/rubytest/ |
| H A D | Check.cc | 39 Check::Check(Addr address, Addr pc, int _num_writers, int _num_readers, argument
282 Addr address = data->getAddress(); local
344 Check::changeAddress(Addr address) argument
[all...] |
| /gem5/src/arch/x86/bios/ |
| H A D | intelmp.hh | 208 uint32_t address; member in class:X86ISA::IntelMP::IOAPIC
|
| H A D | IntelMP.py | 134 address = Param.UInt32(0xfec00000, 'address of this APIC') variable in class:X86IntelMPIOAPIC
209 address = Param.Addr(0, 'starting address of the mapping') variable in class:X86IntelMPAddrSpaceMapping
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| /gem5/util/m5/ |
| H A D | lua_gem5Op.c | 44 uint64_t address = lua_tointeger(L, 1); local
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| /gem5/src/systemc/tests/systemc/misc/sim_tests/cycle_dw8051_demo/ |
| H A D | cycle_model.cpp | 147 int address; local
[all...] |
| /gem5/src/systemc/tests/tlm/multi_sockets/ |
| H A D | MultiSocketSimpleSwitchAT.h | 122 unsigned int decode(const sc_dt::uint64& address) argument
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| /gem5/src/gpu-compute/ |
| H A D | shader.cc | 334 Shader::AccessMem(uint64_t address, void *ptr, uint32_t size, int cu_id, argument
352 Shader::ReadMem(uint64_t address, void *ptr, uint32_t size, int cu_id) argument
358 Shader::ReadMem(uint64_t address, void *ptr, uint32_t size, int cu_id, argument
365 Shader::WriteMem(uint64_t address, void *ptr,uint32_t size, int cu_id) argument
371 Shader::WriteMem(uint64_t address, void *ptr, uint32_t size, int cu_id, argument
[all...] |