python: Don't assume SimObjects live in the global namespace

The importer in Python 3 doesn't like the way we import SimObjects
from the global namespace. Convert the existing SimObject declarations
to import from m5.objects. As a side-effect, this makes these files
consistent with configuration files.

Change-Id: I11153502b430822130722839e1fa767b82a027aa
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/15981
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>

mem-ruby: Fix a bug in MessageBuffer randomization

In the previous implementation, messages are randomly inserted with
delays only if both RubySystem and MessageBuffer randomization flags
are set true. However, to find race conditions and cover more slicc
transitions, ruby random testers rely on setting RubySystem flag to
turn on randomization on all message buffers.
As a fix, this patch enables a message buffer to have randomization
when either RubySystem or its own flag is set.

Change-Id: I1e076908ff07e5846ebad4f4fc1c8f28d40bbfd4
Reviewed-on: https://gem5-review.googlesource.com/12784
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>

ruby: profiler: provide the number of vnets through ruby system

The aim is to ultimately do away with the static function
Network::getNumberOfVirtualNetworks().

ruby: rename System.{hh,cc} to RubySystem.{hh,cc}

The eventual aim of this change is to pass RubySystem pointers through to
objects generated from the SLICC protocol code.

Because some of these objects need to dereference their RubySystem pointers,
they need access to the System.hh header file.

In src/mem/ruby/SConscript, the MakeInclude function creates single-line header
files in the build directory that do nothing except include the corresponding
header file from the source tree.

However, SLICC also generates a list of header files from its symbol table, and
writes it to mem/protocol/Types.hh in the build directory. This code assumes
that the header file name is the same as the class name.

The end result of this is the many of the generated slicc files try to include
RubySystem.hh, when the file they really need is System.hh. The path of least
resistence is just to rename System.hh to RubySystem.hh.

ruby: remove random seed
We no longer use the C library based random number generator: random().
Instead we use the C++ library provided rng. So setting the random seed for
the RubySystem class has no effect. Hence the variable and the corresponding
option are being dropped.

ruby: reverts to changeset: bf82f1f7b040

ruby: profiler: provide the number of vnets through ruby system

The aim is to ultimately do away with the static function
Network::getNumberOfVirtualNetworks().

ruby: remove random seed

We no longer use the C library based random number generator: random().
Instead we use the C++ library provided rng. So setting the random seed for
the RubySystem class has no effect. Hence the variable and the corresponding
option are being dropped.

Ruby: Update backing store option to propagate through to all RubyPorts

Previously, the user would have to manually set access_backing_store=True
on all RubyPorts (Sequencers) in the config files.
Now, instead there is one global option that each RubyPort checks on
initialization.

Committed by: Nilay Vaish <nilay@cs.wisc.edu>

ruby: provide a backing store
Ruby's functional accesses are not guaranteed to succeed as of now. While
this is not a problem for the protocols that are currently in the mainline
repo, it seems that coherence protocols for gpus rely on a backing store to
supply the correct data. The aim of this patch is to make this backing store
configurable i.e. it comes into play only when a particular option:
--access-backing-store is invoked.

The backing store has been there since M5 and GEMS were integrated. The only
difference is that earlier the system used to maintain the backing store and
ruby's copy was write-only. Sometime last year, we moved to data being
supplied supplied by ruby in SE mode simulations. And now we have patches on
the reviewboard, which remove ruby's copy of memory altogether and rely
completely on the system's memory to supply data. This patch adds back a
SimpleMemory member to RubySystem. This member is used only if the option:
access-backing-store is set to true. By default, the memory would not be
accessed.

ruby: interface with classic memory controller
This patch is the final in the series. The whole series and this patch in
particular were written with the aim of interfacing ruby's directory controller
with the memory controller in the classic memory system. This is being done
since ruby's memory controller has not being kept up to date with the changes
going on in DRAMs. Classic's memory controller is more up to date and
supports multiple different types of DRAM. This also brings classic and
ruby ever more close. The patch also changes ruby's memory controller to
expose the same interface.

ruby: move all statistics to stats.txt, eliminate ruby.stats

config: Remove redundant explicit setting of default clocks

This patch removes the explicit setting of the clock period for
certain instances of CoherentBus, NonCoherentBus and IOCache where the
specified clock is same as the default value of the system clock. As
all the values used are the defaults, there are no performance
changes. There are similar cases where the toL2Bus is set to use the
parent CPU clock which is already the default behaviour.

The main motivation for these simplifications is to ease the
introduction of clock domains.

ruby: convert block size, memory size to unsigned

sim: Include object header files in SWIG interfaces

When casting objects in the generated SWIG interfaces, SWIG uses
classical C-style casts ( (Foo *)bar; ). In some cases, this can
degenerate into the equivalent of a reinterpret_cast (mainly if only a
forward declaration of the type is available). This usually works for
most compilers, but it is known to break if multiple inheritance is
used anywhere in the object hierarchy.

This patch introduces the cxx_header attribute to Python SimObject
definitions, which should be used to specify a header to include in
the SWIG interface. The header should include the declaration of the
wrapped object. We currently don't enforce header the use of the
header attribute, but a warning will be generated for objects that do
not use it.

Ruby System: Convert to Clocked Object
This patch moves Ruby System from being a SimObject to recently introduced
ClockedObject.

Ruby: Add support for functional accesses
This patch rpovides functional access support in Ruby. Currently only
the M5Port of RubyPort supports functional accesses. The support for
functional through the PioPort will be added as a separate patch.

ruby: get rid of ruby's Debug.hh

Get rid of the Debug class
Get rid of ASSERT and use assert
Use DPRINTFR for ProtocolTrace

ruby: Added flag to disable mem_vec allocation

The RubySystem flag no_mem_vec will disable Ruby from allocating it's memory
data array.

ruby: Added copyright to many Ruby *.py files

ruby: convert to M5 MemorySize
Converted both ruby caches and directory memory to use the M5 MemorySize python
type.

ruby: added ruby stats print
Moved the previous rubymem stats print feature to ruby System so that ruby
stats are printed on simulation exit.

ruby: Removed the tech_nm variable from RubySystem

ruby: Added clock to ruby system
As a first step to migrate ruby to the M5 eventqueue, added a clock
variable to the ruby system.

ruby: Calculate system total memory capacity in Python
rather than in RubySystem object.

ruby: Convert most Ruby objects to M5 SimObjects.
The necessary companion conversion of Ruby objects generated by SLICC
are converted to M5 SimObjects in the following patch, so this patch
alone does not compile.
Conversion of Garnet network models is also handled in a separate
patch; that code is temporarily disabled from compiling to allow
testing of interim code.