RubySystem.py revision 13062:6f9defe1c11e
17008Snate@binkert.org# Copyright (c) 2009 Advanced Micro Devices, Inc.
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267008Snate@binkert.org#
277008Snate@binkert.org# Authors: Steve Reinhardt
286285Snate@binkert.org#          Brad Beckmann
2910472Sandreas.hansson@arm.com
3010472Sandreas.hansson@arm.comfrom m5.params import *
318232Snate@binkert.orgfrom ClockedObject import ClockedObject
329104Shestness@cs.utexas.edufrom SimpleMemory import *
337039Snate@binkert.org
3411339SMichael.Lebeane@amd.comclass RubySystem(ClockedObject):
357039Snate@binkert.org    type = 'RubySystem'
3611108Sdavid.hashe@amd.com    cxx_header = "mem/ruby/system/RubySystem.hh"
376285Snate@binkert.org    randomization = Param.Bool(False,
3811702Smichael.lebeane@amd.com        "insert random delays on message enqueue times (if True, all message \
3911702Smichael.lebeane@amd.com         buffers are enforced to have randomization; otherwise, a message \
4011702Smichael.lebeane@amd.com         buffer set its own flag to enable/disable randomization)");
4111702Smichael.lebeane@amd.com    block_size_bytes = Param.UInt32(64,
4211702Smichael.lebeane@amd.com        "default cache block size; must be a power of two");
4311702Smichael.lebeane@amd.com    memory_size_bits = Param.UInt32(64,
4411702Smichael.lebeane@amd.com        "number of bits that a memory address requires");
4511702Smichael.lebeane@amd.com
4611702Smichael.lebeane@amd.com    phys_mem = Param.SimpleMemory(NULL, "")
476876Ssteve.reinhardt@amd.com
4811702Smichael.lebeane@amd.com    access_backing_store = Param.Bool(False, "Use phys_mem as the functional \
4911702Smichael.lebeane@amd.com        store and only use ruby for timing.")
506285Snate@binkert.org
516285Snate@binkert.org    # Profiler related configuration variables
526285Snate@binkert.org    hot_lines = Param.Bool(False, "")
537039Snate@binkert.org    all_instructions = Param.Bool(False, "")
547039Snate@binkert.org    num_of_sequencers = Param.Int("")
556285Snate@binkert.org    number_of_virtual_networks = Param.Unsigned("")
5611339SMichael.Lebeane@amd.com