History log of /gem5/src/gpu-compute/gpu_dyn_inst.cc
Revision Date Author Comments
# 12697:cd71b966be1e 27-Apr-2018 Tony Gutierrez <anthony.gutierrez@amd.com>

style: fix amd license and style issues

Change-Id: I26136fb49f743c4a597f8021cfd27f78897267b5
Reviewed-on: https://gem5-review.googlesource.com/10463
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>


# 11699:c7453f485a5f 26-Oct-2016 Tony Gutierrez <anthony.gutierrez@amd.com>

gpu-compute, hsail: pass GPUDynInstPtr to getRegisterIndex()

for HSAIL an operand's indices into the register files may be calculated
trivially, because the operands are always read from a register file, or are
an immediate.

for machine ISA, however, an op selector may specify special registers, or
may specify special SGPRs with an alias op selector value. the location of
some of the special registers values are dependent on the size of the RF
in some cases. here we add a way for the underlying getRegisterIndex()
method to know about the size of the RFs, so that it may find the relative
positions of the special register values.


# 11693:bc1f702c25b9 26-Oct-2016 Tony Gutierrez <anthony.gutierrez@amd.com>

hsail, gpu-compute: remove doGm/SmReturn add completeAcc

we are removing doGmReturn from the GM pipe, and adding completeAcc()
implementations for the HSAIL mem ops. the behavior in doGmReturn is
dependent on HSAIL and HSAIL mem ops, however the completion phase
of memory ops in machine ISA can be very different, even amongst individual
machine ISA mem ops. so we remove this functionality from the pipeline and
allow it to be implemented by the individual instructions.


# 11692:e772fdcd3809 26-Oct-2016 Tony Gutierrez <anthony.gutierrez@amd.com>

gpu-compute: remove inst enums and use bit flag for attributes

this patch removes the GPUStaticInst enums that were defined in GPU.py.
instead, a simple set of attribute flags that can be set in the base
instruction class are used. this will help unify the attributes of HSAIL
and machine ISA instructions within the model itself.

because the static instrution now carries the attributes, a GPUDynInst
must carry a pointer to a valid GPUStaticInst so a new static kernel launch
instruction is added, which carries the attributes needed to perform a
the kernel launch.


# 11534:7106f550afad 09-Jun-2016 jkalamat <john.kalamatianos@amd.com>

gpu-compute: parametrize Wavefront size

Eliminate the VSZ constant that defined the Wavefront size (in numbers of work
items); replaced it with a parameter in the GPU.py configuration script.
Changed all data structures dependent on the Wavefront size to be dynamically
sized. Legal values of Wavefront size are 16, 32, 64 for now and checked at
initialization time.


# 11477:54cf9a388a9d 16-May-2016 Tony Gutierrez <anthony.gutierrez@amd.com>

gpu-compute: fix bug in GPUDynInst::isScalarRegister()


# 11473:517ba946a860 06-May-2016 Tony Gutierrez <anthony.gutierrez@amd.com>

gpu-compute: fix spacing in GPUDynInst ctor


# 11472:8263ac8f99d9 06-May-2016 Tony Gutierrez <anthony.gutierrez@amd.com>

gpu-compute: fix uninitialized member bug in GPUDynInst

the n_reg field in the GPUDynInst is not currently set in the constructor.
if it is not set externally, there are assertion failures that may occur
if the random value it gets is just right. here we set it to 0 by default.


# 11308:7d8836fd043d 19-Jan-2016 Tony Gutierrez <anthony.gutierrez@amd.com>

gpu-compute: AMD's baseline GPU model