gpu_dyn_inst.cc revision 11473:517ba946a860
1/* 2 * Copyright (c) 2015 Advanced Micro Devices, Inc. 3 * All rights reserved. 4 * 5 * For use for simulation and test purposes only 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are met: 9 * 10 * 1. Redistributions of source code must retain the above copyright notice, 11 * this list of conditions and the following disclaimer. 12 * 13 * 2. Redistributions in binary form must reproduce the above copyright notice, 14 * this list of conditions and the following disclaimer in the documentation 15 * and/or other materials provided with the distribution. 16 * 17 * 3. Neither the name of the copyright holder nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 * 33 * Author: Anthony Gutierrez 34 */ 35 36#include "gpu-compute/gpu_dyn_inst.hh" 37 38#include "debug/GPUMem.hh" 39#include "gpu-compute/gpu_static_inst.hh" 40#include "gpu-compute/shader.hh" 41#include "gpu-compute/wavefront.hh" 42 43GPUDynInst::GPUDynInst(ComputeUnit *_cu, Wavefront *_wf, 44 GPUStaticInst *_staticInst, uint64_t instSeqNum) 45 : GPUExecContext(_cu, _wf), m_op(Enums::MO_UNDEF), 46 memoryOrder(Enums::MEMORY_ORDER_NONE), n_reg(0), useContinuation(false), 47 statusBitVector(0), staticInst(_staticInst), _seqNum(instSeqNum) 48{ 49 tlbHitLevel.assign(VSZ, -1); 50} 51 52void 53GPUDynInst::execute() 54{ 55 GPUDynInstPtr gpuDynInst = std::make_shared<GPUDynInst>(cu, wf, staticInst, 56 _seqNum); 57 staticInst->execute(gpuDynInst); 58} 59 60int 61GPUDynInst::numSrcRegOperands() 62{ 63 return staticInst->numSrcRegOperands(); 64} 65 66int 67GPUDynInst::numDstRegOperands() 68{ 69 return staticInst->numDstRegOperands(); 70} 71 72int 73GPUDynInst::getNumOperands() 74{ 75 return staticInst->getNumOperands(); 76} 77 78bool 79GPUDynInst::isVectorRegister(int operandIdx) 80{ 81 return staticInst->isVectorRegister(operandIdx); 82} 83 84bool 85GPUDynInst::isScalarRegister(int operandIdx) 86{ 87 return staticInst->isVectorRegister(operandIdx); 88} 89 90int 91GPUDynInst::getRegisterIndex(int operandIdx) 92{ 93 return staticInst->getRegisterIndex(operandIdx); 94} 95 96int 97GPUDynInst::getOperandSize(int operandIdx) 98{ 99 return staticInst->getOperandSize(operandIdx); 100} 101 102bool 103GPUDynInst::isDstOperand(int operandIdx) 104{ 105 return staticInst->isDstOperand(operandIdx); 106} 107 108bool 109GPUDynInst::isSrcOperand(int operandIdx) 110{ 111 return staticInst->isSrcOperand(operandIdx); 112} 113 114bool 115GPUDynInst::isArgLoad() 116{ 117 return staticInst->isArgLoad(); 118} 119 120const std::string& 121GPUDynInst::disassemble() const 122{ 123 return staticInst->disassemble(); 124} 125 126uint64_t 127GPUDynInst::seqNum() const 128{ 129 return _seqNum; 130} 131 132Enums::OpType 133GPUDynInst::opType() 134{ 135 return staticInst->o_type; 136} 137 138Enums::StorageClassType 139GPUDynInst::executedAs() 140{ 141 return staticInst->executed_as; 142} 143 144// Process a memory instruction and (if necessary) submit timing request 145void 146GPUDynInst::initiateAcc(GPUDynInstPtr gpuDynInst) 147{ 148 DPRINTF(GPUMem, "CU%d: WF[%d][%d]: mempacket status bitvector=%#x\n", 149 cu->cu_id, simdId, wfSlotId, exec_mask); 150 151 staticInst->initiateAcc(gpuDynInst); 152 time = 0; 153} 154 155bool 156GPUDynInst::scalarOp() const 157{ 158 return staticInst->scalarOp(); 159} 160 161void 162GPUDynInst::updateStats() 163{ 164 if (staticInst->isLocalMem()) { 165 // access to LDS (shared) memory 166 cu->dynamicLMemInstrCnt++; 167 } else { 168 // access to global memory 169 170 // update PageDivergence histogram 171 int number_pages_touched = cu->pagesTouched.size(); 172 assert(number_pages_touched); 173 cu->pageDivergenceDist.sample(number_pages_touched); 174 175 std::pair<ComputeUnit::pageDataStruct::iterator, bool> ret; 176 177 for (auto it : cu->pagesTouched) { 178 // see if this page has been touched before. if not, this also 179 // inserts the page into the table. 180 ret = cu->pageAccesses 181 .insert(ComputeUnit::pageDataStruct::value_type(it.first, 182 std::make_pair(1, it.second))); 183 184 // if yes, then update the stats 185 if (!ret.second) { 186 ret.first->second.first++; 187 ret.first->second.second += it.second; 188 } 189 } 190 191 cu->pagesTouched.clear(); 192 193 // total number of memory instructions (dynamic) 194 // Atomics are counted as a single memory instruction. 195 // this is # memory instructions per wavefronts, not per workitem 196 cu->dynamicGMemInstrCnt++; 197 } 198} 199