History log of /gem5/src/arch/x86/isa/insts/system/control_registers.py
Revision Date Author Comments
# 6345:f9ae7c3a036c 16-Jul-2009 Gabe Black <gblack@eecs.umich.edu>

X86: Take limitted advantage of the compilers type checking for microop operands.
# 6055:40bdbc32e3db 19-Apr-2009 Gabe Black <gblack@eecs.umich.edu>

X86: Implement the save machine status word instruction (SMSW).
# 6054:0aa0a6189767 19-Apr-2009 Gabe Black <gblack@eecs.umich.edu>

X86: Implement the load machine status word instruction (LMSW).
# 5933:8b9bc09b149c 25-Feb-2009 Gabe Black <gblack@eecs.umich.edu>

X86: Implement CLTS.