| #
12584:2af98e1fb894 |
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12-Mar-2018 |
Gabe Black <gabeblack@google.com> |
x86: Replace the .serializing directive with .serialize_(before|after).
This makes it explicit which type of serialization you want, and also
makes it possible to make a macroop serialize before. The old
serializing directive was renamed .serialize_after in the microcode
assembler, and throughout the microcode implementation, and its
behavior is unchanged. More specifically, it still marks the last
microop within the macroop as IsSerializing and IsSerializeAfter.
The new .serialize_before directive does something similar and marks
the first microop as IsSerializing and IsSerializeBefore.
Change-Id: Ia53466c734c651c65400809de7ef903c4a6c3e7e
Reviewed-on: https://gem5-review.googlesource.com/9041
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>
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| #
10474:799c8ee4ecba |
|
16-Oct-2014 |
Andreas Hansson <andreas.hansson@arm.com> |
arch: Use shared_ptr for all Faults
This patch takes quite a large step in transitioning from the ad-hoc
RefCountingPtr to the c++11 shared_ptr by adopting its use for all
Faults. There are no changes in behaviour, and the code modifications
are mostly just replacing "new" with "make_shared".
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| #
9985:d70124a5d594 |
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26-Nov-2013 |
Christian Menard <christian.menard@tu-dresden.de> |
x86: Implementation of Int3 and Int_Ib in long mode
This is an implementation of the x86 int3 and int immediate
instructions for long mode according to 'AMD64 Programmers Manual
Volume 3'.
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| #
7930:fb13c36c3951 |
|
07-Feb-2011 |
Tim Harris <tharris@microsoft.com> |
X86: Read the LDT/GDT at CPL0 when executing an iret.
During iret access LDT/GDT at CPL0 rather than after transition to user mode
(if I'm reading the Intel IA-64 architecture spec correctly, the contents of
the descriptor table are read before the CPL is updated).
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| #
7622:b49144029ec8 |
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23-Aug-2010 |
Gabe Black <gblack@eecs.umich.edu> |
X86: Mark serializing macroops and regular instructions as such.
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| #
7087:fb8d5786ff30 |
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24-May-2010 |
Nathan Binkert <nate@binkert.org> |
copyright: Change HP copyright on x86 code to be more friendly
|
| #
6645:c248b0348d85 |
|
16-Sep-2009 |
Gabe Black <gblack@eecs.umich.edu> |
X86: Fix checking the NT bit during an IRET.
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| #
6344:b7104eda0795 |
|
16-Jul-2009 |
Gabe Black <gblack@eecs.umich.edu> |
X86: Fix a number of places where the wrong form of a microop was used.
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| #
6298:9af8736c26be |
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09-Jul-2009 |
Gabe Black <gblack@eecs.umich.edu> |
X86: Fix a bug in IRET_PROT's microcode. The immediate form of sra was intended.
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| #
5932:afa0866171e1 |
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25-Feb-2009 |
Gabe Black <gblack@eecs.umich.edu> |
X86: Make the segment register reading microops use merge.
|
| #
5916:4bbd6239223c |
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25-Feb-2009 |
Gabe Black <gblack@eecs.umich.edu> |
X86: Update CS later so stack accesses have the right permission checks.
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| #
5812:d12ff89c7692 |
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25-Jan-2009 |
Gabe Black <gblack@eecs.umich.edu> |
X86: Fix a bug in the iret microcode.
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| #
5685:a55b78e4b6d6 |
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13-Oct-2008 |
Gabe Black <gblack@eecs.umich.edu> |
X86: Fix the segment setting code in IRET, and make it restore the flags.
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| #
5661:443e6f925027 |
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12-Oct-2008 |
Gabe Black <gblack@eecs.umich.edu> |
X86: Create a SeqOp class of microops and make Br one of them.
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| #
5543:3af77710f397 |
|
10-Sep-2008 |
Ali Saidi <saidi@eecs.umich.edu> |
style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs
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| #
5434:2f6dad874e14 |
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12-Jun-2008 |
Gabe Black <gblack@eecs.umich.edu> |
X86: Implement a partial, sort of correct version of the protected mode variant of iret.
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| #
5081:2ccce8600a9d |
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19-Sep-2007 |
Gabe Black <gblack@eecs.umich.edu> |
X86: Put in stubs for x87, 64 bit and 128 bit SIMD instruction microcode.
|