interrupts_and_exceptions.py revision 10474:799c8ee4ecba
1# Copyright (c) 2007-2008 The Hewlett-Packard Development Company
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder.  You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
10# unmodified and in its entirety in all distributions of the software,
11# modified or unmodified, in source code or in binary form.
12#
13# Redistribution and use in source and binary forms, with or without
14# modification, are permitted provided that the following conditions are
15# met: redistributions of source code must retain the above copyright
16# notice, this list of conditions and the following disclaimer;
17# redistributions in binary form must reproduce the above copyright
18# notice, this list of conditions and the following disclaimer in the
19# documentation and/or other materials provided with the distribution;
20# neither the name of the copyright holders nor the names of its
21# contributors may be used to endorse or promote products derived from
22# this software without specific prior written permission.
23#
24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
27# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
28# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35#
36# Authors: Gabe Black
37
38microcode = '''
39def macroop IRET_REAL {
40    .serializing
41    panic "Real mode iret isn't implemented!"
42};
43
44def macroop IRET_PROT {
45    .serializing
46    .adjust_env oszIn64Override
47
48    # Check for a nested task. This isn't supported at the moment.
49    rflag t1, 14; #NT bit
50    panic "Task switching with iret is unimplemented!", flags=(nCEZF,)
51
52    #t1 = temp_RIP
53    #t2 = temp_CS
54    #t3 = temp_RFLAGS
55    #t4 = handy m5 register
56
57    # Pop temp_RIP, temp_CS, and temp_RFLAGS
58    ld t1, ss, [1, t0, rsp], "0 * env.stackSize", dataSize=ssz
59    ld t2, ss, [1, t0, rsp], "1 * env.stackSize", dataSize=ssz
60    ld t3, ss, [1, t0, rsp], "2 * env.stackSize", dataSize=ssz
61
62    # Read the handy m5 register for use later
63    rdm5reg t4
64
65
66###
67### Handle if we're returning to virtual 8086 mode.
68###
69
70    #IF ((temp_RFLAGS.VM=1) && (CPL=0) && (LEGACY_MODE))
71    #    IRET_FROM_PROTECTED_TO_VIRTUAL
72
73    #temp_RFLAGS.VM != 1
74    rcri t0, t3, 18, flags=(ECF,)
75    br label("protToVirtFallThrough"), flags=(nCECF,)
76
77    #CPL=0
78    andi t0, t4, 0x30, flags=(EZF,)
79    br label("protToVirtFallThrough"), flags=(nCEZF,)
80
81    #(LEGACY_MODE)
82    rcri t0, t4, 1, flags=(ECF,)
83    br label("protToVirtFallThrough"), flags=(nCECF,)
84
85    panic "iret to virtual mode not supported"
86
87protToVirtFallThrough:
88
89
90
91    #temp_CPL = temp_CS.rpl
92    andi t5, t2, 0x3
93
94
95###
96### Read in the info for the new CS segment.
97###
98
99    #CS = READ_DESCRIPTOR (temp_CS, iret_chk)
100    andi t0, t2, 0xFC, flags=(EZF,), dataSize=2
101    br label("processCSDescriptor"), flags=(CEZF,)
102    andi t6, t2, 0xF8, dataSize=8
103    andi t0, t2, 0x4, flags=(EZF,), dataSize=2
104    br label("globalCSDescriptor"), flags=(CEZF,)
105    ld t8, tsl, [1, t0, t6], dataSize=8, atCPL0=True
106    br label("processCSDescriptor")
107globalCSDescriptor:
108    ld t8, tsg, [1, t0, t6], dataSize=8, atCPL0=True
109processCSDescriptor:
110    chks t2, t6, dataSize=8
111
112
113###
114### Get the new stack pointer and stack segment off the old stack if necessary,
115### and piggyback on the logic to check the new RIP value.
116###
117    #IF ((64BIT_MODE) || (temp_CPL!=CPL))
118    #{
119
120    #(64BIT_MODE)
121    andi t0, t4, 0xE, flags=(EZF,)
122    # Since we just found out we're in 64 bit mode, take advantage and
123    # do the appropriate RIP checks.
124    br label("doPopStackStuffAndCheckRIP"), flags=(CEZF,)
125
126    # Here, we know we're -not- in 64 bit mode, so we should do the
127    # appropriate/other RIP checks.
128    # if temp_RIP > CS.limit throw #GP(0)
129    rdlimit t6, cs, dataSize=8
130    sub t0, t1, t6, flags=(ECF,)
131    fault "std::make_shared<GeneralProtection>(0)", flags=(CECF,)
132
133    #(temp_CPL!=CPL)
134    srli t7, t4, 4
135    xor t7, t7, t5
136    andi t0, t7, 0x3, flags=(EZF,)
137    br label("doPopStackStuff"), flags=(nCEZF,)
138    # We can modify user visible state here because we're know
139    # we're done with things that can fault.
140    addi rsp, rsp, "3 * env.stackSize"
141    br label("fallThroughPopStackStuff")
142
143doPopStackStuffAndCheckRIP:
144    # Check if the RIP is canonical.
145    srai t7, t1, 47, flags=(EZF,), dataSize=ssz
146    # if t7 isn't 0 or -1, it wasn't canonical.
147    br label("doPopStackStuff"), flags=(CEZF,)
148    addi t0, t7, 1, flags=(EZF,), dataSize=ssz
149    fault "std::make_shared<GeneralProtection>(0)", flags=(nCEZF,)
150
151doPopStackStuff:
152    #    POP.v temp_RSP
153    ld t6, ss, [1, t0, rsp], "3 * env.dataSize", dataSize=ssz
154    #    POP.v temp_SS
155    ld t9, ss, [1, t0, rsp], "4 * env.dataSize", dataSize=ssz
156    #    SS = READ_DESCRIPTOR (temp_SS, ss_chk)
157    andi t0, t9, 0xFC, flags=(EZF,), dataSize=2
158    br label("processSSDescriptor"), flags=(CEZF,)
159    andi t7, t9, 0xF8, dataSize=8
160    andi t0, t9, 0x4, flags=(EZF,), dataSize=2
161    br label("globalSSDescriptor"), flags=(CEZF,)
162    ld t7, tsl, [1, t0, t7], dataSize=8, atCPL0=True
163    br label("processSSDescriptor")
164globalSSDescriptor:
165    ld t7, tsg, [1, t0, t7], dataSize=8, atCPL0=True
166processSSDescriptor:
167    chks t9, t7, dataSize=8
168
169    # This actually updates state which is wrong. It should wait until we know
170    # we're not going to fault. Unfortunately, that's hard to do.
171    wrdl ss, t7, t9
172    wrsel ss, t9
173
174###
175### From this point downwards, we can't fault. We can update user visible state.
176###
177    #    RSP.s = temp_RSP
178    mov rsp, rsp, t6, dataSize=ssz
179
180    #}
181
182fallThroughPopStackStuff:
183
184    # Update CS
185    wrdl cs, t8, t2
186    wrsel cs, t2
187
188    #CPL = temp_CPL
189
190    #IF (changing CPL)
191    #{
192    srli t7, t4, 4
193    xor t7, t7, t5
194    andi t0, t7, 0x3, flags=(EZF,)
195    br label("skipSegmentSquashing"), flags=(CEZF,)
196
197    # The attribute register needs to keep track of more info before this will
198    # work the way it needs to.
199    #    FOR (seg = ES, DS, FS, GS)
200    #        IF ((seg.attr.dpl < cpl && ((seg.attr.type = 'data')
201    #            || (seg.attr.type = 'non-conforming-code')))
202    #        {
203    #            seg = NULL
204    #        }
205    #}
206
207skipSegmentSquashing:
208
209    # Ignore this for now.
210    #RFLAGS.v = temp_RFLAGS
211    wrflags t0, t3
212    #  VIF,VIP,IOPL only changed if (old_CPL = 0)
213    #  IF only changed if (old_CPL <= old_RFLAGS.IOPL)
214    #  VM unchanged
215    #  RF cleared
216
217    #RIP = temp_RIP
218    wrip t0, t1, dataSize=ssz
219};
220
221def macroop IRET_VIRT {
222    panic "Virtual mode iret isn't implemented!"
223};
224
225def macroop INT3 {
226
227    limm t1, 0x03, dataSize=8
228
229    rdip t7
230
231    # Are we in long mode?
232    rdm5reg t5
233    andi t0, t5, 0x1, flags=(EZF,)
234    br rom_label("longModeSoftInterrupt"), flags=(CEZF,)
235    br rom_label("legacyModeInterrupt")
236};
237
238def macroop INT_I {
239
240    #load the byte-sized interrupt vector specified in the instruction
241    .adjust_imm trimImm(8)
242    limm t1, imm, dataSize=8
243
244    rdip t7
245
246    # Are we in long mode?
247    rdm5reg t5
248    andi t0, t5, 0x1, flags=(EZF,)
249    br rom_label("longModeSoftInterrupt"), flags=(CEZF,)
250    br rom_label("legacyModeInterrupt")
251};
252'''
253#let {{
254#    class INT(Inst):
255#       "GenFault ${new UnimpInstFault}"
256#    class INTO(Inst):
257#       "GenFault ${new UnimpInstFault}"
258#}};
259