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14178:f68430623245 |
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13-Aug-2019 |
Adrian Herrera <adrian.herrera@arm.com> |
configs: root, platform options in fs bigLITTLE
(1) Two new options are added to fs_bigLITTLE.py: - "root": disk/partition containing the rootfs (def. "/dev/vda1") - "machine-type": hardware platform class (def. "VExpress_GEM5_V1") + Accepts platform classes from PlatformConfig (2) Default kernel is not available in public uploads, force the user to provide its own kernel instead of crashing.
Change-Id: I88283ae12cd7289e15b9277ea2cc382e9136f11c Reviewed-by: Ciro Santilli <ciro.santilli@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20148 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
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14115:2a3eee6ded38 |
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29-Jul-2019 |
Chun-Chen TK Hsu <chunchenhsu@google.com> |
configs, arch-arm: Check if gic has cpu_addr attribute
Add this check because Gicv3 does not have the cpu_addr attribute.
Test: Change VExpress_GEM5_V1() to VExpress_GEM5_V2() and run the following command to boot Debian.
M5_PATH=$PWD/fs_files ./build/ARM/gem5.opt ./configs/example/arm/fs_bigLITTLE.py \ --dtb $PWD/fs_files/binaries/armv8_gem5_v2_1cpu.dtb \ --kernel $PWD/fs_files/binaries/vmlinux \ --disk $PWD/fs_files/disks/disk.img \ --cpu-type atomic --big-cpus 1 --little-cpus 0
Change-Id: I23595ae5238dc7cc915ab09300f91aa5e8c24fdc Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19648 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
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13774:a1be2a0c55f2 |
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25-Feb-2019 |
Andreas Sandberg <andreas.sandberg@arm.com> |
configs: Use absolute import paths
Use absoluate import paths to be Python 3 compatible. This also imports absolute_import from __future__ to ensure that Python 2.7 behaves the same way as Python 3.
Change-Id: Ica06ed95814e9cd3e768b3e1785075e36f6e56d0 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/16708 Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
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13636:3b55e4bae1d8 |
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04-Feb-2019 |
Giacomo Travaglini <giacomo.travaglini@arm.com> |
configs, arch-arm: Using AddrRange for Realview mem_regions
Physical memory ranges are now saved in Realview objects as pairs of addresses (start address and size). This patch is substituting them with a single AddrRange object.
Change-Id: I02d25d557c5c54d062f0dccef8ede45744d0ce6b Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Ciro Santilli <ciro.santilli@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/16206 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
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13635:d9dcebb1d6b6 |
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03-Feb-2019 |
Giacomo Travaglini <giacomo.travaglini@arm.com> |
configs: Unifiy interpretation of Realview mem_regions
In every arm platform which is making use of them, mem_regions are interpreted as a pair of start address and size. However arm SimpleSystem, which is using VExpress_GEM5_V1, is interpreting them as start address and end address. This patch is fixing this mismatch.
Change-Id: I0b2a2193cd07fbc5430f233438269a9c7c353df9 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Ciro Santilli <ciro.santilli@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/16205 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
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12165:463d335724d7 |
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20-Jul-2017 |
Andreas Sandberg <andreas.sandberg@arm.com> |
arm, config: Fix CPU names in ARM example configs
The ARM example configs used to rely on CPU aliases for the AtomicSimpleCPU and KVM when configuring clusters. This broken when support for CPU aliases was removed ('config: Remove support for CPU aliases.'). This change updates the config scripts to use the full class names instead.
Change-Id: If36c46207f39ca1897ecf77d9588f1c059819e63 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-on: https://gem5-review.googlesource.com/4360 Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
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12148:6d367c7fdb1d |
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05-Jul-2017 |
Gabor Dozsa <gabor.dozsa@arm.com> |
config: Change mem_range attribute naming in ARM SimpleSystem
MemConfig.config() expects memory ranges to be defined in a particular way. This patch changes the naming of the mem_range attribute in SympleSystem to enable use of MemConfig for configuring the memory.
Change-Id: I4964c136e53a99c69ff5e086cacb929aa435168d Signed-off-by: Gabor Dozsa <gabor.dozsa@arm.com> Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/4200 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
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11936:8ab45fd19f40 |
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17-Mar-2017 |
Andreas Sandberg <andreas.sandberg@arm.com> |
config, arm: Add multi-core KVM support to bL config
Add support for KVM in the big.LITTLE(tm) example configuration. This replaces the --atomic option with a --cpu-type option that can be used to switch between atomic, kvm, and timing simulation.
When running in KVM mode, the simulation script automatically assigns separate event queues (threads) to each of the simulated CPUs. All simulated devices, including CPU child devices (e.g., interrupt controllers and caches), are assigned to event queue 0.
Change-Id: Ic9a3f564db91f5a3d3cb754c5a02fdd5c17d5fdf Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-by: Sascha Bischoff <sascha.bischoff@arm.com> Reviewed-by: Gabor Dozsa <gabor.dozsa@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2561 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Weiping Liao <weipingliao@google.com>
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11756:0d38e56356c7 |
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06-Dec-2016 |
Gabor Dozsa <gabor.dozsa@arm.com> |
arm, config: Add missing IOCache in bL config
This patch adds an IOCache to the example bigLITTLE configuration. An IOCache is required for correct DMA transfers when we have caches in the system.
Change-Id: Ifeddc1b360aacbb16b1393f361dd98873c834012 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
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11722:f15f02d8c79e |
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30-Nov-2016 |
Sophiane Senni <sophiane.senni@gmail.com> |
mem: Split the hit_latency into tag_latency and data_latency
If the cache access mode is parallel, i.e. "sequential_access" parameter is set to "False", tags and data are accessed in parallel. Therefore, the hit_latency is the maximum latency between tag_latency and data_latency. On the other hand, if the cache access mode is sequential, i.e. "sequential_access" parameter is set to "True", tags and data are accessed sequentially. Therefore, the hit_latency is the sum of tag_latency plus data_latency.
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
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11682:612f75cf36a0 |
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14-Oct-2016 |
Andreas Hansson <andreas.hansson@arm.com> |
config: Make configs/common a Python package
Continue along the same line as the recent patch that made the Ruby-related config scripts Python packages and make also the configs/common directory a package.
All affected config scripts are updated (hopefully).
Note that this change makes it apparent that the current organisation and naming of the config directory and its subdirectories is rather chaotic. We mix scripts that are directly invoked with scripts that merely contain convenience functions. While it is not addressed in this patch we should follow up with a re-organisation of the config structure, and renaming of some of the packages.
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11630:6e2408ad4425 |
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15-Sep-2016 |
Gabor Dozsa <gabor.dozsa@arm.com> |
arm, config: Fixups for the example big.LITTLE(tm) configuration
This patch refactors the configuration file to use a more object-oriented design.
Change-Id: I44ac2d063c2b5901f385544fb6ce3f259459cb05 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Gabor Dozsa <gabor.dozsa@arm.com>
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11569:2eae1dfaa791 |
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21-Jul-2016 |
Gabor Dozsa <gabor.dozsa@arm.com> |
arm, config: Add an example ARM big.LITTLE(tm) configuration script
An ARM big.LITTLE system consists of two cpu clusters: the big CPUs are typically complex out-of-order cores and the little CPUs are simpler in-order ones. The fs_bigLITTLE.py script can run a full system simulation with various number of big and little cores and cache hierarchy. The commit also includes two example device tree files for booting Linux on the bigLITTLE system.
Change-Id: I6396fb3b2d8f27049ccae49d8666d643b66c088b Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
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