m5op_alpha.S revision 278
12SN/A/*
210298Salexandru.dutu@amd.com * Copyright (c) 2003 The Regents of The University of Michigan
31762SN/A * All rights reserved.
42SN/A *
52SN/A * Redistribution and use in source and binary forms, with or without
62SN/A * modification, are permitted provided that the following conditions are
72SN/A * met: redistributions of source code must retain the above copyright
82SN/A * notice, this list of conditions and the following disclaimer;
92SN/A * redistributions in binary form must reproduce the above copyright
102SN/A * notice, this list of conditions and the following disclaimer in the
112SN/A * documentation and/or other materials provided with the distribution;
122SN/A * neither the name of the copyright holders nor the names of its
132SN/A * contributors may be used to endorse or promote products derived from
142SN/A * this software without specific prior written permission.
152SN/A *
162SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
172SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
182SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
192SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
202SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
222SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
232SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
242SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
252SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
262SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272SN/A */
282665Ssaidi@eecs.umich.edu
292665Ssaidi@eecs.umich.edu#include <machine/asm.h>
302665Ssaidi@eecs.umich.edu#include <regdef.h>
312SN/A
322SN/A#define m5_op 0x01
33360SN/A#define arm_func 0x00
34360SN/A#define quiesce_func 0x01
352SN/A#define ivlb_func 0x10
3610930Sbrandon.potter@amd.com#define ivle_func 0x11
374117Sgblack@eecs.umich.edu#define m5exit_func 0x20
38180SN/A#define initparam_func 0x30
392SN/A#define resetstats_func 0x40
406329Sgblack@eecs.umich.edu
412378SN/A#define INST(op, ra, rb, func) \
426214Snate@binkert.org	.long (((op) << 26) | ((ra) << 21) | ((rb) << 16) | (func))
436658Snate@binkert.org
448852Sandreas.hansson@arm.com#define	ARM(reg) INST(m5_op, reg, 0, arm_func)
4510930Sbrandon.potter@amd.com#define QUIESCE() INST(m5_op, 0, 0, quiesce_func)
4656SN/A#define IVLB(reg) INST(m5_op, reg, 0, ivlb_func)
475958Sgblack@eecs.umich.edu#define IVLE(reg) INST(m5_op, reg, 0, ivle_func)
482SN/A#define M5_EXIT() INST(m5_op, 0, 0, m5exit_func)
495154Sgblack@eecs.umich.edu#define INITPARAM(reg) INST(m5_op, reg, 0, initparam_func)
508737Skoansin.tan@gmail.com#define RESETSTATS() INST(m5_op, 0, 0, resetstats_func)
518737Skoansin.tan@gmail.com
525154Sgblack@eecs.umich.edu	.set noreorder
535154Sgblack@eecs.umich.edu
542680Sktlim@umich.edu	.align 4
5510496Ssteve.reinhardt@amd.comLEAF(arm)
562378SN/A	ARM(16)
575758Shsul@eecs.umich.edu	RET
585771Shsul@eecs.umich.eduEND(arm)
595758Shsul@eecs.umich.edu
605758Shsul@eecs.umich.edu	.align 4
615771Shsul@eecs.umich.eduLEAF(quiesce)
625758Shsul@eecs.umich.edu	QUIESCE()
635771Shsul@eecs.umich.edu	RET
645758Shsul@eecs.umich.eduEND(quiesce)
655758Shsul@eecs.umich.edu
665771Shsul@eecs.umich.edu	.align 4
675758Shsul@eecs.umich.eduLEAF(ivlb)
685758Shsul@eecs.umich.edu	IVLB(16)
692SN/A	RET
702SN/AEND(ivlb)
712SN/A
722SN/A	.align 4
732378SN/ALEAF(ivle)
742378SN/A	IVLE(16)
752378SN/A	RET
762378SN/AEND(ivle)
772680Sktlim@umich.edu
7811005Sandreas.sandberg@arm.com	.align 4
79180SN/ALEAF(m5exit)
80180SN/A	M5_EXIT()
815713Shsul@eecs.umich.edu	RET
822SN/AEND(m5exit)
832SN/A
842SN/A    .align 4
852SN/ALEAF(initparam)
862SN/A    INITPARAM(0)
872680Sktlim@umich.edu    RET
882SN/AEND(initparam)
892680Sktlim@umich.edu
902SN/A    .align 4
915543Ssaidi@eecs.umich.eduLEAF(resetstats)
922SN/A    RESETSTATS()
932SN/A    RET
942SN/AEND(resetstats)
952SN/A