m5op_alpha.S revision 278 
1/*
2 * Copyright (c) 2003 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <machine/asm.h>
30#include <regdef.h>
31
32#define m5_op 0x01
33#define arm_func 0x00
34#define quiesce_func 0x01
35#define ivlb_func 0x10
36#define ivle_func 0x11
37#define m5exit_func 0x20
38#define initparam_func 0x30
39#define resetstats_func 0x40
40
41#define INST(op, ra, rb, func) \
42	.long (((op) << 26) | ((ra) << 21) | ((rb) << 16) | (func))
43
44#define	ARM(reg) INST(m5_op, reg, 0, arm_func)
45#define QUIESCE() INST(m5_op, 0, 0, quiesce_func)
46#define IVLB(reg) INST(m5_op, reg, 0, ivlb_func)
47#define IVLE(reg) INST(m5_op, reg, 0, ivle_func)
48#define M5_EXIT() INST(m5_op, 0, 0, m5exit_func)
49#define INITPARAM(reg) INST(m5_op, reg, 0, initparam_func)
50#define RESETSTATS() INST(m5_op, 0, 0, resetstats_func)
51
52	.set noreorder
53
54	.align 4
55LEAF(arm)
56	ARM(16)
57	RET
58END(arm)
59
60	.align 4
61LEAF(quiesce)
62	QUIESCE()
63	RET
64END(quiesce)
65
66	.align 4
67LEAF(ivlb)
68	IVLB(16)
69	RET
70END(ivlb)
71
72	.align 4
73LEAF(ivle)
74	IVLE(16)
75	RET
76END(ivle)
77
78	.align 4
79LEAF(m5exit)
80	M5_EXIT()
81	RET
82END(m5exit)
83
84    .align 4
85LEAF(initparam)
86    INITPARAM(0)
87    RET
88END(initparam)
89
90    .align 4
91LEAF(resetstats)
92    RESETSTATS()
93    RET
94END(resetstats)
95