1#include "riscv_test.h" 2 3#if __riscv_xlen == 64 4# define STORE sd 5# define LOAD ld 6# define REGBYTES 8 7#else 8# define STORE sw 9# define LOAD lw 10# define REGBYTES 4 11#endif 12 13#define STACK_TOP (_end + 4096) 14 15 .section ".text.init","ax",@progbits 16 .globl _start 17_start: 18 j handle_reset 19 20 /* NMI vector */ 21nmi_vector: 22 j wtf 23 24trap_vector: 25 j wtf 26 27handle_reset: 28 la t0, trap_vector 29 csrw mtvec, t0 30 la sp, STACK_TOP - SIZEOF_TRAPFRAME_T 31 csrr t0, mhartid 32 slli t0, t0, 12 33 add sp, sp, t0 34 csrw mscratch, sp 35 la a0, userstart 36 j vm_boot 37 38 .globl pop_tf 39pop_tf: 40 LOAD t0,33*REGBYTES(a0) 41 csrw sepc,t0 42 LOAD x1,1*REGBYTES(a0) 43 LOAD x2,2*REGBYTES(a0) 44 LOAD x3,3*REGBYTES(a0) 45 LOAD x4,4*REGBYTES(a0) 46 LOAD x5,5*REGBYTES(a0) 47 LOAD x6,6*REGBYTES(a0) 48 LOAD x7,7*REGBYTES(a0) 49 LOAD x8,8*REGBYTES(a0) 50 LOAD x9,9*REGBYTES(a0) 51 LOAD x11,11*REGBYTES(a0) 52 LOAD x12,12*REGBYTES(a0) 53 LOAD x13,13*REGBYTES(a0) 54 LOAD x14,14*REGBYTES(a0) 55 LOAD x15,15*REGBYTES(a0) 56 LOAD x16,16*REGBYTES(a0) 57 LOAD x17,17*REGBYTES(a0) 58 LOAD x18,18*REGBYTES(a0) 59 LOAD x19,19*REGBYTES(a0) 60 LOAD x20,20*REGBYTES(a0) 61 LOAD x21,21*REGBYTES(a0) 62 LOAD x22,22*REGBYTES(a0) 63 LOAD x23,23*REGBYTES(a0) 64 LOAD x24,24*REGBYTES(a0) 65 LOAD x25,25*REGBYTES(a0) 66 LOAD x26,26*REGBYTES(a0) 67 LOAD x27,27*REGBYTES(a0) 68 LOAD x28,28*REGBYTES(a0) 69 LOAD x29,29*REGBYTES(a0) 70 LOAD x30,30*REGBYTES(a0) 71 LOAD x31,31*REGBYTES(a0) 72 LOAD a0,10*REGBYTES(a0) 73 sret 74 75 .global trap_entry 76trap_entry: 77 csrrw sp, sscratch, sp 78 79 # save gprs 80 STORE x1,1*REGBYTES(sp) 81 STORE x3,3*REGBYTES(sp) 82 STORE x4,4*REGBYTES(sp) 83 STORE x5,5*REGBYTES(sp) 84 STORE x6,6*REGBYTES(sp) 85 STORE x7,7*REGBYTES(sp) 86 STORE x8,8*REGBYTES(sp) 87 STORE x9,9*REGBYTES(sp) 88 STORE x10,10*REGBYTES(sp) 89 STORE x11,11*REGBYTES(sp) 90 STORE x12,12*REGBYTES(sp) 91 STORE x13,13*REGBYTES(sp) 92 STORE x14,14*REGBYTES(sp) 93 STORE x15,15*REGBYTES(sp) 94 STORE x16,16*REGBYTES(sp) 95 STORE x17,17*REGBYTES(sp) 96 STORE x18,18*REGBYTES(sp) 97 STORE x19,19*REGBYTES(sp) 98 STORE x20,20*REGBYTES(sp) 99 STORE x21,21*REGBYTES(sp) 100 STORE x22,22*REGBYTES(sp) 101 STORE x23,23*REGBYTES(sp) 102 STORE x24,24*REGBYTES(sp) 103 STORE x25,25*REGBYTES(sp) 104 STORE x26,26*REGBYTES(sp) 105 STORE x27,27*REGBYTES(sp) 106 STORE x28,28*REGBYTES(sp) 107 STORE x29,29*REGBYTES(sp) 108 STORE x30,30*REGBYTES(sp) 109 STORE x31,31*REGBYTES(sp) 110 111 csrrw t0,sscratch,sp 112 STORE t0,2*REGBYTES(sp) 113 114 # get sr, epc, badvaddr, cause 115 csrr t0,sstatus 116 STORE t0,32*REGBYTES(sp) 117 csrr t0,sepc 118 STORE t0,33*REGBYTES(sp) 119 csrr t0,sbadaddr 120 STORE t0,34*REGBYTES(sp) 121 csrr t0,scause 122 STORE t0,35*REGBYTES(sp) 123 124 move a0, sp 125 j handle_trap 126