config.ini revision 11440:76b5639162af
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17eventq_index=0 18exit_on_work_items=false 19init_param=0 20kernel= 21kernel_addr_check=true 22load_addr_mask=1099511627775 23load_offset=0 24mem_mode=timing 25mem_ranges= 26memories=system.physmem 27mmap_using_noreserve=false 28multi_thread=false 29num_work_ids=16 30readfile= 31symbolfile= 32thermal_components= 33thermal_model=Null 34work_begin_ckpt_count=0 35work_begin_cpu_id_exit=-1 36work_begin_exit_count=0 37work_cpus_ckpt_count=0 38work_end_ckpt_count=0 39work_end_exit_count=0 40work_item_id=-1 41system_port=system.membus.slave[0] 42 43[system.clk_domain] 44type=SrcClockDomain 45clock=1000 46domain_id=-1 47eventq_index=0 48init_perf_level=0 49voltage_domain=system.voltage_domain 50 51[system.cpu] 52type=TimingSimpleCPU 53children=dcache dstage2_mmu dtb icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload 54branchPred=Null 55checker=Null 56clk_domain=system.cpu_clk_domain 57cpu_id=0 58do_checkpoint_insts=true 59do_quiesce=true 60do_statistics_insts=true 61dstage2_mmu=system.cpu.dstage2_mmu 62dtb=system.cpu.dtb 63eventq_index=0 64function_trace=false 65function_trace_start=0 66interrupts=system.cpu.interrupts 67isa=system.cpu.isa 68istage2_mmu=system.cpu.istage2_mmu 69itb=system.cpu.itb 70max_insts_all_threads=0 71max_insts_any_thread=0 72max_loads_all_threads=0 73max_loads_any_thread=0 74numThreads=1 75profile=0 76progress_interval=0 77simpoint_start_insts= 78socket_id=0 79switched_out=false 80system=system 81tracer=system.cpu.tracer 82workload=system.cpu.workload 83dcache_port=system.cpu.dcache.cpu_side 84icache_port=system.cpu.icache.cpu_side 85 86[system.cpu.dcache] 87type=Cache 88children=tags 89addr_ranges=0:18446744073709551615 90assoc=2 91clk_domain=system.cpu_clk_domain 92clusivity=mostly_incl 93demand_mshr_reserve=1 94eventq_index=0 95hit_latency=2 96is_read_only=false 97max_miss_count=0 98mshrs=4 99prefetch_on_access=false 100prefetcher=Null 101response_latency=2 102sequential_access=false 103size=262144 104system=system 105tags=system.cpu.dcache.tags 106tgts_per_mshr=20 107write_buffers=8 108writeback_clean=false 109cpu_side=system.cpu.dcache_port 110mem_side=system.cpu.toL2Bus.slave[1] 111 112[system.cpu.dcache.tags] 113type=LRU 114assoc=2 115block_size=64 116clk_domain=system.cpu_clk_domain 117eventq_index=0 118hit_latency=2 119sequential_access=false 120size=262144 121 122[system.cpu.dstage2_mmu] 123type=ArmStage2MMU 124children=stage2_tlb 125eventq_index=0 126stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 127sys=system 128tlb=system.cpu.dtb 129 130[system.cpu.dstage2_mmu.stage2_tlb] 131type=ArmTLB 132children=walker 133eventq_index=0 134is_stage2=true 135size=32 136walker=system.cpu.dstage2_mmu.stage2_tlb.walker 137 138[system.cpu.dstage2_mmu.stage2_tlb.walker] 139type=ArmTableWalker 140clk_domain=system.cpu_clk_domain 141eventq_index=0 142is_stage2=true 143num_squash_per_cycle=2 144sys=system 145 146[system.cpu.dtb] 147type=ArmTLB 148children=walker 149eventq_index=0 150is_stage2=false 151size=64 152walker=system.cpu.dtb.walker 153 154[system.cpu.dtb.walker] 155type=ArmTableWalker 156clk_domain=system.cpu_clk_domain 157eventq_index=0 158is_stage2=false 159num_squash_per_cycle=2 160sys=system 161port=system.cpu.toL2Bus.slave[3] 162 163[system.cpu.icache] 164type=Cache 165children=tags 166addr_ranges=0:18446744073709551615 167assoc=2 168clk_domain=system.cpu_clk_domain 169clusivity=mostly_incl 170demand_mshr_reserve=1 171eventq_index=0 172hit_latency=2 173is_read_only=true 174max_miss_count=0 175mshrs=4 176prefetch_on_access=false 177prefetcher=Null 178response_latency=2 179sequential_access=false 180size=131072 181system=system 182tags=system.cpu.icache.tags 183tgts_per_mshr=20 184write_buffers=8 185writeback_clean=true 186cpu_side=system.cpu.icache_port 187mem_side=system.cpu.toL2Bus.slave[0] 188 189[system.cpu.icache.tags] 190type=LRU 191assoc=2 192block_size=64 193clk_domain=system.cpu_clk_domain 194eventq_index=0 195hit_latency=2 196sequential_access=false 197size=131072 198 199[system.cpu.interrupts] 200type=ArmInterrupts 201eventq_index=0 202 203[system.cpu.isa] 204type=ArmISA 205decoderFlavour=Generic 206eventq_index=0 207fpsid=1090793632 208id_aa64afr0_el1=0 209id_aa64afr1_el1=0 210id_aa64dfr0_el1=1052678 211id_aa64dfr1_el1=0 212id_aa64isar0_el1=0 213id_aa64isar1_el1=0 214id_aa64mmfr0_el1=15728642 215id_aa64mmfr1_el1=0 216id_aa64pfr0_el1=17 217id_aa64pfr1_el1=0 218id_isar0=34607377 219id_isar1=34677009 220id_isar2=555950401 221id_isar3=17899825 222id_isar4=268501314 223id_isar5=0 224id_mmfr0=270536963 225id_mmfr1=0 226id_mmfr2=19070976 227id_mmfr3=34611729 228id_pfr0=49 229id_pfr1=4113 230midr=1091551472 231pmu=Null 232system=system 233 234[system.cpu.istage2_mmu] 235type=ArmStage2MMU 236children=stage2_tlb 237eventq_index=0 238stage2_tlb=system.cpu.istage2_mmu.stage2_tlb 239sys=system 240tlb=system.cpu.itb 241 242[system.cpu.istage2_mmu.stage2_tlb] 243type=ArmTLB 244children=walker 245eventq_index=0 246is_stage2=true 247size=32 248walker=system.cpu.istage2_mmu.stage2_tlb.walker 249 250[system.cpu.istage2_mmu.stage2_tlb.walker] 251type=ArmTableWalker 252clk_domain=system.cpu_clk_domain 253eventq_index=0 254is_stage2=true 255num_squash_per_cycle=2 256sys=system 257 258[system.cpu.itb] 259type=ArmTLB 260children=walker 261eventq_index=0 262is_stage2=false 263size=64 264walker=system.cpu.itb.walker 265 266[system.cpu.itb.walker] 267type=ArmTableWalker 268clk_domain=system.cpu_clk_domain 269eventq_index=0 270is_stage2=false 271num_squash_per_cycle=2 272sys=system 273port=system.cpu.toL2Bus.slave[2] 274 275[system.cpu.l2cache] 276type=Cache 277children=tags 278addr_ranges=0:18446744073709551615 279assoc=8 280clk_domain=system.cpu_clk_domain 281clusivity=mostly_incl 282demand_mshr_reserve=1 283eventq_index=0 284hit_latency=20 285is_read_only=false 286max_miss_count=0 287mshrs=20 288prefetch_on_access=false 289prefetcher=Null 290response_latency=20 291sequential_access=false 292size=2097152 293system=system 294tags=system.cpu.l2cache.tags 295tgts_per_mshr=12 296write_buffers=8 297writeback_clean=false 298cpu_side=system.cpu.toL2Bus.master[0] 299mem_side=system.membus.slave[1] 300 301[system.cpu.l2cache.tags] 302type=LRU 303assoc=8 304block_size=64 305clk_domain=system.cpu_clk_domain 306eventq_index=0 307hit_latency=20 308sequential_access=false 309size=2097152 310 311[system.cpu.toL2Bus] 312type=CoherentXBar 313children=snoop_filter 314clk_domain=system.cpu_clk_domain 315eventq_index=0 316forward_latency=0 317frontend_latency=1 318point_of_coherency=false 319response_latency=1 320snoop_filter=system.cpu.toL2Bus.snoop_filter 321snoop_response_latency=1 322system=system 323use_default_range=false 324width=32 325master=system.cpu.l2cache.cpu_side 326slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 327 328[system.cpu.toL2Bus.snoop_filter] 329type=SnoopFilter 330eventq_index=0 331lookup_latency=0 332max_capacity=8388608 333system=system 334 335[system.cpu.tracer] 336type=ExeTracer 337eventq_index=0 338 339[system.cpu.workload] 340type=LiveProcess 341cmd=vortex lendian.raw 342cwd=build/ARM/tests/opt/quick/se/50.vortex/arm/linux/simple-timing 343drivers= 344egid=100 345env= 346errout=cerr 347euid=100 348eventq_index=0 349executable=/home/stever/m5/dist/cpu2000/binaries/arm/linux/vortex 350gid=100 351input=cin 352kvmInSE=false 353max_stack_size=67108864 354output=cout 355pid=100 356ppid=99 357simpoint=0 358system=system 359uid=100 360useArchPT=false 361 362[system.cpu_clk_domain] 363type=SrcClockDomain 364clock=500 365domain_id=-1 366eventq_index=0 367init_perf_level=0 368voltage_domain=system.voltage_domain 369 370[system.dvfs_handler] 371type=DVFSHandler 372domains= 373enable=false 374eventq_index=0 375sys_clk_domain=system.clk_domain 376transition_latency=100000000 377 378[system.membus] 379type=CoherentXBar 380clk_domain=system.clk_domain 381eventq_index=0 382forward_latency=4 383frontend_latency=3 384point_of_coherency=true 385response_latency=2 386snoop_filter=Null 387snoop_response_latency=4 388system=system 389use_default_range=false 390width=16 391master=system.physmem.port 392slave=system.system_port system.cpu.l2cache.mem_side 393 394[system.physmem] 395type=SimpleMemory 396bandwidth=73.000000 397clk_domain=system.clk_domain 398conf_table_reported=true 399eventq_index=0 400in_addr_map=true 401latency=30000 402latency_var=0 403null=false 404range=0:134217727 405port=system.membus.master[0] 406 407[system.voltage_domain] 408type=VoltageDomain 409eventq_index=0 410voltage=1.000000 411 412