1[root]
2type=Root
3children=system
4eventq_index=0
5full_system=false
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000
9time_sync_spin_threshold=100000000
10
11[system]
12type=System
13children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
14boot_osflags=a
15cache_line_size=64
16clk_domain=system.clk_domain
17default_p_state=UNDEFINED
18eventq_index=0
19exit_on_work_items=false
20init_param=0
21kernel=
22kernel_addr_check=true
23load_addr_mask=1099511627775
24load_offset=0
25mem_mode=timing
26mem_ranges=
27memories=system.physmem
28mmap_using_noreserve=false
29multi_thread=false
30num_work_ids=16
31p_state_clk_gate_bins=20
32p_state_clk_gate_max=1000000000000
33p_state_clk_gate_min=1000
34power_model=Null
35readfile=
36symbolfile=
37thermal_components=
38thermal_model=Null
39work_begin_ckpt_count=0
40work_begin_cpu_id_exit=-1
41work_begin_exit_count=0
42work_cpus_ckpt_count=0
43work_end_ckpt_count=0
44work_end_exit_count=0
45work_item_id=-1
46system_port=system.membus.slave[0]
47
48[system.clk_domain]
49type=SrcClockDomain
50clock=1000
51domain_id=-1
52eventq_index=0
53init_perf_level=0
54voltage_domain=system.voltage_domain
55
56[system.cpu]
57type=TimingSimpleCPU
58children=dcache dstage2_mmu dtb icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload
59branchPred=Null
60checker=Null
61clk_domain=system.cpu_clk_domain
62cpu_id=0
63default_p_state=UNDEFINED
64do_checkpoint_insts=true
65do_quiesce=true
66do_statistics_insts=true
67dstage2_mmu=system.cpu.dstage2_mmu
68dtb=system.cpu.dtb
69eventq_index=0
70function_trace=false
71function_trace_start=0
72interrupts=system.cpu.interrupts
73isa=system.cpu.isa
74istage2_mmu=system.cpu.istage2_mmu
75itb=system.cpu.itb
76max_insts_all_threads=0
77max_insts_any_thread=0
78max_loads_all_threads=0
79max_loads_any_thread=0
80numThreads=1
81p_state_clk_gate_bins=20
82p_state_clk_gate_max=1000000000000
83p_state_clk_gate_min=1000
84power_model=Null
85profile=0
86progress_interval=0
87simpoint_start_insts=
88socket_id=0
89switched_out=false
90syscallRetryLatency=10000
91system=system
92tracer=system.cpu.tracer
93workload=system.cpu.workload
94dcache_port=system.cpu.dcache.cpu_side
95icache_port=system.cpu.icache.cpu_side
96
97[system.cpu.dcache]
98type=Cache
99children=tags
100addr_ranges=0:18446744073709551615:0:0:0:0
101assoc=2
102clk_domain=system.cpu_clk_domain
103clusivity=mostly_incl
104data_latency=2
105default_p_state=UNDEFINED
106demand_mshr_reserve=1
107eventq_index=0
108is_read_only=false
109max_miss_count=0
110mshrs=4
111p_state_clk_gate_bins=20
112p_state_clk_gate_max=1000000000000
113p_state_clk_gate_min=1000
114power_model=Null
115prefetch_on_access=false
116prefetcher=Null
117response_latency=2
118sequential_access=false
119size=262144
120system=system
121tag_latency=2
122tags=system.cpu.dcache.tags
123tgts_per_mshr=20
124write_buffers=8
125writeback_clean=false
126cpu_side=system.cpu.dcache_port
127mem_side=system.cpu.toL2Bus.slave[1]
128
129[system.cpu.dcache.tags]
130type=LRU
131assoc=2
132block_size=64
133clk_domain=system.cpu_clk_domain
134data_latency=2
135default_p_state=UNDEFINED
136eventq_index=0
137p_state_clk_gate_bins=20
138p_state_clk_gate_max=1000000000000
139p_state_clk_gate_min=1000
140power_model=Null
141sequential_access=false
142size=262144
143tag_latency=2
144
145[system.cpu.dstage2_mmu]
146type=ArmStage2MMU
147children=stage2_tlb
148eventq_index=0
149stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
150sys=system
151tlb=system.cpu.dtb
152
153[system.cpu.dstage2_mmu.stage2_tlb]
154type=ArmTLB
155children=walker
156eventq_index=0
157is_stage2=true
158size=32
159walker=system.cpu.dstage2_mmu.stage2_tlb.walker
160
161[system.cpu.dstage2_mmu.stage2_tlb.walker]
162type=ArmTableWalker
163clk_domain=system.cpu_clk_domain
164default_p_state=UNDEFINED
165eventq_index=0
166is_stage2=true
167num_squash_per_cycle=2
168p_state_clk_gate_bins=20
169p_state_clk_gate_max=1000000000000
170p_state_clk_gate_min=1000
171power_model=Null
172sys=system
173
174[system.cpu.dtb]
175type=ArmTLB
176children=walker
177eventq_index=0
178is_stage2=false
179size=64
180walker=system.cpu.dtb.walker
181
182[system.cpu.dtb.walker]
183type=ArmTableWalker
184clk_domain=system.cpu_clk_domain
185default_p_state=UNDEFINED
186eventq_index=0
187is_stage2=false
188num_squash_per_cycle=2
189p_state_clk_gate_bins=20
190p_state_clk_gate_max=1000000000000
191p_state_clk_gate_min=1000
192power_model=Null
193sys=system
194port=system.cpu.toL2Bus.slave[3]
195
196[system.cpu.icache]
197type=Cache
198children=tags
199addr_ranges=0:18446744073709551615:0:0:0:0
200assoc=2
201clk_domain=system.cpu_clk_domain
202clusivity=mostly_incl
203data_latency=2
204default_p_state=UNDEFINED
205demand_mshr_reserve=1
206eventq_index=0
207is_read_only=true
208max_miss_count=0
209mshrs=4
210p_state_clk_gate_bins=20
211p_state_clk_gate_max=1000000000000
212p_state_clk_gate_min=1000
213power_model=Null
214prefetch_on_access=false
215prefetcher=Null
216response_latency=2
217sequential_access=false
218size=131072
219system=system
220tag_latency=2
221tags=system.cpu.icache.tags
222tgts_per_mshr=20
223write_buffers=8
224writeback_clean=true
225cpu_side=system.cpu.icache_port
226mem_side=system.cpu.toL2Bus.slave[0]
227
228[system.cpu.icache.tags]
229type=LRU
230assoc=2
231block_size=64
232clk_domain=system.cpu_clk_domain
233data_latency=2
234default_p_state=UNDEFINED
235eventq_index=0
236p_state_clk_gate_bins=20
237p_state_clk_gate_max=1000000000000
238p_state_clk_gate_min=1000
239power_model=Null
240sequential_access=false
241size=131072
242tag_latency=2
243
244[system.cpu.interrupts]
245type=ArmInterrupts
246eventq_index=0
247
248[system.cpu.isa]
249type=ArmISA
250decoderFlavour=Generic
251eventq_index=0
252fpsid=1090793632
253id_aa64afr0_el1=0
254id_aa64afr1_el1=0
255id_aa64dfr0_el1=1052678
256id_aa64dfr1_el1=0
257id_aa64isar0_el1=0
258id_aa64isar1_el1=0
259id_aa64mmfr0_el1=15728642
260id_aa64mmfr1_el1=0
261id_isar0=34607377
262id_isar1=34677009
263id_isar2=555950401
264id_isar3=17899825
265id_isar4=268501314
266id_isar5=0
267id_mmfr0=270536963
268id_mmfr1=0
269id_mmfr2=19070976
270id_mmfr3=34611729
271midr=1091551472
272pmu=Null
273system=system
274
275[system.cpu.istage2_mmu]
276type=ArmStage2MMU
277children=stage2_tlb
278eventq_index=0
279stage2_tlb=system.cpu.istage2_mmu.stage2_tlb
280sys=system
281tlb=system.cpu.itb
282
283[system.cpu.istage2_mmu.stage2_tlb]
284type=ArmTLB
285children=walker
286eventq_index=0
287is_stage2=true
288size=32
289walker=system.cpu.istage2_mmu.stage2_tlb.walker
290
291[system.cpu.istage2_mmu.stage2_tlb.walker]
292type=ArmTableWalker
293clk_domain=system.cpu_clk_domain
294default_p_state=UNDEFINED
295eventq_index=0
296is_stage2=true
297num_squash_per_cycle=2
298p_state_clk_gate_bins=20
299p_state_clk_gate_max=1000000000000
300p_state_clk_gate_min=1000
301power_model=Null
302sys=system
303
304[system.cpu.itb]
305type=ArmTLB
306children=walker
307eventq_index=0
308is_stage2=false
309size=64
310walker=system.cpu.itb.walker
311
312[system.cpu.itb.walker]
313type=ArmTableWalker
314clk_domain=system.cpu_clk_domain
315default_p_state=UNDEFINED
316eventq_index=0
317is_stage2=false
318num_squash_per_cycle=2
319p_state_clk_gate_bins=20
320p_state_clk_gate_max=1000000000000
321p_state_clk_gate_min=1000
322power_model=Null
323sys=system
324port=system.cpu.toL2Bus.slave[2]
325
326[system.cpu.l2cache]
327type=Cache
328children=tags
329addr_ranges=0:18446744073709551615:0:0:0:0
330assoc=8
331clk_domain=system.cpu_clk_domain
332clusivity=mostly_incl
333data_latency=20
334default_p_state=UNDEFINED
335demand_mshr_reserve=1
336eventq_index=0
337is_read_only=false
338max_miss_count=0
339mshrs=20
340p_state_clk_gate_bins=20
341p_state_clk_gate_max=1000000000000
342p_state_clk_gate_min=1000
343power_model=Null
344prefetch_on_access=false
345prefetcher=Null
346response_latency=20
347sequential_access=false
348size=2097152
349system=system
350tag_latency=20
351tags=system.cpu.l2cache.tags
352tgts_per_mshr=12
353write_buffers=8
354writeback_clean=false
355cpu_side=system.cpu.toL2Bus.master[0]
356mem_side=system.membus.slave[1]
357
358[system.cpu.l2cache.tags]
359type=LRU
360assoc=8
361block_size=64
362clk_domain=system.cpu_clk_domain
363data_latency=20
364default_p_state=UNDEFINED
365eventq_index=0
366p_state_clk_gate_bins=20
367p_state_clk_gate_max=1000000000000
368p_state_clk_gate_min=1000
369power_model=Null
370sequential_access=false
371size=2097152
372tag_latency=20
373
374[system.cpu.toL2Bus]
375type=CoherentXBar
376children=snoop_filter
377clk_domain=system.cpu_clk_domain
378default_p_state=UNDEFINED
379eventq_index=0
380forward_latency=0
381frontend_latency=1
382p_state_clk_gate_bins=20
383p_state_clk_gate_max=1000000000000
384p_state_clk_gate_min=1000
385point_of_coherency=false
386power_model=Null
387response_latency=1
388snoop_filter=system.cpu.toL2Bus.snoop_filter
389snoop_response_latency=1
390system=system
391use_default_range=false
392width=32
393master=system.cpu.l2cache.cpu_side
394slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
395
396[system.cpu.toL2Bus.snoop_filter]
397type=SnoopFilter
398eventq_index=0
399lookup_latency=0
400max_capacity=8388608
401system=system
402
403[system.cpu.tracer]
404type=ExeTracer
405eventq_index=0
406
407[system.cpu.workload]
408type=Process
409cmd=vortex lendian.raw
410cwd=build/ARM/tests/opt/quick/se/50.vortex/arm/linux/simple-timing
411drivers=
412egid=100
413env=
414errout=cerr
415euid=100
416eventq_index=0
417executable=/usr/local/google/home/gabeblack/gem5/dist/m5/cpu2000/binaries/arm/linux/vortex
418gid=100
419input=cin
420kvmInSE=false
421maxStackSize=67108864
422output=cout
423pgid=100
424pid=100
425ppid=0
426simpoint=0
427system=system
428uid=100
429useArchPT=false
430
431[system.cpu_clk_domain]
432type=SrcClockDomain
433clock=500
434domain_id=-1
435eventq_index=0
436init_perf_level=0
437voltage_domain=system.voltage_domain
438
439[system.dvfs_handler]
440type=DVFSHandler
441domains=
442enable=false
443eventq_index=0
444sys_clk_domain=system.clk_domain
445transition_latency=100000000
446
447[system.membus]
448type=CoherentXBar
449children=snoop_filter
450clk_domain=system.clk_domain
451default_p_state=UNDEFINED
452eventq_index=0
453forward_latency=4
454frontend_latency=3
455p_state_clk_gate_bins=20
456p_state_clk_gate_max=1000000000000
457p_state_clk_gate_min=1000
458point_of_coherency=true
459power_model=Null
460response_latency=2
461snoop_filter=system.membus.snoop_filter
462snoop_response_latency=4
463system=system
464use_default_range=false
465width=16
466master=system.physmem.port
467slave=system.system_port system.cpu.l2cache.mem_side
468
469[system.membus.snoop_filter]
470type=SnoopFilter
471eventq_index=0
472lookup_latency=1
473max_capacity=8388608
474system=system
475
476[system.physmem]
477type=SimpleMemory
478bandwidth=73.000000
479clk_domain=system.clk_domain
480conf_table_reported=true
481default_p_state=UNDEFINED
482eventq_index=0
483in_addr_map=true
484kvm_map=true
485latency=30000
486latency_var=0
487null=false
488p_state_clk_gate_bins=20
489p_state_clk_gate_max=1000000000000
490p_state_clk_gate_min=1000
491power_model=Null
492range=0:134217727:0:0:0:0
493port=system.membus.master[0]
494
495[system.voltage_domain]
496type=VoltageDomain
497eventq_index=0
498voltage=1.000000
499
500