config.ini revision 10038
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17eventq_index=0 18init_param=0 19kernel= 20load_addr_mask=1099511627775 21load_offset=0 22mem_mode=timing 23mem_ranges= 24memories=system.physmem 25num_work_ids=16 26readfile= 27symbolfile= 28work_begin_ckpt_count=0 29work_begin_cpu_id_exit=-1 30work_begin_exit_count=0 31work_cpus_ckpt_count=0 32work_end_ckpt_count=0 33work_end_exit_count=0 34work_item_id=-1 35system_port=system.membus.slave[0] 36 37[system.clk_domain] 38type=SrcClockDomain 39clock=1000 40eventq_index=0 41voltage_domain=system.voltage_domain 42 43[system.cpu] 44type=TimingSimpleCPU 45children=dcache dstage2_mmu dtb icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload 46checker=Null 47clk_domain=system.cpu_clk_domain 48cpu_id=0 49do_checkpoint_insts=true 50do_quiesce=true 51do_statistics_insts=true 52dstage2_mmu=system.cpu.dstage2_mmu 53dtb=system.cpu.dtb 54eventq_index=0 55function_trace=false 56function_trace_start=0 57interrupts=system.cpu.interrupts 58isa=system.cpu.isa 59istage2_mmu=system.cpu.istage2_mmu 60itb=system.cpu.itb 61max_insts_all_threads=0 62max_insts_any_thread=0 63max_loads_all_threads=0 64max_loads_any_thread=0 65numThreads=1 66profile=0 67progress_interval=0 68simpoint_start_insts= 69switched_out=false 70system=system 71tracer=system.cpu.tracer 72workload=system.cpu.workload 73dcache_port=system.cpu.dcache.cpu_side 74icache_port=system.cpu.icache.cpu_side 75 76[system.cpu.dcache] 77type=BaseCache 78children=tags 79addr_ranges=0:18446744073709551615 80assoc=2 81clk_domain=system.cpu_clk_domain 82eventq_index=0 83forward_snoops=true 84hit_latency=2 85is_top_level=true 86max_miss_count=0 87mshrs=4 88prefetch_on_access=false 89prefetcher=Null 90response_latency=2 91sequential_access=false 92size=262144 93system=system 94tags=system.cpu.dcache.tags 95tgts_per_mshr=20 96two_queue=false 97write_buffers=8 98cpu_side=system.cpu.dcache_port 99mem_side=system.cpu.toL2Bus.slave[1] 100 101[system.cpu.dcache.tags] 102type=LRU 103assoc=2 104block_size=64 105clk_domain=system.cpu_clk_domain 106eventq_index=0 107hit_latency=2 108sequential_access=false 109size=262144 110 111[system.cpu.dstage2_mmu] 112type=ArmStage2MMU 113children=stage2_tlb 114eventq_index=0 115stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 116tlb=system.cpu.dtb 117 118[system.cpu.dstage2_mmu.stage2_tlb] 119type=ArmTLB 120children=walker 121eventq_index=0 122is_stage2=true 123size=32 124walker=system.cpu.dstage2_mmu.stage2_tlb.walker 125 126[system.cpu.dstage2_mmu.stage2_tlb.walker] 127type=ArmTableWalker 128clk_domain=system.cpu_clk_domain 129eventq_index=0 130is_stage2=true 131num_squash_per_cycle=2 132sys=system 133port=system.cpu.toL2Bus.slave[5] 134 135[system.cpu.dtb] 136type=ArmTLB 137children=walker 138eventq_index=0 139is_stage2=false 140size=64 141walker=system.cpu.dtb.walker 142 143[system.cpu.dtb.walker] 144type=ArmTableWalker 145clk_domain=system.cpu_clk_domain 146eventq_index=0 147is_stage2=false 148num_squash_per_cycle=2 149sys=system 150port=system.cpu.toL2Bus.slave[3] 151 152[system.cpu.icache] 153type=BaseCache 154children=tags 155addr_ranges=0:18446744073709551615 156assoc=2 157clk_domain=system.cpu_clk_domain 158eventq_index=0 159forward_snoops=true 160hit_latency=2 161is_top_level=true 162max_miss_count=0 163mshrs=4 164prefetch_on_access=false 165prefetcher=Null 166response_latency=2 167sequential_access=false 168size=131072 169system=system 170tags=system.cpu.icache.tags 171tgts_per_mshr=20 172two_queue=false 173write_buffers=8 174cpu_side=system.cpu.icache_port 175mem_side=system.cpu.toL2Bus.slave[0] 176 177[system.cpu.icache.tags] 178type=LRU 179assoc=2 180block_size=64 181clk_domain=system.cpu_clk_domain 182eventq_index=0 183hit_latency=2 184sequential_access=false 185size=131072 186 187[system.cpu.interrupts] 188type=ArmInterrupts 189eventq_index=0 190 191[system.cpu.isa] 192type=ArmISA 193eventq_index=0 194fpsid=1090793632 195id_aa64afr0_el1=0 196id_aa64afr1_el1=0 197id_aa64dfr0_el1=1052678 198id_aa64dfr1_el1=0 199id_aa64isar0_el1=0 200id_aa64isar1_el1=0 201id_aa64mmfr0_el1=15728642 202id_aa64mmfr1_el1=0 203id_aa64pfr0_el1=17 204id_aa64pfr1_el1=0 205id_isar0=34607377 206id_isar1=34677009 207id_isar2=555950401 208id_isar3=17899825 209id_isar4=268501314 210id_isar5=0 211id_mmfr0=270536963 212id_mmfr1=0 213id_mmfr2=19070976 214id_mmfr3=34611729 215id_pfr0=49 216id_pfr1=4113 217midr=1091551472 218system=system 219 220[system.cpu.istage2_mmu] 221type=ArmStage2MMU 222children=stage2_tlb 223eventq_index=0 224stage2_tlb=system.cpu.istage2_mmu.stage2_tlb 225tlb=system.cpu.itb 226 227[system.cpu.istage2_mmu.stage2_tlb] 228type=ArmTLB 229children=walker 230eventq_index=0 231is_stage2=true 232size=32 233walker=system.cpu.istage2_mmu.stage2_tlb.walker 234 235[system.cpu.istage2_mmu.stage2_tlb.walker] 236type=ArmTableWalker 237clk_domain=system.cpu_clk_domain 238eventq_index=0 239is_stage2=true 240num_squash_per_cycle=2 241sys=system 242port=system.cpu.toL2Bus.slave[4] 243 244[system.cpu.itb] 245type=ArmTLB 246children=walker 247eventq_index=0 248is_stage2=false 249size=64 250walker=system.cpu.itb.walker 251 252[system.cpu.itb.walker] 253type=ArmTableWalker 254clk_domain=system.cpu_clk_domain 255eventq_index=0 256is_stage2=false 257num_squash_per_cycle=2 258sys=system 259port=system.cpu.toL2Bus.slave[2] 260 261[system.cpu.l2cache] 262type=BaseCache 263children=tags 264addr_ranges=0:18446744073709551615 265assoc=8 266clk_domain=system.cpu_clk_domain 267eventq_index=0 268forward_snoops=true 269hit_latency=20 270is_top_level=false 271max_miss_count=0 272mshrs=20 273prefetch_on_access=false 274prefetcher=Null 275response_latency=20 276sequential_access=false 277size=2097152 278system=system 279tags=system.cpu.l2cache.tags 280tgts_per_mshr=12 281two_queue=false 282write_buffers=8 283cpu_side=system.cpu.toL2Bus.master[0] 284mem_side=system.membus.slave[1] 285 286[system.cpu.l2cache.tags] 287type=LRU 288assoc=8 289block_size=64 290clk_domain=system.cpu_clk_domain 291eventq_index=0 292hit_latency=20 293sequential_access=false 294size=2097152 295 296[system.cpu.toL2Bus] 297type=CoherentBus 298clk_domain=system.cpu_clk_domain 299eventq_index=0 300header_cycles=1 301system=system 302use_default_range=false 303width=32 304master=system.cpu.l2cache.cpu_side 305slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port 306 307[system.cpu.tracer] 308type=ExeTracer 309eventq_index=0 310 311[system.cpu.workload] 312type=LiveProcess 313cmd=vortex lendian.raw 314cwd=build/ARM/tests/opt/long/se/50.vortex/arm/linux/simple-timing 315egid=100 316env= 317errout=cerr 318euid=100 319eventq_index=0 320executable=/dist/cpu2000/binaries/arm/linux/vortex 321gid=100 322input=cin 323max_stack_size=67108864 324output=cout 325pid=100 326ppid=99 327simpoint=0 328system=system 329uid=100 330 331[system.cpu_clk_domain] 332type=SrcClockDomain 333clock=500 334eventq_index=0 335voltage_domain=system.voltage_domain 336 337[system.membus] 338type=CoherentBus 339clk_domain=system.clk_domain 340eventq_index=0 341header_cycles=1 342system=system 343use_default_range=false 344width=8 345master=system.physmem.port 346slave=system.system_port system.cpu.l2cache.mem_side 347 348[system.physmem] 349type=SimpleMemory 350bandwidth=73.000000 351clk_domain=system.clk_domain 352conf_table_reported=true 353eventq_index=0 354in_addr_map=true 355latency=30000 356latency_var=0 357null=false 358range=0:134217727 359port=system.membus.master[0] 360 361[system.voltage_domain] 362type=VoltageDomain 363eventq_index=0 364voltage=1.000000 365 366