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438system.cpu.l2cache.demand_mshr_misses::cpu.data 484 439system.cpu.l2cache.demand_mshr_misses::total 1437 440system.cpu.l2cache.overall_mshr_misses::cpu.inst 953 441system.cpu.l2cache.overall_mshr_misses::cpu.data 484 442system.cpu.l2cache.overall_mshr_misses::total 1437 443system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data 11362500 444system.cpu.l2cache.ReadExReq_mshr_miss_latency::total 11362500 445system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::cpu.inst 48127000 446system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::total 48127000 447system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::cpu.data 13079500 448system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::total 13079500 449system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst 48127000 450system.cpu.l2cache.demand_mshr_miss_latency::cpu.data 24442000 451system.cpu.l2cache.demand_mshr_miss_latency::total 72569000 452system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst 48127000 453system.cpu.l2cache.overall_mshr_miss_latency::cpu.data 24442000 454system.cpu.l2cache.overall_mshr_miss_latency::total 72569000 455system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data 1 456system.cpu.l2cache.ReadExReq_mshr_miss_rate::total 1 457system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::cpu.inst 0.997906 458system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::total 0.997906 459system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.data 1 460system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::total 1 461system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst 0.997906 462system.cpu.l2cache.demand_mshr_miss_rate::cpu.data 1 463system.cpu.l2cache.demand_mshr_miss_rate::total 0.998610 464system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst 0.997906 465system.cpu.l2cache.overall_mshr_miss_rate::cpu.data 1 466system.cpu.l2cache.overall_mshr_miss_rate::total 0.998610 467system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 50500 468system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 50500 469system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 50500.524659 470system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 50500.524659 471system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 50500 472system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 50500 473system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 50500.524659 474system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 50500 475system.cpu.l2cache.demand_avg_mshr_miss_latency::total 50500.347947 476system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 50500.524659 477system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 50500 478system.cpu.l2cache.overall_avg_mshr_miss_latency::total 50500.347947 479system.cpu.toL2Bus.snoop_filter.tot_requests 1483 480system.cpu.toL2Bus.snoop_filter.hit_single_requests 44 481system.cpu.toL2Bus.snoop_filter.hit_multi_requests 0 482system.cpu.toL2Bus.snoop_filter.tot_snoops 0 483system.cpu.toL2Bus.snoop_filter.hit_single_snoops 0 484system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 485system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 508585500 486system.cpu.toL2Bus.trans_dist::ReadResp 1214 487system.cpu.toL2Bus.trans_dist::WritebackClean 44 488system.cpu.toL2Bus.trans_dist::ReadExReq 225 489system.cpu.toL2Bus.trans_dist::ReadExResp 225 490system.cpu.toL2Bus.trans_dist::ReadCleanReq 955 491system.cpu.toL2Bus.trans_dist::ReadSharedReq 259 492system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1954 493system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 968 494system.cpu.toL2Bus.pkt_count::total 2922 495system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 63936 496system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 30976 497system.cpu.toL2Bus.pkt_size::total 94912 498system.cpu.toL2Bus.snoops 0 499system.cpu.toL2Bus.snoopTraffic 0 500system.cpu.toL2Bus.snoop_fanout::samples 1439 501system.cpu.toL2Bus.snoop_fanout::mean 0 502system.cpu.toL2Bus.snoop_fanout::stdev 0 503system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% 504system.cpu.toL2Bus.snoop_fanout::0 1439 100.00% 100.00% 505system.cpu.toL2Bus.snoop_fanout::1 0 0.00% 100.00% 506system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 100.00% 507system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% 508system.cpu.toL2Bus.snoop_fanout::min_value 0 509system.cpu.toL2Bus.snoop_fanout::max_value 0 510system.cpu.toL2Bus.snoop_fanout::total 1439 511system.cpu.toL2Bus.reqLayer0.occupancy 785500 512system.cpu.toL2Bus.reqLayer0.utilization 0.2 513system.cpu.toL2Bus.respLayer0.occupancy 1432500 514system.cpu.toL2Bus.respLayer0.utilization 0.3 515system.cpu.toL2Bus.respLayer1.occupancy 726000 516system.cpu.toL2Bus.respLayer1.utilization 0.1 517system.membus.snoop_filter.tot_requests 1437 518system.membus.snoop_filter.hit_single_requests 0 519system.membus.snoop_filter.hit_multi_requests 0 520system.membus.snoop_filter.tot_snoops 0 521system.membus.snoop_filter.hit_single_snoops 0 522system.membus.snoop_filter.hit_multi_snoops 0 523system.membus.pwrStateResidencyTicks::UNDEFINED 508585500 524system.membus.trans_dist::ReadResp 1212 525system.membus.trans_dist::ReadExReq 225 526system.membus.trans_dist::ReadExResp 225 527system.membus.trans_dist::ReadSharedReq 1212 528system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 2874 529system.membus.pkt_count::total 2874 530system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 91968 531system.membus.pkt_size::total 91968 532system.membus.snoops 0 533system.membus.snoopTraffic 0 534system.membus.snoop_fanout::samples 1437 535system.membus.snoop_fanout::mean 0 536system.membus.snoop_fanout::stdev 0 537system.membus.snoop_fanout::underflows 0 0.00% 0.00% 538system.membus.snoop_fanout::0 1437 100.00% 100.00% 539system.membus.snoop_fanout::1 0 0.00% 100.00% 540system.membus.snoop_fanout::overflows 0 0.00% 100.00% 541system.membus.snoop_fanout::min_value 0 542system.membus.snoop_fanout::max_value 0 543system.membus.snoop_fanout::total 1437 544system.membus.reqLayer0.occupancy 1437500 545system.membus.reqLayer0.utilization 0.3 546system.membus.respLayer1.occupancy 7185000 547system.membus.respLayer1.utilization 1.4 548 549---------- End Simulation Statistics ---------- 550