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668                                    "eventq_index": 0, 
669                                    "cxx_class": "OpDesc", 
670                                    "path": "system.cpu.fuPool.FUList5.opList07", 
671                                    "type": "OpDesc"
672                                }, 
673                                {
674                                    "opClass": "SimdShift", 
675                                    "opLat": 1, 
676                                    "name": "opList08", 
677                                    "pipelined": true, 
678                                    "eventq_index": 0, 
679                                    "cxx_class": "OpDesc", 
680                                    "path": "system.cpu.fuPool.FUList5.opList08", 
681                                    "type": "OpDesc"
682                                }, 
683                                {
684                                    "opClass": "SimdShiftAcc", 
685                                    "opLat": 1, 
686                                    "name": "opList09", 
687                                    "pipelined": true, 
688                                    "eventq_index": 0, 
689                                    "cxx_class": "OpDesc", 
690                                    "path": "system.cpu.fuPool.FUList5.opList09", 
691                                    "type": "OpDesc"
692                                }, 
693                                {
694                                    "opClass": "SimdSqrt", 
695                                    "opLat": 1, 
696                                    "name": "opList10", 
697                                    "pipelined": true, 
698                                    "eventq_index": 0, 
699                                    "cxx_class": "OpDesc", 
700                                    "path": "system.cpu.fuPool.FUList5.opList10", 
701                                    "type": "OpDesc"
702                                }, 
703                                {
704                                    "opClass": "SimdFloatAdd", 
705                                    "opLat": 1, 
706                                    "name": "opList11", 
707                                    "pipelined": true, 
708                                    "eventq_index": 0, 
709                                    "cxx_class": "OpDesc", 
710                                    "path": "system.cpu.fuPool.FUList5.opList11", 
711                                    "type": "OpDesc"
712                                }, 
713                                {
714                                    "opClass": "SimdFloatAlu", 
715                                    "opLat": 1, 
716                                    "name": "opList12", 
717                                    "pipelined": true, 
718                                    "eventq_index": 0, 
719                                    "cxx_class": "OpDesc", 
720                                    "path": "system.cpu.fuPool.FUList5.opList12", 
721                                    "type": "OpDesc"
722                                }, 
723                                {
724                                    "opClass": "SimdFloatCmp", 
725                                    "opLat": 1, 
726                                    "name": "opList13", 
727                                    "pipelined": true, 
728                                    "eventq_index": 0, 
729                                    "cxx_class": "OpDesc", 
730                                    "path": "system.cpu.fuPool.FUList5.opList13", 
731                                    "type": "OpDesc"
732                                }, 
733                                {
734                                    "opClass": "SimdFloatCvt", 
735                                    "opLat": 1, 
736                                    "name": "opList14", 
737                                    "pipelined": true, 
738                                    "eventq_index": 0, 
739                                    "cxx_class": "OpDesc", 
740                                    "path": "system.cpu.fuPool.FUList5.opList14", 
741                                    "type": "OpDesc"
742                                }, 
743                                {
744                                    "opClass": "SimdFloatDiv", 
745                                    "opLat": 1, 
746                                    "name": "opList15", 
747                                    "pipelined": true, 
748                                    "eventq_index": 0, 
749                                    "cxx_class": "OpDesc", 
750                                    "path": "system.cpu.fuPool.FUList5.opList15", 
751                                    "type": "OpDesc"
752                                }, 
753                                {
754                                    "opClass": "SimdFloatMisc", 
755                                    "opLat": 1, 
756                                    "name": "opList16", 
757                                    "pipelined": true, 
758                                    "eventq_index": 0, 
759                                    "cxx_class": "OpDesc", 
760                                    "path": "system.cpu.fuPool.FUList5.opList16", 
761                                    "type": "OpDesc"
762                                }, 
763                                {
764                                    "opClass": "SimdFloatMult", 
765                                    "opLat": 1, 
766                                    "name": "opList17", 
767                                    "pipelined": true, 
768                                    "eventq_index": 0, 
769                                    "cxx_class": "OpDesc", 
770                                    "path": "system.cpu.fuPool.FUList5.opList17", 
771                                    "type": "OpDesc"
772                                }, 
773                                {
774                                    "opClass": "SimdFloatMultAcc", 
775                                    "opLat": 1, 
776                                    "name": "opList18", 
777                                    "pipelined": true, 
778                                    "eventq_index": 0, 
779                                    "cxx_class": "OpDesc", 
780                                    "path": "system.cpu.fuPool.FUList5.opList18", 
781                                    "type": "OpDesc"
782                                }, 
783                                {
784                                    "opClass": "SimdFloatSqrt", 
785                                    "opLat": 1, 
786                                    "name": "opList19", 
787                                    "pipelined": true, 
788                                    "eventq_index": 0, 
789                                    "cxx_class": "OpDesc", 
790                                    "path": "system.cpu.fuPool.FUList5.opList19", 
791                                    "type": "OpDesc"
792                                }
793                            ], 
794                            "name": "FUList5", 
795                            "eventq_index": 0, 
796                            "cxx_class": "FUDesc", 
797                            "path": "system.cpu.fuPool.FUList5", 
798                            "type": "FUDesc"
799                        }, 
800                        {
801                            "count": 0, 
802                            "opList": [
803                                {
804                                    "opClass": "MemWrite", 
805                                    "opLat": 1, 
806                                    "name": "opList0", 
807                                    "pipelined": true, 
808                                    "eventq_index": 0, 
809                                    "cxx_class": "OpDesc", 
810                                    "path": "system.cpu.fuPool.FUList6.opList0", 
811                                    "type": "OpDesc"
812                                }, 
813                                {
814                                    "opClass": "FloatMemWrite", 
815                                    "opLat": 1, 
816                                    "name": "opList1", 
817                                    "pipelined": true, 
818                                    "eventq_index": 0, 
819                                    "cxx_class": "OpDesc", 
820                                    "path": "system.cpu.fuPool.FUList6.opList1", 
821                                    "type": "OpDesc"
822                                }
823                            ], 
824                            "name": "FUList6", 
825                            "eventq_index": 0, 
826                            "cxx_class": "FUDesc", 
827                            "path": "system.cpu.fuPool.FUList6", 
828                            "type": "FUDesc"
829                        }, 
830                        {
831                            "count": 4, 
832                            "opList": [
833                                {
834                                    "opClass": "MemRead", 
835                                    "opLat": 1, 
836                                    "name": "opList0", 
837                                    "pipelined": true, 
838                                    "eventq_index": 0, 
839                                    "cxx_class": "OpDesc", 
840                                    "path": "system.cpu.fuPool.FUList7.opList0", 
841                                    "type": "OpDesc"
842                                }, 
843                                {
844                                    "opClass": "MemWrite", 
845                                    "opLat": 1, 
846                                    "name": "opList1", 
847                                    "pipelined": true, 
848                                    "eventq_index": 0, 
849                                    "cxx_class": "OpDesc", 
850                                    "path": "system.cpu.fuPool.FUList7.opList1", 
851                                    "type": "OpDesc"
852                                }, 
853                                {
854                                    "opClass": "FloatMemRead", 
855                                    "opLat": 1, 
856                                    "name": "opList2", 
857                                    "pipelined": true, 
858                                    "eventq_index": 0, 
859                                    "cxx_class": "OpDesc", 
860                                    "path": "system.cpu.fuPool.FUList7.opList2", 
861                                    "type": "OpDesc"
862                                }, 
863                                {
864                                    "opClass": "FloatMemWrite", 
865                                    "opLat": 1, 
866                                    "name": "opList3", 
867                                    "pipelined": true, 
868                                    "eventq_index": 0, 
869                                    "cxx_class": "OpDesc", 
870                                    "path": "system.cpu.fuPool.FUList7.opList3", 
871                                    "type": "OpDesc"
872                                }
873                            ], 
874                            "name": "FUList7", 
875                            "eventq_index": 0, 
876                            "cxx_class": "FUDesc", 
877                            "path": "system.cpu.fuPool.FUList7", 
878                            "type": "FUDesc"
879                        }, 
880                        {
881                            "count": 1, 
882                            "opList": [
883                                {
884                                    "opClass": "IprAccess", 
885                                    "opLat": 3, 
886                                    "name": "opList", 
887                                    "pipelined": false, 
888                                    "eventq_index": 0, 
889                                    "cxx_class": "OpDesc", 
890                                    "path": "system.cpu.fuPool.FUList8.opList", 
891                                    "type": "OpDesc"
892                                }
893                            ], 
894                            "name": "FUList8", 
895                            "eventq_index": 0, 
896                            "cxx_class": "FUDesc", 
897                            "path": "system.cpu.fuPool.FUList8", 
898                            "type": "FUDesc"
899                        }
900                    ], 
901                    "eventq_index": 0, 
902                    "cxx_class": "FUPool", 
903                    "path": "system.cpu.fuPool", 
904                    "type": "FUPool"
905                }, 
906                "socket_id": 0, 
907                "renameToFetchDelay": 1, 
908                "icache": {
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911                        "role": "SLAVE"
912                    }, 
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920                    "type": "Cache", 
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924                    "default_p_state": "UNDEFINED", 
925                    "p_state_clk_gate_max": 1000000000000, 
926                    "mem_side": {
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928                        "role": "MASTER"
929                    }, 
930                    "mshrs": 4, 
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933                    "tags": {
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936                        "name": "tags", 
937                        "p_state_clk_gate_min": 1000, 
938                        "eventq_index": 0, 
939                        "p_state_clk_gate_bins": 20, 
940                        "default_p_state": "UNDEFINED", 
941                        "clk_domain": "system.cpu_clk_domain", 
942                        "power_model": null, 
943                        "sequential_access": false, 
944                        "assoc": 2, 
945                        "cxx_class": "LRU", 
946                        "p_state_clk_gate_max": 1000000000000, 
947                        "path": "system.cpu.icache.tags", 
948                        "block_size": 64, 
949                        "type": "LRU", 
950                        "data_latency": 2
951                    }, 
952                    "tgts_per_mshr": 20, 
953                    "demand_mshr_reserve": 1, 
954                    "power_model": null, 
955                    "addr_ranges": [
956                        "0:18446744073709551615:0:0:0:0"
957                    ], 
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959                    "prefetch_on_access": false, 
960                    "path": "system.cpu.icache", 
961                    "data_latency": 2, 
962                    "tag_latency": 2, 
963                    "name": "icache", 
964                    "p_state_clk_gate_bins": 20, 
965                    "sequential_access": false, 
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967                }, 
968                "path": "system.cpu", 
969                "numRobs": 1, 
970                "switched_out": false, 
971                "smtLSQPolicy": "Partitioned", 
972                "fetchBufferSize": 64, 
973                "wait_for_remote_gdb": false, 
974                "cacheStorePorts": 200, 
975                "simpoint_start_insts": [], 
976                "max_insts_any_thread": 0, 
977                "smtROBThreshold": 100, 
978                "numIQEntries": 64, 
979                "branchPred": {
980                    "numThreads": 1, 
981                    "BTBEntries": 4096, 
982                    "cxx_class": "TournamentBP", 
983                    "indirectPathLength": 3, 
984                    "globalCtrBits": 2, 
985                    "choicePredictorSize": 8192, 
986                    "indirectHashGHR": true, 
987                    "eventq_index": 0, 
988                    "localHistoryTableSize": 2048, 
989                    "type": "TournamentBP", 
990                    "indirectSets": 256, 
991                    "indirectWays": 2, 
992                    "choiceCtrBits": 2, 
993                    "useIndirect": true, 
994                    "localCtrBits": 2, 
995                    "path": "system.cpu.branchPred", 
996                    "localPredictorSize": 2048, 
997                    "RASSize": 16, 
998                    "globalPredictorSize": 8192, 
999                    "name": "branchPred", 
1000                    "indirectHashTargets": true, 
1001                    "instShiftAmt": 2, 
1002                    "indirectTagSize": 16, 
1003                    "BTBTagSize": 16
1004                }, 
1005                "LFSTSize": 1024, 
1006                "isa": [
1007                    {
1008                        "eventq_index": 0, 
1009                        "path": "system.cpu.isa", 
1010                        "type": "RiscvISA", 
1011                        "name": "isa", 
1012                        "cxx_class": "RiscvISA::ISA"
1013                    }
1014                ], 
1015                "smtROBPolicy": "Partitioned", 
1016                "iewToFetchDelay": 1, 
1017                "do_statistics_insts": true, 
1018                "dispatchWidth": 8, 
1019                "dcache": {
1020                    "cpu_side": {
1021                        "peer": "system.cpu.dcache_port", 
1022                        "role": "SLAVE"
1023                    }, 
1024                    "clusivity": "mostly_incl", 
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1037                    "mem_side": {
1038                        "peer": "system.cpu.toL2Bus.slave[1]", 
1039                        "role": "MASTER"
1040                    }, 
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1044                    "tags": {
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1046                        "tag_latency": 2, 
1047                        "name": "tags", 
1048                        "p_state_clk_gate_min": 1000, 
1049                        "eventq_index": 0, 
1050                        "p_state_clk_gate_bins": 20, 
1051                        "default_p_state": "UNDEFINED", 
1052                        "clk_domain": "system.cpu_clk_domain", 
1053                        "power_model": null, 
1054                        "sequential_access": false, 
1055                        "assoc": 2, 
1056                        "cxx_class": "LRU", 
1057                        "p_state_clk_gate_max": 1000000000000, 
1058                        "path": "system.cpu.dcache.tags", 
1059                        "block_size": 64, 
1060                        "type": "LRU", 
1061                        "data_latency": 2
1062                    }, 
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1065                    "power_model": null, 
1066                    "addr_ranges": [
1067                        "0:18446744073709551615:0:0:0:0"
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1070                    "prefetch_on_access": false, 
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1073                    "tag_latency": 2, 
1074                    "name": "dcache", 
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1076                    "sequential_access": false, 
1077                    "assoc": 2
1078                }, 
1079                "commitToDecodeDelay": 1, 
1080                "smtIQPolicy": "Partitioned", 
1081                "issueWidth": 8, 
1082                "LSQCheckLoads": true, 
1083                "commitToRenameDelay": 1, 
1084                "system": "system", 
1085                "checker": null, 
1086                "numPhysFloatRegs": 256, 
1087                "eventq_index": 0, 
1088                "default_p_state": "UNDEFINED", 
1089                "type": "DerivO3CPU", 
1090                "wbWidth": 8, 
1091                "numPhysVecRegs": 256, 
1092                "interrupts": [
1093                    {
1094                        "eventq_index": 0, 
1095                        "path": "system.cpu.interrupts", 
1096                        "type": "RiscvInterrupts", 
1097                        "name": "interrupts", 
1098                        "cxx_class": "RiscvISA::Interrupts"
1099                    }
1100                ], 
1101                "smtCommitPolicy": "RoundRobin", 
1102                "issueToExecuteDelay": 1, 
1103                "dtb": {
1104                    "name": "dtb", 
1105                    "eventq_index": 0, 
1106                    "cxx_class": "RiscvISA::TLB", 
1107                    "path": "system.cpu.dtb", 
1108                    "type": "RiscvTLB", 
1109                    "size": 64
1110                }, 
1111                "numROBEntries": 192, 
1112                "fetchQueueSize": 32, 
1113                "iewToCommitDelay": 1, 
1114                "smtNumFetchingThreads": 1, 
1115                "forwardComSize": 5, 
1116                "do_checkpoint_insts": true, 
1117                "cxx_class": "DerivO3CPU", 
1118                "commitToIEWDelay": 1, 
1119                "commitWidth": 8, 
1120                "clk_domain": "system.cpu_clk_domain", 
1121                "function_trace_start": 0, 
1122                "smtFetchPolicy": "SingleThread", 
1123                "profile": 0, 
1124                "icache_port": {
1125                    "peer": "system.cpu.icache.cpu_side", 
1126                    "role": "MASTER"
1127                }, 
1128                "dcache_port": {
1129                    "peer": "system.cpu.dcache.cpu_side", 
1130                    "role": "MASTER"
1131                }, 
1132                "LSQDepCheckShift": 4, 
1133                "trapLatency": 13, 
1134                "iewToDecodeDelay": 1, 
1135                "numPhysCCRegs": 0, 
1136                "renameToIEWDelay": 2, 
1137                "p_state_clk_gate_bins": 20, 
1138                "progress_interval": 0, 
1139                "LQEntries": 32
1140            }
1141        ], 
1142        "multi_thread": false, 
1143        "exit_on_work_items": false, 
1144        "work_item_id": -1, 
1145        "num_work_ids": 16
1146    }, 
1147    "time_sync_period": 100000000000, 
1148    "eventq_index": 0, 
1149    "time_sync_spin_threshold": 100000000, 
1150    "cxx_class": "Root", 
1151    "path": "root", 
1152    "time_sync_enable": false, 
1153    "type": "Root", 
1154    "full_system": false
1155}