1Redirecting stdout to build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64a/o3-timing/simout
2Redirecting stderr to build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64a/o3-timing/simerr
3gem5 Simulator System.  http://gem5.org
4gem5 is copyrighted software; use the --copyright option for details.
5
6gem5 compiled Jul 13 2017 17:09:45
7gem5 started Jul 13 2017 17:25:07
8gem5 executing on boldrock, pid 6011
9command line: /home/ar4jc/gem5/build/RISCV/gem5.opt -d build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64a/o3-timing --stats-file 'text://stats.txt?desc=False' -re /home/ar4jc/gem5/tests/testing/../run.py quick/se/02.insttest/riscv/linux-rv64a/o3-timing
10
11Global frequency set at 1000000000000 ticks per second
12lr.w/sc.w: PASS
13sc.w, no preceding lr.d: PASS
14amoswap.w: PASS
15amoswap.w, sign extend: PASS
16amoswap.w, truncate: PASS
17amoadd.w: PASS
18amoadd.w, truncate/overflow: PASS
19amoadd.w, sign extend: PASS
20amoxor.w, truncate: PASS
21amoxor.w, sign extend: PASS
22amoand.w, truncate: PASS
23amoand.w, sign extend: PASS
24amoor.w, truncate: PASS
25amoor.w, sign extend: PASS
26amomin.w, truncate: PASS
27amomin.w, sign extend: PASS
28amomax.w, truncate: PASS
29amomax.w, sign extend: PASS
30amominu.w, truncate: PASS
31amominu.w, sign extend: PASS
32amomaxu.w, truncate: PASS
33amomaxu.w, sign extend: PASS
34lr.d/sc.d: PASS
35sc.d, no preceding lr.d: PASS
36amoswap.d: PASS
37amoadd.d: PASS
38amoadd.d, overflow: PASS
39amoxor.d (1): PASS
40amoxor.d (0): PASS
41amoand.d: PASS
42amoor.d: PASS
43amomin.d: PASS
44amomax.d: PASS
45amominu.d: PASS
46amomaxu.d: PASS
47Exiting @ tick 125677500 because exiting with last active thread context
48