xref: /gem5/tests/quick/se/00.hello/ref/arm/linux/simple-timing/stats.txt

---------- Begin Simulation Statistics ----------
sim_seconds                                  0.000029                      
sim_ticks                                    28648500                      
final_tick                                   28648500                      
sim_freq                                 1000000000000                      
host_inst_rate                                 277751                      
host_op_rate                                   323869                      
host_tick_rate                             1739012040                      
host_mem_usage                                 279272                      
host_seconds                                     0.02                      
sim_insts                                        4566                      
sim_ops                                          5330                      
system.voltage_domain.voltage                       1                      
system.clk_domain.clock                          1000                      
system.physmem.pwrStateResidencyTicks::UNDEFINED     28648500                      
system.physmem.bytes_read::cpu.inst             14400                      
system.physmem.bytes_read::cpu.data              8000                      
system.physmem.bytes_read::total                22400                      
system.physmem.bytes_inst_read::cpu.inst        14400                      
system.physmem.bytes_inst_read::total           14400                      
system.physmem.num_reads::cpu.inst                225                      
system.physmem.num_reads::cpu.data                125                      
system.physmem.num_reads::total                   350                      
system.physmem.bw_read::cpu.inst            502644117                      
system.physmem.bw_read::cpu.data            279246732                      
system.physmem.bw_read::total               781890849                      
system.physmem.bw_inst_read::cpu.inst       502644117                      
system.physmem.bw_inst_read::total          502644117                      
system.physmem.bw_total::cpu.inst           502644117                      
system.physmem.bw_total::cpu.data           279246732                      
system.physmem.bw_total::total              781890849                      
system.pwrStateResidencyTicks::UNDEFINED     28648500                      
system.cpu_clk_domain.clock                       500                      
system.cpu.dstage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED     28648500                      
system.cpu.dstage2_mmu.stage2_tlb.walker.walks            0                      
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data            0                      
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst            0                      
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total            0                      
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data            0                      
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst            0                      
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total            0                      
system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin::total            0                      
system.cpu.dstage2_mmu.stage2_tlb.inst_hits            0                      
system.cpu.dstage2_mmu.stage2_tlb.inst_misses            0                      
system.cpu.dstage2_mmu.stage2_tlb.read_hits            0                      
system.cpu.dstage2_mmu.stage2_tlb.read_misses            0                      
system.cpu.dstage2_mmu.stage2_tlb.write_hits            0                      
system.cpu.dstage2_mmu.stage2_tlb.write_misses            0                      
system.cpu.dstage2_mmu.stage2_tlb.flush_tlb            0                      
system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva            0                      
system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva_asid            0                      
system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_asid            0                      
system.cpu.dstage2_mmu.stage2_tlb.flush_entries            0                      
system.cpu.dstage2_mmu.stage2_tlb.align_faults            0                      
system.cpu.dstage2_mmu.stage2_tlb.prefetch_faults            0                      
system.cpu.dstage2_mmu.stage2_tlb.domain_faults            0                      
system.cpu.dstage2_mmu.stage2_tlb.perms_faults            0                      
system.cpu.dstage2_mmu.stage2_tlb.read_accesses            0                      
system.cpu.dstage2_mmu.stage2_tlb.write_accesses            0                      
system.cpu.dstage2_mmu.stage2_tlb.inst_accesses            0                      
system.cpu.dstage2_mmu.stage2_tlb.hits              0                      
system.cpu.dstage2_mmu.stage2_tlb.misses            0                      
system.cpu.dstage2_mmu.stage2_tlb.accesses            0                      
system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED     28648500                      
system.cpu.dtb.walker.walks                         0                      
system.cpu.dtb.walker.walkRequestOrigin_Requested::Data            0                      
system.cpu.dtb.walker.walkRequestOrigin_Requested::Inst            0                      
system.cpu.dtb.walker.walkRequestOrigin_Requested::total            0                      
system.cpu.dtb.walker.walkRequestOrigin_Completed::Data            0                      
system.cpu.dtb.walker.walkRequestOrigin_Completed::Inst            0                      
system.cpu.dtb.walker.walkRequestOrigin_Completed::total            0                      
system.cpu.dtb.walker.walkRequestOrigin::total            0                      
system.cpu.dtb.inst_hits                            0                      
system.cpu.dtb.inst_misses                          0                      
system.cpu.dtb.read_hits                            0                      
system.cpu.dtb.read_misses                          0                      
system.cpu.dtb.write_hits                           0                      
system.cpu.dtb.write_misses                         0                      
system.cpu.dtb.flush_tlb                            0                      
system.cpu.dtb.flush_tlb_mva                        0                      
system.cpu.dtb.flush_tlb_mva_asid                   0                      
system.cpu.dtb.flush_tlb_asid                       0                      
system.cpu.dtb.flush_entries                        0                      
system.cpu.dtb.align_faults                         0                      
system.cpu.dtb.prefetch_faults                      0                      
system.cpu.dtb.domain_faults                        0                      
system.cpu.dtb.perms_faults                         0                      
system.cpu.dtb.read_accesses                        0                      
system.cpu.dtb.write_accesses                       0                      
system.cpu.dtb.inst_accesses                        0                      
system.cpu.dtb.hits                                 0                      
system.cpu.dtb.misses                               0                      
system.cpu.dtb.accesses                             0                      
system.cpu.istage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED     28648500                      
system.cpu.istage2_mmu.stage2_tlb.walker.walks            0                      
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data            0                      
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst            0                      
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total            0                      
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data            0                      
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst            0                      
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total            0                      
system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin::total            0                      
system.cpu.istage2_mmu.stage2_tlb.inst_hits            0                      
system.cpu.istage2_mmu.stage2_tlb.inst_misses            0                      
system.cpu.istage2_mmu.stage2_tlb.read_hits            0                      
system.cpu.istage2_mmu.stage2_tlb.read_misses            0                      
system.cpu.istage2_mmu.stage2_tlb.write_hits            0                      
system.cpu.istage2_mmu.stage2_tlb.write_misses            0                      
system.cpu.istage2_mmu.stage2_tlb.flush_tlb            0                      
system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva            0                      
system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva_asid            0                      
system.cpu.istage2_mmu.stage2_tlb.flush_tlb_asid            0                      
system.cpu.istage2_mmu.stage2_tlb.flush_entries            0                      
system.cpu.istage2_mmu.stage2_tlb.align_faults            0                      
system.cpu.istage2_mmu.stage2_tlb.prefetch_faults            0                      
system.cpu.istage2_mmu.stage2_tlb.domain_faults            0                      
system.cpu.istage2_mmu.stage2_tlb.perms_faults            0                      
system.cpu.istage2_mmu.stage2_tlb.read_accesses            0                      
system.cpu.istage2_mmu.stage2_tlb.write_accesses            0                      
system.cpu.istage2_mmu.stage2_tlb.inst_accesses            0                      
system.cpu.istage2_mmu.stage2_tlb.hits              0                      
system.cpu.istage2_mmu.stage2_tlb.misses            0                      
system.cpu.istage2_mmu.stage2_tlb.accesses            0                      
system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED     28648500                      
system.cpu.itb.walker.walks                         0                      
system.cpu.itb.walker.walkRequestOrigin_Requested::Data            0                      
system.cpu.itb.walker.walkRequestOrigin_Requested::Inst            0                      
system.cpu.itb.walker.walkRequestOrigin_Requested::total            0                      
system.cpu.itb.walker.walkRequestOrigin_Completed::Data            0                      
system.cpu.itb.walker.walkRequestOrigin_Completed::Inst            0                      
system.cpu.itb.walker.walkRequestOrigin_Completed::total            0                      
system.cpu.itb.walker.walkRequestOrigin::total            0                      
system.cpu.itb.inst_hits                            0                      
system.cpu.itb.inst_misses                          0                      
system.cpu.itb.read_hits                            0                      
system.cpu.itb.read_misses                          0                      
system.cpu.itb.write_hits                           0                      
system.cpu.itb.write_misses                         0                      
system.cpu.itb.flush_tlb                            0                      
system.cpu.itb.flush_tlb_mva                        0                      
system.cpu.itb.flush_tlb_mva_asid                   0                      
system.cpu.itb.flush_tlb_asid                       0                      
system.cpu.itb.flush_entries                        0                      
system.cpu.itb.align_faults                         0                      
system.cpu.itb.prefetch_faults                      0                      
system.cpu.itb.domain_faults                        0                      
system.cpu.itb.perms_faults                         0                      
system.cpu.itb.read_accesses                        0                      
system.cpu.itb.write_accesses                       0                      
system.cpu.itb.inst_accesses                        0                      
system.cpu.itb.hits                                 0                      
system.cpu.itb.misses                               0                      
system.cpu.itb.accesses                             0                      
system.cpu.workload.numSyscalls                    13                      
system.cpu.pwrStateResidencyTicks::ON        28648500                      
system.cpu.numCycles                            57297                      
system.cpu.numWorkItemsStarted                      0                      
system.cpu.numWorkItemsCompleted                    0                      
system.cpu.committedInsts                        4566                      
system.cpu.committedOps                          5330                      
system.cpu.num_int_alu_accesses                  4624                      
system.cpu.num_fp_alu_accesses                     16                      
system.cpu.num_func_calls                         203                      
system.cpu.num_conditional_control_insts          722                      
system.cpu.num_int_insts                         4624                      
system.cpu.num_fp_insts                            16                      
system.cpu.num_int_register_reads                7538                      
system.cpu.num_int_register_writes               2728                      
system.cpu.num_fp_register_reads                   16                      
system.cpu.num_fp_register_writes                   0                      
system.cpu.num_cc_register_reads                19187                      
system.cpu.num_cc_register_writes                2432                      
system.cpu.num_mem_refs                          1965                      
system.cpu.num_load_insts                        1027                      
system.cpu.num_store_insts                        938                      
system.cpu.num_idle_cycles                          0                      
system.cpu.num_busy_cycles                      57297                      
system.cpu.not_idle_fraction                        1                      
system.cpu.idle_fraction                            0                      
system.cpu.Branches                              1008                      
system.cpu.op_class::No_OpClass                     0      0.00%      0.00%
system.cpu.op_class::IntAlu                      3419     63.42%     63.42%
system.cpu.op_class::IntMult                        4      0.07%     63.49%
system.cpu.op_class::IntDiv                         0      0.00%     63.49%
system.cpu.op_class::FloatAdd                       0      0.00%     63.49%
system.cpu.op_class::FloatCmp                       0      0.00%     63.49%
system.cpu.op_class::FloatCvt                       0      0.00%     63.49%
system.cpu.op_class::FloatMult                      0      0.00%     63.49%
system.cpu.op_class::FloatMultAcc                   0      0.00%     63.49%
system.cpu.op_class::FloatDiv                       0      0.00%     63.49%
system.cpu.op_class::FloatMisc                      0      0.00%     63.49%
system.cpu.op_class::FloatSqrt                      0      0.00%     63.49%
system.cpu.op_class::SimdAdd                        0      0.00%     63.49%
system.cpu.op_class::SimdAddAcc                     0      0.00%     63.49%
system.cpu.op_class::SimdAlu                        0      0.00%     63.49%
system.cpu.op_class::SimdCmp                        0      0.00%     63.49%
system.cpu.op_class::SimdCvt                        0      0.00%     63.49%
system.cpu.op_class::SimdMisc                       0      0.00%     63.49%
system.cpu.op_class::SimdMult                       0      0.00%     63.49%
system.cpu.op_class::SimdMultAcc                    0      0.00%     63.49%
system.cpu.op_class::SimdShift                      0      0.00%     63.49%
system.cpu.op_class::SimdShiftAcc                   0      0.00%     63.49%
system.cpu.op_class::SimdSqrt                       0      0.00%     63.49%
system.cpu.op_class::SimdFloatAdd                   0      0.00%     63.49%
system.cpu.op_class::SimdFloatAlu                   0      0.00%     63.49%
system.cpu.op_class::SimdFloatCmp                   0      0.00%     63.49%
system.cpu.op_class::SimdFloatCvt                   0      0.00%     63.49%
system.cpu.op_class::SimdFloatDiv                   0      0.00%     63.49%
system.cpu.op_class::SimdFloatMisc                  3      0.06%     63.55%
system.cpu.op_class::SimdFloatMult                  0      0.00%     63.55%
system.cpu.op_class::SimdFloatMultAcc               0      0.00%     63.55%
system.cpu.op_class::SimdFloatSqrt                  0      0.00%     63.55%
system.cpu.op_class::MemRead                     1027     19.05%     82.60%
system.cpu.op_class::MemWrite                     922     17.10%     99.70%
system.cpu.op_class::FloatMemRead                   0      0.00%     99.70%
system.cpu.op_class::FloatMemWrite                 16      0.30%    100.00%
system.cpu.op_class::IprAccess                      0      0.00%    100.00%
system.cpu.op_class::InstPrefetch                   0      0.00%    100.00%
system.cpu.op_class::total                       5391                      
system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED     28648500                      
system.cpu.dcache.tags.replacements                 0                      
system.cpu.dcache.tags.tagsinuse            82.616265                      
system.cpu.dcache.tags.total_refs                1786                      
system.cpu.dcache.tags.sampled_refs               141                      
system.cpu.dcache.tags.avg_refs             12.666667                      
system.cpu.dcache.tags.warmup_cycle                 0                      
system.cpu.dcache.tags.occ_blocks::cpu.data    82.616265                      
system.cpu.dcache.tags.occ_percent::cpu.data     0.020170                      
system.cpu.dcache.tags.occ_percent::total     0.020170                      
system.cpu.dcache.tags.occ_task_id_blocks::1024          141                      
system.cpu.dcache.tags.age_task_id_blocks_1024::0           37                      
system.cpu.dcache.tags.age_task_id_blocks_1024::1          104                      
system.cpu.dcache.tags.occ_task_id_percent::1024     0.034424                      
system.cpu.dcache.tags.tag_accesses              3995                      
system.cpu.dcache.tags.data_accesses             3995                      
system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED     28648500                      
system.cpu.dcache.ReadReq_hits::cpu.data          894                      
system.cpu.dcache.ReadReq_hits::total             894                      
system.cpu.dcache.WriteReq_hits::cpu.data          870                      
system.cpu.dcache.WriteReq_hits::total            870                      
system.cpu.dcache.LoadLockedReq_hits::cpu.data           11                      
system.cpu.dcache.LoadLockedReq_hits::total           11                      
system.cpu.dcache.StoreCondReq_hits::cpu.data           11                      
system.cpu.dcache.StoreCondReq_hits::total           11                      
system.cpu.dcache.demand_hits::cpu.data          1764                      
system.cpu.dcache.demand_hits::total             1764                      
system.cpu.dcache.overall_hits::cpu.data         1764                      
system.cpu.dcache.overall_hits::total            1764                      
system.cpu.dcache.ReadReq_misses::cpu.data           98                      
system.cpu.dcache.ReadReq_misses::total            98                      
system.cpu.dcache.WriteReq_misses::cpu.data           43                      
system.cpu.dcache.WriteReq_misses::total           43                      
system.cpu.dcache.demand_misses::cpu.data          141                      
system.cpu.dcache.demand_misses::total            141                      
system.cpu.dcache.overall_misses::cpu.data          141                      
system.cpu.dcache.overall_misses::total           141                      
system.cpu.dcache.ReadReq_miss_latency::cpu.data      5390000                      
system.cpu.dcache.ReadReq_miss_latency::total      5390000                      
system.cpu.dcache.WriteReq_miss_latency::cpu.data      2709000                      
system.cpu.dcache.WriteReq_miss_latency::total      2709000                      
system.cpu.dcache.demand_miss_latency::cpu.data      8099000                      
system.cpu.dcache.demand_miss_latency::total      8099000                      
system.cpu.dcache.overall_miss_latency::cpu.data      8099000                      
system.cpu.dcache.overall_miss_latency::total      8099000                      
system.cpu.dcache.ReadReq_accesses::cpu.data          992                      
system.cpu.dcache.ReadReq_accesses::total          992                      
system.cpu.dcache.WriteReq_accesses::cpu.data          913                      
system.cpu.dcache.WriteReq_accesses::total          913                      
system.cpu.dcache.LoadLockedReq_accesses::cpu.data           11                      
system.cpu.dcache.LoadLockedReq_accesses::total           11                      
system.cpu.dcache.StoreCondReq_accesses::cpu.data           11                      
system.cpu.dcache.StoreCondReq_accesses::total           11                      
system.cpu.dcache.demand_accesses::cpu.data         1905                      
system.cpu.dcache.demand_accesses::total         1905                      
system.cpu.dcache.overall_accesses::cpu.data         1905                      
system.cpu.dcache.overall_accesses::total         1905                      
system.cpu.dcache.ReadReq_miss_rate::cpu.data     0.098790                      
system.cpu.dcache.ReadReq_miss_rate::total     0.098790                      
system.cpu.dcache.WriteReq_miss_rate::cpu.data     0.047097                      
system.cpu.dcache.WriteReq_miss_rate::total     0.047097                      
system.cpu.dcache.demand_miss_rate::cpu.data     0.074016                      
system.cpu.dcache.demand_miss_rate::total     0.074016                      
system.cpu.dcache.overall_miss_rate::cpu.data     0.074016                      
system.cpu.dcache.overall_miss_rate::total     0.074016                      
system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data        55000                      
system.cpu.dcache.ReadReq_avg_miss_latency::total        55000                      
system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data        63000                      
system.cpu.dcache.WriteReq_avg_miss_latency::total        63000                      
system.cpu.dcache.demand_avg_miss_latency::cpu.data 57439.716312                      
system.cpu.dcache.demand_avg_miss_latency::total 57439.716312                      
system.cpu.dcache.overall_avg_miss_latency::cpu.data 57439.716312                      
system.cpu.dcache.overall_avg_miss_latency::total 57439.716312                      
system.cpu.dcache.blocked_cycles::no_mshrs            0                      
system.cpu.dcache.blocked_cycles::no_targets            0                      
system.cpu.dcache.blocked::no_mshrs                 0                      
system.cpu.dcache.blocked::no_targets               0                      
system.cpu.dcache.avg_blocked_cycles::no_mshrs          nan                      
system.cpu.dcache.avg_blocked_cycles::no_targets          nan                      
system.cpu.dcache.ReadReq_mshr_misses::cpu.data           98                      
system.cpu.dcache.ReadReq_mshr_misses::total           98                      
system.cpu.dcache.WriteReq_mshr_misses::cpu.data           43                      
system.cpu.dcache.WriteReq_mshr_misses::total           43                      
system.cpu.dcache.demand_mshr_misses::cpu.data          141                      
system.cpu.dcache.demand_mshr_misses::total          141                      
system.cpu.dcache.overall_mshr_misses::cpu.data          141                      
system.cpu.dcache.overall_mshr_misses::total          141                      
system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data      5292000                      
system.cpu.dcache.ReadReq_mshr_miss_latency::total      5292000                      
system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data      2666000                      
system.cpu.dcache.WriteReq_mshr_miss_latency::total      2666000                      
system.cpu.dcache.demand_mshr_miss_latency::cpu.data      7958000                      
system.cpu.dcache.demand_mshr_miss_latency::total      7958000                      
system.cpu.dcache.overall_mshr_miss_latency::cpu.data      7958000                      
system.cpu.dcache.overall_mshr_miss_latency::total      7958000                      
system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data     0.098790                      
system.cpu.dcache.ReadReq_mshr_miss_rate::total     0.098790                      
system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data     0.047097                      
system.cpu.dcache.WriteReq_mshr_miss_rate::total     0.047097                      
system.cpu.dcache.demand_mshr_miss_rate::cpu.data     0.074016                      
system.cpu.dcache.demand_mshr_miss_rate::total     0.074016                      
system.cpu.dcache.overall_mshr_miss_rate::cpu.data     0.074016                      
system.cpu.dcache.overall_mshr_miss_rate::total     0.074016                      
system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data        54000                      
system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total        54000                      
system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data        62000                      
system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total        62000                      
system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 56439.716312                      
system.cpu.dcache.demand_avg_mshr_miss_latency::total 56439.716312                      
system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 56439.716312                      
system.cpu.dcache.overall_avg_mshr_miss_latency::total 56439.716312                      
system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED     28648500                      
system.cpu.icache.tags.replacements                 1                      
system.cpu.icache.tags.tagsinuse           113.995886                      
system.cpu.icache.tags.total_refs                4365                      
system.cpu.icache.tags.sampled_refs               241                      
system.cpu.icache.tags.avg_refs             18.112033                      
system.cpu.icache.tags.warmup_cycle                 0                      
system.cpu.icache.tags.occ_blocks::cpu.inst   113.995886                      
system.cpu.icache.tags.occ_percent::cpu.inst     0.055662                      
system.cpu.icache.tags.occ_percent::total     0.055662                      
system.cpu.icache.tags.occ_task_id_blocks::1024          240                      
system.cpu.icache.tags.age_task_id_blocks_1024::0           95                      
system.cpu.icache.tags.age_task_id_blocks_1024::1          145                      
system.cpu.icache.tags.occ_task_id_percent::1024     0.117188                      
system.cpu.icache.tags.tag_accesses              9453                      
system.cpu.icache.tags.data_accesses             9453                      
system.cpu.icache.pwrStateResidencyTicks::UNDEFINED     28648500                      
system.cpu.icache.ReadReq_hits::cpu.inst         4365                      
system.cpu.icache.ReadReq_hits::total            4365                      
system.cpu.icache.demand_hits::cpu.inst          4365                      
system.cpu.icache.demand_hits::total             4365                      
system.cpu.icache.overall_hits::cpu.inst         4365                      
system.cpu.icache.overall_hits::total            4365                      
system.cpu.icache.ReadReq_misses::cpu.inst          241                      
system.cpu.icache.ReadReq_misses::total           241                      
system.cpu.icache.demand_misses::cpu.inst          241                      
system.cpu.icache.demand_misses::total            241                      
system.cpu.icache.overall_misses::cpu.inst          241                      
system.cpu.icache.overall_misses::total           241                      
system.cpu.icache.ReadReq_miss_latency::cpu.inst     14404500                      
system.cpu.icache.ReadReq_miss_latency::total     14404500                      
system.cpu.icache.demand_miss_latency::cpu.inst     14404500                      
system.cpu.icache.demand_miss_latency::total     14404500                      
system.cpu.icache.overall_miss_latency::cpu.inst     14404500                      
system.cpu.icache.overall_miss_latency::total     14404500                      
system.cpu.icache.ReadReq_accesses::cpu.inst         4606                      
system.cpu.icache.ReadReq_accesses::total         4606                      
system.cpu.icache.demand_accesses::cpu.inst         4606                      
system.cpu.icache.demand_accesses::total         4606                      
system.cpu.icache.overall_accesses::cpu.inst         4606                      
system.cpu.icache.overall_accesses::total         4606                      
system.cpu.icache.ReadReq_miss_rate::cpu.inst     0.052323                      
system.cpu.icache.ReadReq_miss_rate::total     0.052323                      
system.cpu.icache.demand_miss_rate::cpu.inst     0.052323                      
system.cpu.icache.demand_miss_rate::total     0.052323                      
system.cpu.icache.overall_miss_rate::cpu.inst     0.052323                      
system.cpu.icache.overall_miss_rate::total     0.052323                      
system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 59769.709544                      
system.cpu.icache.ReadReq_avg_miss_latency::total 59769.709544                      
system.cpu.icache.demand_avg_miss_latency::cpu.inst 59769.709544                      
system.cpu.icache.demand_avg_miss_latency::total 59769.709544                      
system.cpu.icache.overall_avg_miss_latency::cpu.inst 59769.709544                      
system.cpu.icache.overall_avg_miss_latency::total 59769.709544                      
system.cpu.icache.blocked_cycles::no_mshrs            0                      
system.cpu.icache.blocked_cycles::no_targets            0                      
system.cpu.icache.blocked::no_mshrs                 0                      
system.cpu.icache.blocked::no_targets               0                      
system.cpu.icache.avg_blocked_cycles::no_mshrs          nan                      
system.cpu.icache.avg_blocked_cycles::no_targets          nan                      
system.cpu.icache.writebacks::writebacks            1                      
system.cpu.icache.writebacks::total                 1                      
system.cpu.icache.ReadReq_mshr_misses::cpu.inst          241                      
system.cpu.icache.ReadReq_mshr_misses::total          241                      
system.cpu.icache.demand_mshr_misses::cpu.inst          241                      
system.cpu.icache.demand_mshr_misses::total          241                      
system.cpu.icache.overall_mshr_misses::cpu.inst          241                      
system.cpu.icache.overall_mshr_misses::total          241                      
system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst     14163500                      
system.cpu.icache.ReadReq_mshr_miss_latency::total     14163500                      
system.cpu.icache.demand_mshr_miss_latency::cpu.inst     14163500                      
system.cpu.icache.demand_mshr_miss_latency::total     14163500                      
system.cpu.icache.overall_mshr_miss_latency::cpu.inst     14163500                      
system.cpu.icache.overall_mshr_miss_latency::total     14163500                      
system.cpu.icache.ReadReq_mshr_miss_rate::cpu.inst     0.052323                      
system.cpu.icache.ReadReq_mshr_miss_rate::total     0.052323                      
system.cpu.icache.demand_mshr_miss_rate::cpu.inst     0.052323                      
system.cpu.icache.demand_mshr_miss_rate::total     0.052323                      
system.cpu.icache.overall_mshr_miss_rate::cpu.inst     0.052323                      
system.cpu.icache.overall_mshr_miss_rate::total     0.052323                      
system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 58769.709544                      
system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 58769.709544                      
system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 58769.709544                      
system.cpu.icache.demand_avg_mshr_miss_latency::total 58769.709544                      
system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 58769.709544                      
system.cpu.icache.overall_avg_mshr_miss_latency::total 58769.709544                      
system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED     28648500                      
system.cpu.l2cache.tags.replacements                0                      
system.cpu.l2cache.tags.tagsinuse          180.559791                      
system.cpu.l2cache.tags.total_refs                 32                      
system.cpu.l2cache.tags.sampled_refs              350                      
system.cpu.l2cache.tags.avg_refs             0.091429                      
system.cpu.l2cache.tags.warmup_cycle                0                      
system.cpu.l2cache.tags.occ_blocks::cpu.inst   105.285464                      
system.cpu.l2cache.tags.occ_blocks::cpu.data    75.274327                      
system.cpu.l2cache.tags.occ_percent::cpu.inst     0.003213                      
system.cpu.l2cache.tags.occ_percent::cpu.data     0.002297                      
system.cpu.l2cache.tags.occ_percent::total     0.005510                      
system.cpu.l2cache.tags.occ_task_id_blocks::1024          350                      
system.cpu.l2cache.tags.age_task_id_blocks_1024::0          119                      
system.cpu.l2cache.tags.age_task_id_blocks_1024::1          231                      
system.cpu.l2cache.tags.occ_task_id_percent::1024     0.010681                      
system.cpu.l2cache.tags.tag_accesses             3406                      
system.cpu.l2cache.tags.data_accesses            3406                      
system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED     28648500                      
system.cpu.l2cache.ReadCleanReq_hits::cpu.inst           16                      
system.cpu.l2cache.ReadCleanReq_hits::total           16                      
system.cpu.l2cache.ReadSharedReq_hits::cpu.data           16                      
system.cpu.l2cache.ReadSharedReq_hits::total           16                      
system.cpu.l2cache.demand_hits::cpu.inst           16                      
system.cpu.l2cache.demand_hits::cpu.data           16                      
system.cpu.l2cache.demand_hits::total              32                      
system.cpu.l2cache.overall_hits::cpu.inst           16                      
system.cpu.l2cache.overall_hits::cpu.data           16                      
system.cpu.l2cache.overall_hits::total             32                      
system.cpu.l2cache.ReadExReq_misses::cpu.data           43                      
system.cpu.l2cache.ReadExReq_misses::total           43                      
system.cpu.l2cache.ReadCleanReq_misses::cpu.inst          225                      
system.cpu.l2cache.ReadCleanReq_misses::total          225                      
system.cpu.l2cache.ReadSharedReq_misses::cpu.data           82                      
system.cpu.l2cache.ReadSharedReq_misses::total           82                      
system.cpu.l2cache.demand_misses::cpu.inst          225                      
system.cpu.l2cache.demand_misses::cpu.data          125                      
system.cpu.l2cache.demand_misses::total           350                      
system.cpu.l2cache.overall_misses::cpu.inst          225                      
system.cpu.l2cache.overall_misses::cpu.data          125                      
system.cpu.l2cache.overall_misses::total          350                      
system.cpu.l2cache.ReadExReq_miss_latency::cpu.data      2601500                      
system.cpu.l2cache.ReadExReq_miss_latency::total      2601500                      
system.cpu.l2cache.ReadCleanReq_miss_latency::cpu.inst     13618000                      
system.cpu.l2cache.ReadCleanReq_miss_latency::total     13618000                      
system.cpu.l2cache.ReadSharedReq_miss_latency::cpu.data      4961000                      
system.cpu.l2cache.ReadSharedReq_miss_latency::total      4961000                      
system.cpu.l2cache.demand_miss_latency::cpu.inst     13618000                      
system.cpu.l2cache.demand_miss_latency::cpu.data      7562500                      
system.cpu.l2cache.demand_miss_latency::total     21180500                      
system.cpu.l2cache.overall_miss_latency::cpu.inst     13618000                      
system.cpu.l2cache.overall_miss_latency::cpu.data      7562500                      
system.cpu.l2cache.overall_miss_latency::total     21180500                      
system.cpu.l2cache.ReadExReq_accesses::cpu.data           43                      
system.cpu.l2cache.ReadExReq_accesses::total           43                      
system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst          241                      
system.cpu.l2cache.ReadCleanReq_accesses::total          241                      
system.cpu.l2cache.ReadSharedReq_accesses::cpu.data           98                      
system.cpu.l2cache.ReadSharedReq_accesses::total           98                      
system.cpu.l2cache.demand_accesses::cpu.inst          241                      
system.cpu.l2cache.demand_accesses::cpu.data          141                      
system.cpu.l2cache.demand_accesses::total          382                      
system.cpu.l2cache.overall_accesses::cpu.inst          241                      
system.cpu.l2cache.overall_accesses::cpu.data          141                      
system.cpu.l2cache.overall_accesses::total          382                      
system.cpu.l2cache.ReadExReq_miss_rate::cpu.data            1                      
system.cpu.l2cache.ReadExReq_miss_rate::total            1                      
system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst     0.933610                      
system.cpu.l2cache.ReadCleanReq_miss_rate::total     0.933610                      
system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data     0.836735                      
system.cpu.l2cache.ReadSharedReq_miss_rate::total     0.836735                      
system.cpu.l2cache.demand_miss_rate::cpu.inst     0.933610                      
system.cpu.l2cache.demand_miss_rate::cpu.data     0.886525                      
system.cpu.l2cache.demand_miss_rate::total     0.916230                      
system.cpu.l2cache.overall_miss_rate::cpu.inst     0.933610                      
system.cpu.l2cache.overall_miss_rate::cpu.data     0.886525                      
system.cpu.l2cache.overall_miss_rate::total     0.916230                      
system.cpu.l2cache.ReadExReq_avg_miss_latency::cpu.data        60500                      
system.cpu.l2cache.ReadExReq_avg_miss_latency::total        60500                      
system.cpu.l2cache.ReadCleanReq_avg_miss_latency::cpu.inst 60524.444444                      
system.cpu.l2cache.ReadCleanReq_avg_miss_latency::total 60524.444444                      
system.cpu.l2cache.ReadSharedReq_avg_miss_latency::cpu.data        60500                      
system.cpu.l2cache.ReadSharedReq_avg_miss_latency::total        60500                      
system.cpu.l2cache.demand_avg_miss_latency::cpu.inst 60524.444444                      
system.cpu.l2cache.demand_avg_miss_latency::cpu.data        60500                      
system.cpu.l2cache.demand_avg_miss_latency::total 60515.714286                      
system.cpu.l2cache.overall_avg_miss_latency::cpu.inst 60524.444444                      
system.cpu.l2cache.overall_avg_miss_latency::cpu.data        60500                      
system.cpu.l2cache.overall_avg_miss_latency::total 60515.714286                      
system.cpu.l2cache.blocked_cycles::no_mshrs            0                      
system.cpu.l2cache.blocked_cycles::no_targets            0                      
system.cpu.l2cache.blocked::no_mshrs                0                      
system.cpu.l2cache.blocked::no_targets              0                      
system.cpu.l2cache.avg_blocked_cycles::no_mshrs          nan                      
system.cpu.l2cache.avg_blocked_cycles::no_targets          nan                      
system.cpu.l2cache.ReadExReq_mshr_misses::cpu.data           43                      
system.cpu.l2cache.ReadExReq_mshr_misses::total           43                      
system.cpu.l2cache.ReadCleanReq_mshr_misses::cpu.inst          225                      
system.cpu.l2cache.ReadCleanReq_mshr_misses::total          225                      
system.cpu.l2cache.ReadSharedReq_mshr_misses::cpu.data           82                      
system.cpu.l2cache.ReadSharedReq_mshr_misses::total           82                      
system.cpu.l2cache.demand_mshr_misses::cpu.inst          225                      
system.cpu.l2cache.demand_mshr_misses::cpu.data          125                      
system.cpu.l2cache.demand_mshr_misses::total          350                      
system.cpu.l2cache.overall_mshr_misses::cpu.inst          225                      
system.cpu.l2cache.overall_mshr_misses::cpu.data          125                      
system.cpu.l2cache.overall_mshr_misses::total          350                      
system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data      2171500                      
system.cpu.l2cache.ReadExReq_mshr_miss_latency::total      2171500                      
system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::cpu.inst     11368000                      
system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::total     11368000                      
system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::cpu.data      4141000                      
system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::total      4141000                      
system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst     11368000                      
system.cpu.l2cache.demand_mshr_miss_latency::cpu.data      6312500                      
system.cpu.l2cache.demand_mshr_miss_latency::total     17680500                      
system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst     11368000                      
system.cpu.l2cache.overall_mshr_miss_latency::cpu.data      6312500                      
system.cpu.l2cache.overall_mshr_miss_latency::total     17680500                      
system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data            1                      
system.cpu.l2cache.ReadExReq_mshr_miss_rate::total            1                      
system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::cpu.inst     0.933610                      
system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::total     0.933610                      
system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.data     0.836735                      
system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::total     0.836735                      
system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst     0.933610                      
system.cpu.l2cache.demand_mshr_miss_rate::cpu.data     0.886525                      
system.cpu.l2cache.demand_mshr_miss_rate::total     0.916230                      
system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst     0.933610                      
system.cpu.l2cache.overall_mshr_miss_rate::cpu.data     0.886525                      
system.cpu.l2cache.overall_mshr_miss_rate::total     0.916230                      
system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data        50500                      
system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total        50500                      
system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 50524.444444                      
system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 50524.444444                      
system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data        50500                      
system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total        50500                      
system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 50524.444444                      
system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data        50500                      
system.cpu.l2cache.demand_avg_mshr_miss_latency::total 50515.714286                      
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 50524.444444                      
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data        50500                      
system.cpu.l2cache.overall_avg_mshr_miss_latency::total 50515.714286                      
system.cpu.toL2Bus.snoop_filter.tot_requests          383                      
system.cpu.toL2Bus.snoop_filter.hit_single_requests           32                      
system.cpu.toL2Bus.snoop_filter.hit_multi_requests            1                      
system.cpu.toL2Bus.snoop_filter.tot_snoops            0                      
system.cpu.toL2Bus.snoop_filter.hit_single_snoops            0                      
system.cpu.toL2Bus.snoop_filter.hit_multi_snoops            0                      
system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED     28648500                      
system.cpu.toL2Bus.trans_dist::ReadResp           339                      
system.cpu.toL2Bus.trans_dist::WritebackClean            1                      
system.cpu.toL2Bus.trans_dist::ReadExReq           43                      
system.cpu.toL2Bus.trans_dist::ReadExResp           43                      
system.cpu.toL2Bus.trans_dist::ReadCleanReq          241                      
system.cpu.toL2Bus.trans_dist::ReadSharedReq           98                      
system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side          483                      
system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side          282                      
system.cpu.toL2Bus.pkt_count::total               765                      
system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side        15488                      
system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side         9024                      
system.cpu.toL2Bus.pkt_size::total              24512                      
system.cpu.toL2Bus.snoops                           0                      
system.cpu.toL2Bus.snoopTraffic                     0                      
system.cpu.toL2Bus.snoop_fanout::samples          382                      
system.cpu.toL2Bus.snoop_fanout::mean        0.083770                      
system.cpu.toL2Bus.snoop_fanout::stdev       0.277405                      
system.cpu.toL2Bus.snoop_fanout::underflows            0      0.00%      0.00%
system.cpu.toL2Bus.snoop_fanout::0                350     91.62%     91.62%
system.cpu.toL2Bus.snoop_fanout::1                 32      8.38%    100.00%
system.cpu.toL2Bus.snoop_fanout::2                  0      0.00%    100.00%
system.cpu.toL2Bus.snoop_fanout::overflows            0      0.00%    100.00%
system.cpu.toL2Bus.snoop_fanout::min_value            0                      
system.cpu.toL2Bus.snoop_fanout::max_value            1                      
system.cpu.toL2Bus.snoop_fanout::total            382                      
system.cpu.toL2Bus.reqLayer0.occupancy         192500                      
system.cpu.toL2Bus.reqLayer0.utilization          0.7                      
system.cpu.toL2Bus.respLayer0.occupancy        361500                      
system.cpu.toL2Bus.respLayer0.utilization          1.3                      
system.cpu.toL2Bus.respLayer1.occupancy        211500                      
system.cpu.toL2Bus.respLayer1.utilization          0.7                      
system.membus.snoop_filter.tot_requests           350                      
system.membus.snoop_filter.hit_single_requests            0                      
system.membus.snoop_filter.hit_multi_requests            0                      
system.membus.snoop_filter.tot_snoops               0                      
system.membus.snoop_filter.hit_single_snoops            0                      
system.membus.snoop_filter.hit_multi_snoops            0                      
system.membus.pwrStateResidencyTicks::UNDEFINED     28648500                      
system.membus.trans_dist::ReadResp                307                      
system.membus.trans_dist::ReadExReq                43                      
system.membus.trans_dist::ReadExResp               43                      
system.membus.trans_dist::ReadSharedReq           307                      
system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port          700                      
system.membus.pkt_count::total                    700                      
system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port        22400                      
system.membus.pkt_size::total                   22400                      
system.membus.snoops                                0                      
system.membus.snoopTraffic                          0                      
system.membus.snoop_fanout::samples               350                      
system.membus.snoop_fanout::mean                    0                      
system.membus.snoop_fanout::stdev                   0                      
system.membus.snoop_fanout::underflows              0      0.00%      0.00%
system.membus.snoop_fanout::0                     350    100.00%    100.00%
system.membus.snoop_fanout::1                       0      0.00%    100.00%
system.membus.snoop_fanout::overflows               0      0.00%    100.00%
system.membus.snoop_fanout::min_value               0                      
system.membus.snoop_fanout::max_value               0                      
system.membus.snoop_fanout::total                 350                      
system.membus.reqLayer0.occupancy              355500                      
system.membus.reqLayer0.utilization               1.2                      
system.membus.respLayer1.occupancy            1750000                      
system.membus.respLayer1.utilization              6.1                      

---------- End Simulation Statistics   ----------