1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxAlphaSystem 13children=bridge clk_domain cpu cpu_clk_domain disk0 disk2 dvfs_handler intrctrl iobus iocache membus physmem simple_disk terminal tsunami voltage_domain 14boot_cpu_frequency=500 15boot_osflags=root=/dev/hda1 console=ttyS0 16cache_line_size=64 17clk_domain=system.clk_domain 18console=/arm/projectscratch/randd/systems/dist/binaries/console 19default_p_state=UNDEFINED 20eventq_index=0 21exit_on_work_items=false 22init_param=0 23kernel=/arm/projectscratch/randd/systems/dist/binaries/vmlinux 24kernel_addr_check=true 25load_addr_mask=1099511627775 26load_offset=0 27mem_mode=timing 28mem_ranges=0:134217727:0:0:0:0 29memories=system.physmem 30mmap_using_noreserve=false 31multi_thread=false 32num_work_ids=16 33p_state_clk_gate_bins=20 34p_state_clk_gate_max=1000000000000 35p_state_clk_gate_min=1000 36pal=/arm/projectscratch/randd/systems/dist/binaries/ts_osfpal 37power_model=Null 38readfile=/work/curdun01/gem5-external.hg/tests/testing/../halt.sh 39symbolfile= 40system_rev=1024 41system_type=34 42thermal_components= 43thermal_model=Null 44work_begin_ckpt_count=0 45work_begin_cpu_id_exit=-1 46work_begin_exit_count=0 47work_cpus_ckpt_count=0 48work_end_ckpt_count=0 49work_end_exit_count=0 50work_item_id=-1 51system_port=system.membus.slave[0] 52 53[system.bridge] 54type=Bridge 55clk_domain=system.clk_domain 56default_p_state=UNDEFINED 57delay=50000 58eventq_index=0 59p_state_clk_gate_bins=20 60p_state_clk_gate_max=1000000000000 61p_state_clk_gate_min=1000 62power_model=Null 63ranges=8796093022208:18446744073709551615:0:0:0:0 64req_size=16 65resp_size=16 66master=system.iobus.slave[0] 67slave=system.membus.master[0] 68 69[system.clk_domain] 70type=SrcClockDomain 71clock=1000 72domain_id=-1 73eventq_index=0 74init_perf_level=0 75voltage_domain=system.voltage_domain 76 77[system.cpu] 78type=TimingSimpleCPU 79children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer 80branchPred=Null 81checker=Null 82clk_domain=system.cpu_clk_domain 83cpu_id=0 84default_p_state=UNDEFINED 85do_checkpoint_insts=true 86do_quiesce=true 87do_statistics_insts=true 88dtb=system.cpu.dtb 89eventq_index=0 90function_trace=false 91function_trace_start=0 92interrupts=system.cpu.interrupts 93isa=system.cpu.isa 94itb=system.cpu.itb 95max_insts_all_threads=0 96max_insts_any_thread=0 97max_loads_all_threads=0 98max_loads_any_thread=0 99numThreads=1 100p_state_clk_gate_bins=20 101p_state_clk_gate_max=1000000000000 102p_state_clk_gate_min=1000 103power_model=Null 104profile=0 105progress_interval=0 106simpoint_start_insts= 107socket_id=0 108switched_out=false 109system=system 110tracer=system.cpu.tracer 111workload= 112dcache_port=system.cpu.dcache.cpu_side 113icache_port=system.cpu.icache.cpu_side 114 115[system.cpu.dcache] 116type=Cache 117children=tags 118addr_ranges=0:18446744073709551615:0:0:0:0 119assoc=4 120clk_domain=system.cpu_clk_domain 121clusivity=mostly_incl 122default_p_state=UNDEFINED 123demand_mshr_reserve=1 124eventq_index=0 125hit_latency=2 126is_read_only=false 127max_miss_count=0 128mshrs=4 129p_state_clk_gate_bins=20 130p_state_clk_gate_max=1000000000000 131p_state_clk_gate_min=1000 132power_model=Null 133prefetch_on_access=false 134prefetcher=Null 135response_latency=2 136sequential_access=false 137size=32768 138system=system 139tags=system.cpu.dcache.tags 140tgts_per_mshr=20 141write_buffers=8 142writeback_clean=false 143cpu_side=system.cpu.dcache_port 144mem_side=system.cpu.toL2Bus.slave[1] 145 146[system.cpu.dcache.tags] 147type=LRU 148assoc=4 149block_size=64 150clk_domain=system.cpu_clk_domain 151default_p_state=UNDEFINED 152eventq_index=0 153hit_latency=2 154p_state_clk_gate_bins=20 155p_state_clk_gate_max=1000000000000 156p_state_clk_gate_min=1000 157power_model=Null 158sequential_access=false 159size=32768 160 161[system.cpu.dtb] 162type=AlphaTLB 163eventq_index=0 164size=64 165 166[system.cpu.icache] 167type=Cache 168children=tags 169addr_ranges=0:18446744073709551615:0:0:0:0 170assoc=1 171clk_domain=system.cpu_clk_domain 172clusivity=mostly_incl 173default_p_state=UNDEFINED 174demand_mshr_reserve=1 175eventq_index=0 176hit_latency=2 177is_read_only=true 178max_miss_count=0 179mshrs=4 180p_state_clk_gate_bins=20 181p_state_clk_gate_max=1000000000000 182p_state_clk_gate_min=1000 183power_model=Null 184prefetch_on_access=false 185prefetcher=Null 186response_latency=2 187sequential_access=false 188size=32768 189system=system 190tags=system.cpu.icache.tags 191tgts_per_mshr=20 192write_buffers=8 193writeback_clean=true 194cpu_side=system.cpu.icache_port 195mem_side=system.cpu.toL2Bus.slave[0] 196 197[system.cpu.icache.tags] 198type=LRU 199assoc=1 200block_size=64 201clk_domain=system.cpu_clk_domain 202default_p_state=UNDEFINED 203eventq_index=0 204hit_latency=2 205p_state_clk_gate_bins=20 206p_state_clk_gate_max=1000000000000 207p_state_clk_gate_min=1000 208power_model=Null 209sequential_access=false 210size=32768 211 212[system.cpu.interrupts] 213type=AlphaInterrupts 214eventq_index=0 215 216[system.cpu.isa] 217type=AlphaISA 218eventq_index=0 219system=system 220 221[system.cpu.itb] 222type=AlphaTLB 223eventq_index=0 224size=48 225 226[system.cpu.l2cache] 227type=Cache 228children=tags 229addr_ranges=0:18446744073709551615:0:0:0:0 230assoc=8 231clk_domain=system.cpu_clk_domain 232clusivity=mostly_incl 233default_p_state=UNDEFINED 234demand_mshr_reserve=1 235eventq_index=0 236hit_latency=20 237is_read_only=false 238max_miss_count=0 239mshrs=20 240p_state_clk_gate_bins=20 241p_state_clk_gate_max=1000000000000 242p_state_clk_gate_min=1000 243power_model=Null 244prefetch_on_access=false 245prefetcher=Null 246response_latency=20 247sequential_access=false 248size=4194304 249system=system 250tags=system.cpu.l2cache.tags 251tgts_per_mshr=12 252write_buffers=8 253writeback_clean=false 254cpu_side=system.cpu.toL2Bus.master[0] 255mem_side=system.membus.slave[1] 256 257[system.cpu.l2cache.tags] 258type=LRU 259assoc=8 260block_size=64 261clk_domain=system.cpu_clk_domain 262default_p_state=UNDEFINED 263eventq_index=0 264hit_latency=20 265p_state_clk_gate_bins=20 266p_state_clk_gate_max=1000000000000 267p_state_clk_gate_min=1000 268power_model=Null 269sequential_access=false 270size=4194304 271 272[system.cpu.toL2Bus] 273type=CoherentXBar 274children=snoop_filter 275clk_domain=system.cpu_clk_domain 276default_p_state=UNDEFINED 277eventq_index=0 278forward_latency=0 279frontend_latency=1 280p_state_clk_gate_bins=20 281p_state_clk_gate_max=1000000000000 282p_state_clk_gate_min=1000 283point_of_coherency=false 284power_model=Null 285response_latency=1 286snoop_filter=system.cpu.toL2Bus.snoop_filter 287snoop_response_latency=1 288system=system 289use_default_range=false 290width=32 291master=system.cpu.l2cache.cpu_side 292slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 293 294[system.cpu.toL2Bus.snoop_filter] 295type=SnoopFilter 296eventq_index=0 297lookup_latency=0 298max_capacity=8388608 299system=system 300 301[system.cpu.tracer] 302type=ExeTracer 303eventq_index=0 304 305[system.cpu_clk_domain] 306type=SrcClockDomain 307clock=500 308domain_id=-1 309eventq_index=0 310init_perf_level=0 311voltage_domain=system.voltage_domain 312 313[system.disk0] 314type=IdeDisk 315children=image 316delay=1000000 317driveID=master 318eventq_index=0 319image=system.disk0.image 320 321[system.disk0.image] 322type=CowDiskImage 323children=child 324child=system.disk0.image.child 325eventq_index=0 326image_file= 327read_only=false 328table_size=65536 329 330[system.disk0.image.child] 331type=RawDiskImage 332eventq_index=0 333image_file=/arm/projectscratch/randd/systems/dist/disks/linux-latest.img 334read_only=true 335 336[system.disk2] 337type=IdeDisk 338children=image 339delay=1000000 340driveID=master 341eventq_index=0 342image=system.disk2.image 343 344[system.disk2.image] 345type=CowDiskImage 346children=child 347child=system.disk2.image.child 348eventq_index=0 349image_file= 350read_only=false 351table_size=65536 352 353[system.disk2.image.child] 354type=RawDiskImage 355eventq_index=0 356image_file=/arm/projectscratch/randd/systems/dist/disks/linux-bigswap2.img 357read_only=true 358 359[system.dvfs_handler] 360type=DVFSHandler 361domains= 362enable=false 363eventq_index=0 364sys_clk_domain=system.clk_domain 365transition_latency=100000000 366 367[system.intrctrl] 368type=IntrControl 369eventq_index=0 370sys=system 371 372[system.iobus] 373type=NoncoherentXBar 374clk_domain=system.clk_domain 375default_p_state=UNDEFINED 376eventq_index=0 377forward_latency=1 378frontend_latency=2 379p_state_clk_gate_bins=20 380p_state_clk_gate_max=1000000000000 381p_state_clk_gate_min=1000 382power_model=Null 383response_latency=2 384use_default_range=false 385width=16 386master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side 387slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma 388 389[system.iocache] 390type=Cache 391children=tags 392addr_ranges=0:134217727:0:0:0:0 393assoc=8 394clk_domain=system.clk_domain 395clusivity=mostly_incl 396default_p_state=UNDEFINED 397demand_mshr_reserve=1 398eventq_index=0 399hit_latency=50 400is_read_only=false 401max_miss_count=0 402mshrs=20 403p_state_clk_gate_bins=20 404p_state_clk_gate_max=1000000000000 405p_state_clk_gate_min=1000 406power_model=Null 407prefetch_on_access=false 408prefetcher=Null 409response_latency=50 410sequential_access=false 411size=1024 412system=system 413tags=system.iocache.tags 414tgts_per_mshr=12 415write_buffers=8 416writeback_clean=false 417cpu_side=system.iobus.master[27] 418mem_side=system.membus.slave[2] 419 420[system.iocache.tags] 421type=LRU 422assoc=8 423block_size=64 424clk_domain=system.clk_domain 425default_p_state=UNDEFINED 426eventq_index=0 427hit_latency=50 428p_state_clk_gate_bins=20 429p_state_clk_gate_max=1000000000000 430p_state_clk_gate_min=1000 431power_model=Null 432sequential_access=false 433size=1024 434 435[system.membus] 436type=CoherentXBar 437children=badaddr_responder snoop_filter 438clk_domain=system.clk_domain 439default_p_state=UNDEFINED 440eventq_index=0 441forward_latency=4 442frontend_latency=3 443p_state_clk_gate_bins=20 444p_state_clk_gate_max=1000000000000 445p_state_clk_gate_min=1000 446point_of_coherency=true 447power_model=Null 448response_latency=2 449snoop_filter=system.membus.snoop_filter 450snoop_response_latency=4 451system=system 452use_default_range=false 453width=16 454default=system.membus.badaddr_responder.pio 455master=system.bridge.slave system.physmem.port 456slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side 457 458[system.membus.badaddr_responder] 459type=IsaFake 460clk_domain=system.clk_domain 461default_p_state=UNDEFINED 462eventq_index=0 463fake_mem=false 464p_state_clk_gate_bins=20 465p_state_clk_gate_max=1000000000000 466p_state_clk_gate_min=1000 467pio_addr=0 468pio_latency=100000 469pio_size=8 470power_model=Null 471ret_bad_addr=true 472ret_data16=65535 473ret_data32=4294967295 474ret_data64=18446744073709551615 475ret_data8=255 476system=system 477update_data=false 478warn_access= 479pio=system.membus.default 480 481[system.membus.snoop_filter] 482type=SnoopFilter 483eventq_index=0 484lookup_latency=1 485max_capacity=8388608 486system=system 487 488[system.physmem] 489type=DRAMCtrl 490IDD0=0.055000 491IDD02=0.000000 492IDD2N=0.032000 493IDD2N2=0.000000 494IDD2P0=0.000000 495IDD2P02=0.000000 496IDD2P1=0.032000 497IDD2P12=0.000000 498IDD3N=0.038000 499IDD3N2=0.000000 500IDD3P0=0.000000 501IDD3P02=0.000000 502IDD3P1=0.038000 503IDD3P12=0.000000 504IDD4R=0.157000 505IDD4R2=0.000000 506IDD4W=0.125000 507IDD4W2=0.000000 508IDD5=0.235000 509IDD52=0.000000 510IDD6=0.020000 511IDD62=0.000000 512VDD=1.500000 513VDD2=0.000000 514activation_limit=4 515addr_mapping=RoRaBaCoCh 516bank_groups_per_rank=0 517banks_per_rank=8 518burst_length=8 519channels=1 520clk_domain=system.clk_domain 521conf_table_reported=true 522default_p_state=UNDEFINED 523device_bus_width=8 524device_rowbuffer_size=1024 525device_size=536870912 526devices_per_rank=8 527dll=true 528eventq_index=0 529in_addr_map=true 530kvm_map=true 531max_accesses_per_row=16 532mem_sched_policy=frfcfs 533min_writes_per_switch=16 534null=false 535p_state_clk_gate_bins=20 536p_state_clk_gate_max=1000000000000 537p_state_clk_gate_min=1000 538page_policy=open_adaptive 539power_model=Null 540range=0:134217727:0:0:0:0 541ranks_per_channel=2 542read_buffer_size=32 543static_backend_latency=10000 544static_frontend_latency=10000 545tBURST=5000 546tCCD_L=0 547tCK=1250 548tCL=13750 549tCS=2500 550tRAS=35000 551tRCD=13750 552tREFI=7800000 553tRFC=260000 554tRP=13750 555tRRD=6000 556tRRD_L=0 557tRTP=7500 558tRTW=2500 559tWR=15000 560tWTR=7500 561tXAW=30000 562tXP=6000 563tXPDLL=0 564tXS=270000 565tXSDLL=0 566write_buffer_size=64 567write_high_thresh_perc=85 568write_low_thresh_perc=50 569port=system.membus.master[1] 570 571[system.simple_disk] 572type=SimpleDisk 573children=disk 574disk=system.simple_disk.disk 575eventq_index=0 576system=system 577 578[system.simple_disk.disk] 579type=RawDiskImage 580eventq_index=0 581image_file=/arm/projectscratch/randd/systems/dist/disks/linux-latest.img 582read_only=true 583 584[system.terminal] 585type=Terminal 586eventq_index=0 587intr_control=system.intrctrl 588number=0 589output=true 590port=3456 591 592[system.tsunami] 593type=Tsunami 594children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip uart 595eventq_index=0 596intrctrl=system.intrctrl 597system=system 598 599[system.tsunami.backdoor] 600type=AlphaBackdoor 601clk_domain=system.clk_domain 602cpu=system.cpu 603default_p_state=UNDEFINED 604disk=system.simple_disk 605eventq_index=0 606p_state_clk_gate_bins=20 607p_state_clk_gate_max=1000000000000 608p_state_clk_gate_min=1000 609pio_addr=8804682956800 610pio_latency=100000 611platform=system.tsunami 612power_model=Null 613system=system 614terminal=system.terminal 615pio=system.iobus.master[24] 616 617[system.tsunami.cchip] 618type=TsunamiCChip 619clk_domain=system.clk_domain 620default_p_state=UNDEFINED 621eventq_index=0 622p_state_clk_gate_bins=20 623p_state_clk_gate_max=1000000000000 624p_state_clk_gate_min=1000 625pio_addr=8803072344064 626pio_latency=100000 627power_model=Null 628system=system 629tsunami=system.tsunami 630pio=system.iobus.master[0] 631 632[system.tsunami.ethernet] 633type=NSGigE 634BAR0=1 635BAR0LegacyIO=false 636BAR0Size=256 637BAR1=0 638BAR1LegacyIO=false 639BAR1Size=4096 640BAR2=0 641BAR2LegacyIO=false 642BAR2Size=0 643BAR3=0 644BAR3LegacyIO=false 645BAR3Size=0 646BAR4=0 647BAR4LegacyIO=false 648BAR4Size=0 649BAR5=0 650BAR5LegacyIO=false 651BAR5Size=0 652BIST=0 653CacheLineSize=0 654CapabilityPtr=0 655CardbusCIS=0 656ClassCode=2 657Command=0 658DeviceID=34 659ExpansionROM=0 660HeaderType=0 661InterruptLine=30 662InterruptPin=1 663LatencyTimer=0 664LegacyIOBase=0 665MSICAPBaseOffset=0 666MSICAPCapId=0 667MSICAPMaskBits=0 668MSICAPMsgAddr=0 669MSICAPMsgCtrl=0 670MSICAPMsgData=0 671MSICAPMsgUpperAddr=0 672MSICAPNextCapability=0 673MSICAPPendingBits=0 674MSIXCAPBaseOffset=0 675MSIXCAPCapId=0 676MSIXCAPNextCapability=0 677MSIXMsgCtrl=0 678MSIXPbaOffset=0 679MSIXTableOffset=0 680MaximumLatency=52 681MinimumGrant=176 682PMCAPBaseOffset=0 683PMCAPCapId=0 684PMCAPCapabilities=0 685PMCAPCtrlStatus=0 686PMCAPNextCapability=0 687PXCAPBaseOffset=0 688PXCAPCapId=0 689PXCAPCapabilities=0 690PXCAPDevCap2=0 691PXCAPDevCapabilities=0 692PXCAPDevCtrl=0 693PXCAPDevCtrl2=0 694PXCAPDevStatus=0 695PXCAPLinkCap=0 696PXCAPLinkCtrl=0 697PXCAPLinkStatus=0 698PXCAPNextCapability=0 699ProgIF=0 700Revision=0 701Status=656 702SubClassCode=0 703SubsystemID=0 704SubsystemVendorID=0 705VendorID=4107 706clk_domain=system.clk_domain 707config_latency=20000 708default_p_state=UNDEFINED 709dma_data_free=false 710dma_desc_free=false 711dma_no_allocate=true 712dma_read_delay=0 713dma_read_factor=0 714dma_write_delay=0 715dma_write_factor=0 716eventq_index=0 717hardware_address=00:90:00:00:00:01 718host=system.tsunami.pchip 719intr_delay=10000000 720p_state_clk_gate_bins=20 721p_state_clk_gate_max=1000000000000 722p_state_clk_gate_min=1000 723pci_bus=0 724pci_dev=1 725pci_func=0 726pio_latency=30000 727power_model=Null 728rss=false 729rx_delay=1000000 730rx_fifo_size=524288 731rx_filter=true 732rx_thread=false 733system=system 734tx_delay=1000000 735tx_fifo_size=524288 736tx_thread=false 737dma=system.iobus.slave[2] 738pio=system.iobus.master[26] 739 740[system.tsunami.fake_OROM] 741type=IsaFake 742clk_domain=system.clk_domain 743default_p_state=UNDEFINED 744eventq_index=0 745fake_mem=false 746p_state_clk_gate_bins=20 747p_state_clk_gate_max=1000000000000 748p_state_clk_gate_min=1000 749pio_addr=8796093677568 750pio_latency=100000 751pio_size=393216 752power_model=Null 753ret_bad_addr=false 754ret_data16=65535 755ret_data32=4294967295 756ret_data64=18446744073709551615 757ret_data8=255 758system=system 759update_data=false 760warn_access= 761pio=system.iobus.master[8] 762 763[system.tsunami.fake_ata0] 764type=IsaFake 765clk_domain=system.clk_domain 766default_p_state=UNDEFINED 767eventq_index=0 768fake_mem=false 769p_state_clk_gate_bins=20 770p_state_clk_gate_max=1000000000000 771p_state_clk_gate_min=1000 772pio_addr=8804615848432 773pio_latency=100000 774pio_size=8 775power_model=Null 776ret_bad_addr=false 777ret_data16=65535 778ret_data32=4294967295 779ret_data64=18446744073709551615 780ret_data8=255 781system=system 782update_data=false 783warn_access= 784pio=system.iobus.master[19] 785 786[system.tsunami.fake_ata1] 787type=IsaFake 788clk_domain=system.clk_domain 789default_p_state=UNDEFINED 790eventq_index=0 791fake_mem=false 792p_state_clk_gate_bins=20 793p_state_clk_gate_max=1000000000000 794p_state_clk_gate_min=1000 795pio_addr=8804615848304 796pio_latency=100000 797pio_size=8 798power_model=Null 799ret_bad_addr=false 800ret_data16=65535 801ret_data32=4294967295 802ret_data64=18446744073709551615 803ret_data8=255 804system=system 805update_data=false 806warn_access= 807pio=system.iobus.master[20] 808 809[system.tsunami.fake_pnp_addr] 810type=IsaFake 811clk_domain=system.clk_domain 812default_p_state=UNDEFINED 813eventq_index=0 814fake_mem=false 815p_state_clk_gate_bins=20 816p_state_clk_gate_max=1000000000000 817p_state_clk_gate_min=1000 818pio_addr=8804615848569 819pio_latency=100000 820pio_size=8 821power_model=Null 822ret_bad_addr=false 823ret_data16=65535 824ret_data32=4294967295 825ret_data64=18446744073709551615 826ret_data8=255 827system=system 828update_data=false 829warn_access= 830pio=system.iobus.master[9] 831 832[system.tsunami.fake_pnp_read0] 833type=IsaFake 834clk_domain=system.clk_domain 835default_p_state=UNDEFINED 836eventq_index=0 837fake_mem=false 838p_state_clk_gate_bins=20 839p_state_clk_gate_max=1000000000000 840p_state_clk_gate_min=1000 841pio_addr=8804615848451 842pio_latency=100000 843pio_size=8 844power_model=Null 845ret_bad_addr=false 846ret_data16=65535 847ret_data32=4294967295 848ret_data64=18446744073709551615 849ret_data8=255 850system=system 851update_data=false 852warn_access= 853pio=system.iobus.master[11] 854 855[system.tsunami.fake_pnp_read1] 856type=IsaFake 857clk_domain=system.clk_domain 858default_p_state=UNDEFINED 859eventq_index=0 860fake_mem=false 861p_state_clk_gate_bins=20 862p_state_clk_gate_max=1000000000000 863p_state_clk_gate_min=1000 864pio_addr=8804615848515 865pio_latency=100000 866pio_size=8 867power_model=Null 868ret_bad_addr=false 869ret_data16=65535 870ret_data32=4294967295 871ret_data64=18446744073709551615 872ret_data8=255 873system=system 874update_data=false 875warn_access= 876pio=system.iobus.master[12] 877 878[system.tsunami.fake_pnp_read2] 879type=IsaFake 880clk_domain=system.clk_domain 881default_p_state=UNDEFINED 882eventq_index=0 883fake_mem=false 884p_state_clk_gate_bins=20 885p_state_clk_gate_max=1000000000000 886p_state_clk_gate_min=1000 887pio_addr=8804615848579 888pio_latency=100000 889pio_size=8 890power_model=Null 891ret_bad_addr=false 892ret_data16=65535 893ret_data32=4294967295 894ret_data64=18446744073709551615 895ret_data8=255 896system=system 897update_data=false 898warn_access= 899pio=system.iobus.master[13] 900 901[system.tsunami.fake_pnp_read3] 902type=IsaFake 903clk_domain=system.clk_domain 904default_p_state=UNDEFINED 905eventq_index=0 906fake_mem=false 907p_state_clk_gate_bins=20 908p_state_clk_gate_max=1000000000000 909p_state_clk_gate_min=1000 910pio_addr=8804615848643 911pio_latency=100000 912pio_size=8 913power_model=Null 914ret_bad_addr=false 915ret_data16=65535 916ret_data32=4294967295 917ret_data64=18446744073709551615 918ret_data8=255 919system=system 920update_data=false 921warn_access= 922pio=system.iobus.master[14] 923 924[system.tsunami.fake_pnp_read4] 925type=IsaFake 926clk_domain=system.clk_domain 927default_p_state=UNDEFINED 928eventq_index=0 929fake_mem=false 930p_state_clk_gate_bins=20 931p_state_clk_gate_max=1000000000000 932p_state_clk_gate_min=1000 933pio_addr=8804615848707 934pio_latency=100000 935pio_size=8 936power_model=Null 937ret_bad_addr=false 938ret_data16=65535 939ret_data32=4294967295 940ret_data64=18446744073709551615 941ret_data8=255 942system=system 943update_data=false 944warn_access= 945pio=system.iobus.master[15] 946 947[system.tsunami.fake_pnp_read5] 948type=IsaFake 949clk_domain=system.clk_domain 950default_p_state=UNDEFINED 951eventq_index=0 952fake_mem=false 953p_state_clk_gate_bins=20 954p_state_clk_gate_max=1000000000000 955p_state_clk_gate_min=1000 956pio_addr=8804615848771 957pio_latency=100000 958pio_size=8 959power_model=Null 960ret_bad_addr=false 961ret_data16=65535 962ret_data32=4294967295 963ret_data64=18446744073709551615 964ret_data8=255 965system=system 966update_data=false 967warn_access= 968pio=system.iobus.master[16] 969 970[system.tsunami.fake_pnp_read6] 971type=IsaFake 972clk_domain=system.clk_domain 973default_p_state=UNDEFINED 974eventq_index=0 975fake_mem=false 976p_state_clk_gate_bins=20 977p_state_clk_gate_max=1000000000000 978p_state_clk_gate_min=1000 979pio_addr=8804615848835 980pio_latency=100000 981pio_size=8 982power_model=Null 983ret_bad_addr=false 984ret_data16=65535 985ret_data32=4294967295 986ret_data64=18446744073709551615 987ret_data8=255 988system=system 989update_data=false 990warn_access= 991pio=system.iobus.master[17] 992 993[system.tsunami.fake_pnp_read7] 994type=IsaFake 995clk_domain=system.clk_domain 996default_p_state=UNDEFINED 997eventq_index=0 998fake_mem=false 999p_state_clk_gate_bins=20 1000p_state_clk_gate_max=1000000000000 1001p_state_clk_gate_min=1000 1002pio_addr=8804615848899 1003pio_latency=100000 1004pio_size=8 1005power_model=Null 1006ret_bad_addr=false 1007ret_data16=65535 1008ret_data32=4294967295 1009ret_data64=18446744073709551615 1010ret_data8=255 1011system=system 1012update_data=false 1013warn_access= 1014pio=system.iobus.master[18] 1015 1016[system.tsunami.fake_pnp_write] 1017type=IsaFake 1018clk_domain=system.clk_domain 1019default_p_state=UNDEFINED 1020eventq_index=0 1021fake_mem=false 1022p_state_clk_gate_bins=20 1023p_state_clk_gate_max=1000000000000 1024p_state_clk_gate_min=1000 1025pio_addr=8804615850617 1026pio_latency=100000 1027pio_size=8 1028power_model=Null 1029ret_bad_addr=false 1030ret_data16=65535 1031ret_data32=4294967295 1032ret_data64=18446744073709551615 1033ret_data8=255 1034system=system 1035update_data=false 1036warn_access= 1037pio=system.iobus.master[10] 1038 1039[system.tsunami.fake_ppc] 1040type=IsaFake 1041clk_domain=system.clk_domain 1042default_p_state=UNDEFINED 1043eventq_index=0 1044fake_mem=false 1045p_state_clk_gate_bins=20 1046p_state_clk_gate_max=1000000000000 1047p_state_clk_gate_min=1000 1048pio_addr=8804615848891 1049pio_latency=100000 1050pio_size=8 1051power_model=Null 1052ret_bad_addr=false 1053ret_data16=65535 1054ret_data32=4294967295 1055ret_data64=18446744073709551615 1056ret_data8=255 1057system=system 1058update_data=false 1059warn_access= 1060pio=system.iobus.master[7] 1061 1062[system.tsunami.fake_sm_chip] 1063type=IsaFake 1064clk_domain=system.clk_domain 1065default_p_state=UNDEFINED 1066eventq_index=0 1067fake_mem=false 1068p_state_clk_gate_bins=20 1069p_state_clk_gate_max=1000000000000 1070p_state_clk_gate_min=1000 1071pio_addr=8804615848816 1072pio_latency=100000 1073pio_size=8 1074power_model=Null 1075ret_bad_addr=false 1076ret_data16=65535 1077ret_data32=4294967295 1078ret_data64=18446744073709551615 1079ret_data8=255 1080system=system 1081update_data=false 1082warn_access= 1083pio=system.iobus.master[2] 1084 1085[system.tsunami.fake_uart1] 1086type=IsaFake 1087clk_domain=system.clk_domain 1088default_p_state=UNDEFINED 1089eventq_index=0 1090fake_mem=false 1091p_state_clk_gate_bins=20 1092p_state_clk_gate_max=1000000000000 1093p_state_clk_gate_min=1000 1094pio_addr=8804615848696 1095pio_latency=100000 1096pio_size=8 1097power_model=Null 1098ret_bad_addr=false 1099ret_data16=65535 1100ret_data32=4294967295 1101ret_data64=18446744073709551615 1102ret_data8=255 1103system=system 1104update_data=false 1105warn_access= 1106pio=system.iobus.master[3] 1107 1108[system.tsunami.fake_uart2] 1109type=IsaFake 1110clk_domain=system.clk_domain 1111default_p_state=UNDEFINED 1112eventq_index=0 1113fake_mem=false 1114p_state_clk_gate_bins=20 1115p_state_clk_gate_max=1000000000000 1116p_state_clk_gate_min=1000 1117pio_addr=8804615848936 1118pio_latency=100000 1119pio_size=8 1120power_model=Null 1121ret_bad_addr=false 1122ret_data16=65535 1123ret_data32=4294967295 1124ret_data64=18446744073709551615 1125ret_data8=255 1126system=system 1127update_data=false 1128warn_access= 1129pio=system.iobus.master[4] 1130 1131[system.tsunami.fake_uart3] 1132type=IsaFake 1133clk_domain=system.clk_domain 1134default_p_state=UNDEFINED 1135eventq_index=0 1136fake_mem=false 1137p_state_clk_gate_bins=20 1138p_state_clk_gate_max=1000000000000 1139p_state_clk_gate_min=1000 1140pio_addr=8804615848680 1141pio_latency=100000 1142pio_size=8 1143power_model=Null 1144ret_bad_addr=false 1145ret_data16=65535 1146ret_data32=4294967295 1147ret_data64=18446744073709551615 1148ret_data8=255 1149system=system 1150update_data=false 1151warn_access= 1152pio=system.iobus.master[5] 1153 1154[system.tsunami.fake_uart4] 1155type=IsaFake 1156clk_domain=system.clk_domain 1157default_p_state=UNDEFINED 1158eventq_index=0 1159fake_mem=false 1160p_state_clk_gate_bins=20 1161p_state_clk_gate_max=1000000000000 1162p_state_clk_gate_min=1000 1163pio_addr=8804615848944 1164pio_latency=100000 1165pio_size=8 1166power_model=Null 1167ret_bad_addr=false 1168ret_data16=65535 1169ret_data32=4294967295 1170ret_data64=18446744073709551615 1171ret_data8=255 1172system=system 1173update_data=false 1174warn_access= 1175pio=system.iobus.master[6] 1176 1177[system.tsunami.fb] 1178type=BadDevice 1179clk_domain=system.clk_domain 1180default_p_state=UNDEFINED 1181devicename=FrameBuffer 1182eventq_index=0 1183p_state_clk_gate_bins=20 1184p_state_clk_gate_max=1000000000000 1185p_state_clk_gate_min=1000 1186pio_addr=8804615848912 1187pio_latency=100000 1188power_model=Null 1189system=system 1190pio=system.iobus.master[21] 1191 1192[system.tsunami.ide] 1193type=IdeController 1194BAR0=1 1195BAR0LegacyIO=false 1196BAR0Size=8 1197BAR1=1 1198BAR1LegacyIO=false 1199BAR1Size=4 1200BAR2=1 1201BAR2LegacyIO=false 1202BAR2Size=8 1203BAR3=1 1204BAR3LegacyIO=false 1205BAR3Size=4 1206BAR4=1 1207BAR4LegacyIO=false 1208BAR4Size=16 1209BAR5=1 1210BAR5LegacyIO=false 1211BAR5Size=0 1212BIST=0 1213CacheLineSize=0 1214CapabilityPtr=0 1215CardbusCIS=0 1216ClassCode=1 1217Command=0 1218DeviceID=28945 1219ExpansionROM=0 1220HeaderType=0 1221InterruptLine=31 1222InterruptPin=1 1223LatencyTimer=0 1224LegacyIOBase=0 1225MSICAPBaseOffset=0 1226MSICAPCapId=0 1227MSICAPMaskBits=0 1228MSICAPMsgAddr=0 1229MSICAPMsgCtrl=0 1230MSICAPMsgData=0 1231MSICAPMsgUpperAddr=0 1232MSICAPNextCapability=0 1233MSICAPPendingBits=0 1234MSIXCAPBaseOffset=0 1235MSIXCAPCapId=0 1236MSIXCAPNextCapability=0 1237MSIXMsgCtrl=0 1238MSIXPbaOffset=0 1239MSIXTableOffset=0 1240MaximumLatency=0 1241MinimumGrant=0 1242PMCAPBaseOffset=0 1243PMCAPCapId=0 1244PMCAPCapabilities=0 1245PMCAPCtrlStatus=0 1246PMCAPNextCapability=0 1247PXCAPBaseOffset=0 1248PXCAPCapId=0 1249PXCAPCapabilities=0 1250PXCAPDevCap2=0 1251PXCAPDevCapabilities=0 1252PXCAPDevCtrl=0 1253PXCAPDevCtrl2=0 1254PXCAPDevStatus=0 1255PXCAPLinkCap=0 1256PXCAPLinkCtrl=0 1257PXCAPLinkStatus=0 1258PXCAPNextCapability=0 1259ProgIF=133 1260Revision=0 1261Status=640 1262SubClassCode=1 1263SubsystemID=0 1264SubsystemVendorID=0 1265VendorID=32902 1266clk_domain=system.clk_domain 1267config_latency=20000 1268ctrl_offset=0 1269default_p_state=UNDEFINED 1270disks=system.disk0 system.disk2 1271eventq_index=0 1272host=system.tsunami.pchip 1273io_shift=0 1274p_state_clk_gate_bins=20 1275p_state_clk_gate_max=1000000000000 1276p_state_clk_gate_min=1000 1277pci_bus=0 1278pci_dev=0 1279pci_func=0 1280pio_latency=30000 1281power_model=Null 1282system=system 1283dma=system.iobus.slave[1] 1284pio=system.iobus.master[25] 1285 1286[system.tsunami.io] 1287type=TsunamiIO 1288clk_domain=system.clk_domain 1289default_p_state=UNDEFINED 1290eventq_index=0 1291frequency=976562500 1292p_state_clk_gate_bins=20 1293p_state_clk_gate_max=1000000000000 1294p_state_clk_gate_min=1000 1295pio_addr=8804615847936 1296pio_latency=100000 1297power_model=Null 1298system=system 1299time=Thu Jan 1 00:00:00 2009 1300tsunami=system.tsunami 1301year_is_bcd=false 1302pio=system.iobus.master[22] 1303 1304[system.tsunami.pchip] 1305type=TsunamiPChip 1306clk_domain=system.clk_domain 1307conf_base=8804649402368 1308conf_device_bits=8 1309conf_size=16777216 1310default_p_state=UNDEFINED 1311eventq_index=0 1312p_state_clk_gate_bins=20 1313p_state_clk_gate_max=1000000000000 1314p_state_clk_gate_min=1000 1315pci_dma_base=0 1316pci_mem_base=8796093022208 1317pci_pio_base=8804615847936 1318pio_addr=8802535473152 1319pio_latency=100000 1320platform=system.tsunami 1321power_model=Null 1322system=system 1323tsunami=system.tsunami 1324pio=system.iobus.master[1] 1325 1326[system.tsunami.uart] 1327type=Uart8250 1328clk_domain=system.clk_domain 1329default_p_state=UNDEFINED 1330eventq_index=0 1331p_state_clk_gate_bins=20 1332p_state_clk_gate_max=1000000000000 1333p_state_clk_gate_min=1000 1334pio_addr=8804615848952 1335pio_latency=100000 1336platform=system.tsunami 1337power_model=Null 1338system=system 1339terminal=system.terminal 1340pio=system.iobus.master[23] 1341 1342[system.voltage_domain] 1343type=VoltageDomain 1344eventq_index=0 1345voltage=1.000000 1346 1347