1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.517298 4sim_ticks 517297855500 5final_tick 517297855500 6sim_freq 1000000000000 7host_inst_rate 473413 8host_op_rate 568350 9host_tick_rate 897909978 10host_mem_usage 288888 11host_seconds 576.11 12sim_insts 272739286 13sim_ops 327433744 14system.voltage_domain.voltage 1 15system.clk_domain.clock 1000 16system.physmem.pwrStateResidencyTicks::UNDEFINED 517297855500 17system.physmem.bytes_read::cpu.inst 166912 18system.physmem.bytes_read::cpu.data 270336 19system.physmem.bytes_read::total 437248 20system.physmem.bytes_inst_read::cpu.inst 166912 21system.physmem.bytes_inst_read::total 166912 22system.physmem.num_reads::cpu.inst 2608 23system.physmem.num_reads::cpu.data 4224 24system.physmem.num_reads::total 6832 25system.physmem.bw_read::cpu.inst 322661 26system.physmem.bw_read::cpu.data 522593 27system.physmem.bw_read::total 845254 28system.physmem.bw_inst_read::cpu.inst 322661 29system.physmem.bw_inst_read::total 322661 30system.physmem.bw_total::cpu.inst 322661 31system.physmem.bw_total::cpu.data 522593 32system.physmem.bw_total::total 845254 33system.pwrStateResidencyTicks::UNDEFINED 517297855500 34system.cpu_clk_domain.clock 500 35system.cpu.dstage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 517297855500 36system.cpu.dstage2_mmu.stage2_tlb.walker.walks 0 37system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 38system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0 39system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total 0 40system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data 0 41system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst 0 42system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total 0 43system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin::total 0 44system.cpu.dstage2_mmu.stage2_tlb.inst_hits 0 45system.cpu.dstage2_mmu.stage2_tlb.inst_misses 0 46system.cpu.dstage2_mmu.stage2_tlb.read_hits 0 47system.cpu.dstage2_mmu.stage2_tlb.read_misses 0 48system.cpu.dstage2_mmu.stage2_tlb.write_hits 0 49system.cpu.dstage2_mmu.stage2_tlb.write_misses 0 50system.cpu.dstage2_mmu.stage2_tlb.flush_tlb 0 51system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva 0 52system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva_asid 0 53system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_asid 0 54system.cpu.dstage2_mmu.stage2_tlb.flush_entries 0 55system.cpu.dstage2_mmu.stage2_tlb.align_faults 0 56system.cpu.dstage2_mmu.stage2_tlb.prefetch_faults 0 57system.cpu.dstage2_mmu.stage2_tlb.domain_faults 0 58system.cpu.dstage2_mmu.stage2_tlb.perms_faults 0 59system.cpu.dstage2_mmu.stage2_tlb.read_accesses 0 60system.cpu.dstage2_mmu.stage2_tlb.write_accesses 0 61system.cpu.dstage2_mmu.stage2_tlb.inst_accesses 0 62system.cpu.dstage2_mmu.stage2_tlb.hits 0 63system.cpu.dstage2_mmu.stage2_tlb.misses 0 64system.cpu.dstage2_mmu.stage2_tlb.accesses 0 65system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED 517297855500 66system.cpu.dtb.walker.walks 0 67system.cpu.dtb.walker.walkRequestOrigin_Requested::Data 0 68system.cpu.dtb.walker.walkRequestOrigin_Requested::Inst 0 69system.cpu.dtb.walker.walkRequestOrigin_Requested::total 0 70system.cpu.dtb.walker.walkRequestOrigin_Completed::Data 0 71system.cpu.dtb.walker.walkRequestOrigin_Completed::Inst 0 72system.cpu.dtb.walker.walkRequestOrigin_Completed::total 0 73system.cpu.dtb.walker.walkRequestOrigin::total 0 74system.cpu.dtb.inst_hits 0 75system.cpu.dtb.inst_misses 0 76system.cpu.dtb.read_hits 0 77system.cpu.dtb.read_misses 0 78system.cpu.dtb.write_hits 0 79system.cpu.dtb.write_misses 0 80system.cpu.dtb.flush_tlb 0 81system.cpu.dtb.flush_tlb_mva 0 82system.cpu.dtb.flush_tlb_mva_asid 0 83system.cpu.dtb.flush_tlb_asid 0 84system.cpu.dtb.flush_entries 0 85system.cpu.dtb.align_faults 0 86system.cpu.dtb.prefetch_faults 0 87system.cpu.dtb.domain_faults 0 88system.cpu.dtb.perms_faults 0 89system.cpu.dtb.read_accesses 0 90system.cpu.dtb.write_accesses 0 91system.cpu.dtb.inst_accesses 0 92system.cpu.dtb.hits 0 93system.cpu.dtb.misses 0 94system.cpu.dtb.accesses 0 95system.cpu.istage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 517297855500 96system.cpu.istage2_mmu.stage2_tlb.walker.walks 0 97system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 98system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0 99system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total 0 100system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data 0 101system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst 0 102system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total 0 103system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin::total 0 104system.cpu.istage2_mmu.stage2_tlb.inst_hits 0 105system.cpu.istage2_mmu.stage2_tlb.inst_misses 0 106system.cpu.istage2_mmu.stage2_tlb.read_hits 0 107system.cpu.istage2_mmu.stage2_tlb.read_misses 0 108system.cpu.istage2_mmu.stage2_tlb.write_hits 0 109system.cpu.istage2_mmu.stage2_tlb.write_misses 0 110system.cpu.istage2_mmu.stage2_tlb.flush_tlb 0 111system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva 0 112system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva_asid 0 113system.cpu.istage2_mmu.stage2_tlb.flush_tlb_asid 0 114system.cpu.istage2_mmu.stage2_tlb.flush_entries 0 115system.cpu.istage2_mmu.stage2_tlb.align_faults 0 116system.cpu.istage2_mmu.stage2_tlb.prefetch_faults 0 117system.cpu.istage2_mmu.stage2_tlb.domain_faults 0 118system.cpu.istage2_mmu.stage2_tlb.perms_faults 0 119system.cpu.istage2_mmu.stage2_tlb.read_accesses 0 120system.cpu.istage2_mmu.stage2_tlb.write_accesses 0 121system.cpu.istage2_mmu.stage2_tlb.inst_accesses 0 122system.cpu.istage2_mmu.stage2_tlb.hits 0 123system.cpu.istage2_mmu.stage2_tlb.misses 0 124system.cpu.istage2_mmu.stage2_tlb.accesses 0 125system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED 517297855500 126system.cpu.itb.walker.walks 0 127system.cpu.itb.walker.walkRequestOrigin_Requested::Data 0 128system.cpu.itb.walker.walkRequestOrigin_Requested::Inst 0 129system.cpu.itb.walker.walkRequestOrigin_Requested::total 0 130system.cpu.itb.walker.walkRequestOrigin_Completed::Data 0 131system.cpu.itb.walker.walkRequestOrigin_Completed::Inst 0 132system.cpu.itb.walker.walkRequestOrigin_Completed::total 0 133system.cpu.itb.walker.walkRequestOrigin::total 0 134system.cpu.itb.inst_hits 0 135system.cpu.itb.inst_misses 0 136system.cpu.itb.read_hits 0 137system.cpu.itb.read_misses 0 138system.cpu.itb.write_hits 0 139system.cpu.itb.write_misses 0 140system.cpu.itb.flush_tlb 0 141system.cpu.itb.flush_tlb_mva 0 142system.cpu.itb.flush_tlb_mva_asid 0 143system.cpu.itb.flush_tlb_asid 0 144system.cpu.itb.flush_entries 0 145system.cpu.itb.align_faults 0 146system.cpu.itb.prefetch_faults 0 147system.cpu.itb.domain_faults 0 148system.cpu.itb.perms_faults 0 149system.cpu.itb.read_accesses 0 150system.cpu.itb.write_accesses 0 151system.cpu.itb.inst_accesses 0 152system.cpu.itb.hits 0 153system.cpu.itb.misses 0 154system.cpu.itb.accesses 0 155system.cpu.workload.numSyscalls 191 156system.cpu.pwrStateResidencyTicks::ON 517297855500 157system.cpu.numCycles 1034595711 158system.cpu.numWorkItemsStarted 0 159system.cpu.numWorkItemsCompleted 0 160system.cpu.committedInsts 272739286 161system.cpu.committedOps 327433744 162system.cpu.num_int_alu_accesses 258331537 163system.cpu.num_fp_alu_accesses 114216705 164system.cpu.num_func_calls 12448615 165system.cpu.num_conditional_control_insts 15799349 166system.cpu.num_int_insts 258331537 167system.cpu.num_fp_insts 114216705 168system.cpu.num_int_register_reads 979511506 169system.cpu.num_int_register_writes 162499693 170system.cpu.num_fp_register_reads 180262959 171system.cpu.num_fp_register_writes 126152315 172system.cpu.num_cc_register_reads 1242915503 173system.cpu.num_cc_register_writes 76361814 174system.cpu.num_mem_refs 168107847 175system.cpu.num_load_insts 85732248 176system.cpu.num_store_insts 82375599 177system.cpu.num_idle_cycles 0 178system.cpu.num_busy_cycles 1034595711 179system.cpu.not_idle_fraction 1 180system.cpu.idle_fraction 0 181system.cpu.Branches 30563503 182system.cpu.op_class::No_OpClass 0 0.00% 0.00% 183system.cpu.op_class::IntAlu 104312544 31.82% 31.82% 184system.cpu.op_class::IntMult 2145905 0.65% 32.48% 185system.cpu.op_class::IntDiv 0 0.00% 32.48% 186system.cpu.op_class::FloatAdd 0 0.00% 32.48% 187system.cpu.op_class::FloatCmp 0 0.00% 32.48% 188system.cpu.op_class::FloatCvt 0 0.00% 32.48% 189system.cpu.op_class::FloatMult 0 0.00% 32.48% 190system.cpu.op_class::FloatMultAcc 0 0.00% 32.48% 191system.cpu.op_class::FloatDiv 0 0.00% 32.48% 192system.cpu.op_class::FloatMisc 0 0.00% 32.48% 193system.cpu.op_class::FloatSqrt 0 0.00% 32.48% 194system.cpu.op_class::SimdAdd 0 0.00% 32.48% 195system.cpu.op_class::SimdAddAcc 0 0.00% 32.48% 196system.cpu.op_class::SimdAlu 0 0.00% 32.48% 197system.cpu.op_class::SimdCmp 0 0.00% 32.48% 198system.cpu.op_class::SimdCvt 0 0.00% 32.48% 199system.cpu.op_class::SimdMisc 0 0.00% 32.48% 200system.cpu.op_class::SimdMult 0 0.00% 32.48% 201system.cpu.op_class::SimdMultAcc 0 0.00% 32.48% 202system.cpu.op_class::SimdShift 0 0.00% 32.48% 203system.cpu.op_class::SimdShiftAcc 0 0.00% 32.48% 204system.cpu.op_class::SimdSqrt 0 0.00% 32.48% 205system.cpu.op_class::SimdFloatAdd 6594343 2.01% 34.49% 206system.cpu.op_class::SimdFloatAlu 0 0.00% 34.49% 207system.cpu.op_class::SimdFloatCmp 7943502 2.42% 36.91% 208system.cpu.op_class::SimdFloatCvt 3118180 0.95% 37.86% 209system.cpu.op_class::SimdFloatDiv 1563217 0.48% 38.34% 210system.cpu.op_class::SimdFloatMisc 19652356 6.00% 44.33% 211system.cpu.op_class::SimdFloatMult 7136937 2.18% 46.51% 212system.cpu.op_class::SimdFloatMultAcc 7062098 2.15% 48.66% 213system.cpu.op_class::SimdFloatSqrt 175285 0.05% 48.72% 214system.cpu.op_class::MemRead 44185174 13.48% 62.20% 215system.cpu.op_class::MemWrite 55008381 16.78% 78.98% 216system.cpu.op_class::FloatMemRead 41547074 12.67% 91.65% 217system.cpu.op_class::FloatMemWrite 27367218 8.35% 100.00% 218system.cpu.op_class::IprAccess 0 0.00% 100.00% 219system.cpu.op_class::InstPrefetch 0 0.00% 100.00% 220system.cpu.op_class::total 327812214 221system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 517297855500 222system.cpu.dcache.tags.replacements 1332 223system.cpu.dcache.tags.tagsinuse 3078.320204 224system.cpu.dcache.tags.total_refs 168359617 225system.cpu.dcache.tags.sampled_refs 4478 226system.cpu.dcache.tags.avg_refs 37597.056052 227system.cpu.dcache.tags.warmup_cycle 0 228system.cpu.dcache.tags.occ_blocks::cpu.data 3078.320204 229system.cpu.dcache.tags.occ_percent::cpu.data 0.751543 230system.cpu.dcache.tags.occ_percent::total 0.751543 231system.cpu.dcache.tags.occ_task_id_blocks::1024 3146 232system.cpu.dcache.tags.age_task_id_blocks_1024::0 11 233system.cpu.dcache.tags.age_task_id_blocks_1024::1 20 234system.cpu.dcache.tags.age_task_id_blocks_1024::2 10 235system.cpu.dcache.tags.age_task_id_blocks_1024::3 677 236system.cpu.dcache.tags.age_task_id_blocks_1024::4 2428 237system.cpu.dcache.tags.occ_task_id_percent::1024 0.768066 238system.cpu.dcache.tags.tag_accesses 336732670 239system.cpu.dcache.tags.data_accesses 336732670 240system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 517297855500 241system.cpu.dcache.ReadReq_hits::cpu.data 86233963 242system.cpu.dcache.ReadReq_hits::total 86233963 243system.cpu.dcache.WriteReq_hits::cpu.data 82049805 244system.cpu.dcache.WriteReq_hits::total 82049805 245system.cpu.dcache.SoftPFReq_hits::cpu.data 54059 246system.cpu.dcache.SoftPFReq_hits::total 54059 247system.cpu.dcache.LoadLockedReq_hits::cpu.data 10895 248system.cpu.dcache.LoadLockedReq_hits::total 10895 249system.cpu.dcache.StoreCondReq_hits::cpu.data 10895 250system.cpu.dcache.StoreCondReq_hits::total 10895 251system.cpu.dcache.demand_hits::cpu.data 168283768 252system.cpu.dcache.demand_hits::total 168283768 253system.cpu.dcache.overall_hits::cpu.data 168337827 254system.cpu.dcache.overall_hits::total 168337827 255system.cpu.dcache.ReadReq_misses::cpu.data 1604 256system.cpu.dcache.ReadReq_misses::total 1604 257system.cpu.dcache.WriteReq_misses::cpu.data 2872 258system.cpu.dcache.WriteReq_misses::total 2872 259system.cpu.dcache.SoftPFReq_misses::cpu.data 3 260system.cpu.dcache.SoftPFReq_misses::total 3 261system.cpu.dcache.demand_misses::cpu.data 4476 262system.cpu.dcache.demand_misses::total 4476 263system.cpu.dcache.overall_misses::cpu.data 4479 264system.cpu.dcache.overall_misses::total 4479 265system.cpu.dcache.ReadReq_miss_latency::cpu.data 89418000 266system.cpu.dcache.ReadReq_miss_latency::total 89418000 267system.cpu.dcache.WriteReq_miss_latency::cpu.data 180278500 268system.cpu.dcache.WriteReq_miss_latency::total 180278500 269system.cpu.dcache.demand_miss_latency::cpu.data 269696500 270system.cpu.dcache.demand_miss_latency::total 269696500 271system.cpu.dcache.overall_miss_latency::cpu.data 269696500 272system.cpu.dcache.overall_miss_latency::total 269696500 273system.cpu.dcache.ReadReq_accesses::cpu.data 86235567 274system.cpu.dcache.ReadReq_accesses::total 86235567 275system.cpu.dcache.WriteReq_accesses::cpu.data 82052677 276system.cpu.dcache.WriteReq_accesses::total 82052677 277system.cpu.dcache.SoftPFReq_accesses::cpu.data 54062 278system.cpu.dcache.SoftPFReq_accesses::total 54062 279system.cpu.dcache.LoadLockedReq_accesses::cpu.data 10895 280system.cpu.dcache.LoadLockedReq_accesses::total 10895 281system.cpu.dcache.StoreCondReq_accesses::cpu.data 10895 282system.cpu.dcache.StoreCondReq_accesses::total 10895 283system.cpu.dcache.demand_accesses::cpu.data 168288244 284system.cpu.dcache.demand_accesses::total 168288244 285system.cpu.dcache.overall_accesses::cpu.data 168342306 286system.cpu.dcache.overall_accesses::total 168342306 287system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.000019 288system.cpu.dcache.ReadReq_miss_rate::total 0.000019 289system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.000035 290system.cpu.dcache.WriteReq_miss_rate::total 0.000035 291system.cpu.dcache.SoftPFReq_miss_rate::cpu.data 0.000055 292system.cpu.dcache.SoftPFReq_miss_rate::total 0.000055 293system.cpu.dcache.demand_miss_rate::cpu.data 0.000027 294system.cpu.dcache.demand_miss_rate::total 0.000027 295system.cpu.dcache.overall_miss_rate::cpu.data 0.000027 296system.cpu.dcache.overall_miss_rate::total 0.000027 297system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 55746.882793 298system.cpu.dcache.ReadReq_avg_miss_latency::total 55746.882793 299system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 62771.065460 300system.cpu.dcache.WriteReq_avg_miss_latency::total 62771.065460 301system.cpu.dcache.demand_avg_miss_latency::cpu.data 60253.909741 302system.cpu.dcache.demand_avg_miss_latency::total 60253.909741 303system.cpu.dcache.overall_avg_miss_latency::cpu.data 60213.552132 304system.cpu.dcache.overall_avg_miss_latency::total 60213.552132 305system.cpu.dcache.blocked_cycles::no_mshrs 0 306system.cpu.dcache.blocked_cycles::no_targets 0 307system.cpu.dcache.blocked::no_mshrs 0 308system.cpu.dcache.blocked::no_targets 0 309system.cpu.dcache.avg_blocked_cycles::no_mshrs nan 310system.cpu.dcache.avg_blocked_cycles::no_targets nan 311system.cpu.dcache.writebacks::writebacks 998 312system.cpu.dcache.writebacks::total 998 313system.cpu.dcache.ReadReq_mshr_hits::cpu.data 1 314system.cpu.dcache.ReadReq_mshr_hits::total 1 315system.cpu.dcache.demand_mshr_hits::cpu.data 1 316system.cpu.dcache.demand_mshr_hits::total 1 317system.cpu.dcache.overall_mshr_hits::cpu.data 1 318system.cpu.dcache.overall_mshr_hits::total 1 319system.cpu.dcache.ReadReq_mshr_misses::cpu.data 1603 320system.cpu.dcache.ReadReq_mshr_misses::total 1603 321system.cpu.dcache.WriteReq_mshr_misses::cpu.data 2872 322system.cpu.dcache.WriteReq_mshr_misses::total 2872 323system.cpu.dcache.SoftPFReq_mshr_misses::cpu.data 3 324system.cpu.dcache.SoftPFReq_mshr_misses::total 3 325system.cpu.dcache.demand_mshr_misses::cpu.data 4475 326system.cpu.dcache.demand_mshr_misses::total 4475 327system.cpu.dcache.overall_mshr_misses::cpu.data 4478 328system.cpu.dcache.overall_mshr_misses::total 4478 329system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data 87767000 330system.cpu.dcache.ReadReq_mshr_miss_latency::total 87767000 331system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data 177406500 332system.cpu.dcache.WriteReq_mshr_miss_latency::total 177406500 333system.cpu.dcache.SoftPFReq_mshr_miss_latency::cpu.data 186000 334system.cpu.dcache.SoftPFReq_mshr_miss_latency::total 186000 335system.cpu.dcache.demand_mshr_miss_latency::cpu.data 265173500 336system.cpu.dcache.demand_mshr_miss_latency::total 265173500 337system.cpu.dcache.overall_mshr_miss_latency::cpu.data 265359500 338system.cpu.dcache.overall_mshr_miss_latency::total 265359500 339system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data 0.000019 340system.cpu.dcache.ReadReq_mshr_miss_rate::total 0.000019 341system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data 0.000035 342system.cpu.dcache.WriteReq_mshr_miss_rate::total 0.000035 343system.cpu.dcache.SoftPFReq_mshr_miss_rate::cpu.data 0.000055 344system.cpu.dcache.SoftPFReq_mshr_miss_rate::total 0.000055 345system.cpu.dcache.demand_mshr_miss_rate::cpu.data 0.000027 346system.cpu.dcache.demand_mshr_miss_rate::total 0.000027 347system.cpu.dcache.overall_mshr_miss_rate::cpu.data 0.000027 348system.cpu.dcache.overall_mshr_miss_rate::total 0.000027 349system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 54751.715533 350system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 54751.715533 351system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 61771.065460 352system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 61771.065460 353system.cpu.dcache.SoftPFReq_avg_mshr_miss_latency::cpu.data 62000 354system.cpu.dcache.SoftPFReq_avg_mshr_miss_latency::total 62000 355system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 59256.648045 356system.cpu.dcache.demand_avg_mshr_miss_latency::total 59256.648045 357system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 59258.485931 358system.cpu.dcache.overall_avg_mshr_miss_latency::total 59258.485931 359system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED 517297855500 360system.cpu.icache.tags.replacements 13796 361system.cpu.icache.tags.tagsinuse 1765.939670 362system.cpu.icache.tags.total_refs 348644750 363system.cpu.icache.tags.sampled_refs 15603 364system.cpu.icache.tags.avg_refs 22344.725373 365system.cpu.icache.tags.warmup_cycle 0 366system.cpu.icache.tags.occ_blocks::cpu.inst 1765.939670 367system.cpu.icache.tags.occ_percent::cpu.inst 0.862275 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618system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 45002 619system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 10288 620system.cpu.toL2Bus.pkt_count::total 55290 621system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1881536 622system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 350464 623system.cpu.toL2Bus.pkt_size::total 2232000 624system.cpu.toL2Bus.snoops 0 625system.cpu.toL2Bus.snoopTraffic 0 626system.cpu.toL2Bus.snoop_fanout::samples 20081 627system.cpu.toL2Bus.snoop_fanout::mean 0.386335 628system.cpu.toL2Bus.snoop_fanout::stdev 0.486921 629system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% 630system.cpu.toL2Bus.snoop_fanout::0 12323 61.37% 61.37% 631system.cpu.toL2Bus.snoop_fanout::1 7758 38.63% 100.00% 632system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 100.00% 633system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% 634system.cpu.toL2Bus.snoop_fanout::min_value 0 635system.cpu.toL2Bus.snoop_fanout::max_value 1 636system.cpu.toL2Bus.snoop_fanout::total 20081 637system.cpu.toL2Bus.reqLayer0.occupancy 32398500 638system.cpu.toL2Bus.reqLayer0.utilization 0.0 639system.cpu.toL2Bus.respLayer0.occupancy 23404500 640system.cpu.toL2Bus.respLayer0.utilization 0.0 641system.cpu.toL2Bus.respLayer1.occupancy 6717000 642system.cpu.toL2Bus.respLayer1.utilization 0.0 643system.membus.snoop_filter.tot_requests 6833 644system.membus.snoop_filter.hit_single_requests 0 645system.membus.snoop_filter.hit_multi_requests 0 646system.membus.snoop_filter.tot_snoops 0 647system.membus.snoop_filter.hit_single_snoops 0 648system.membus.snoop_filter.hit_multi_snoops 0 649system.membus.pwrStateResidencyTicks::UNDEFINED 517297855500 650system.membus.trans_dist::ReadResp 3976 651system.membus.trans_dist::ReadExReq 2856 652system.membus.trans_dist::ReadExResp 2856 653system.membus.trans_dist::ReadSharedReq 3976 654system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 13664 655system.membus.pkt_count::total 13664 656system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 437248 657system.membus.pkt_size::total 437248 658system.membus.snoops 0 659system.membus.snoopTraffic 0 660system.membus.snoop_fanout::samples 6833 661system.membus.snoop_fanout::mean 0 662system.membus.snoop_fanout::stdev 0 663system.membus.snoop_fanout::underflows 0 0.00% 0.00% 664system.membus.snoop_fanout::0 6833 100.00% 100.00% 665system.membus.snoop_fanout::1 0 0.00% 100.00% 666system.membus.snoop_fanout::overflows 0 0.00% 100.00% 667system.membus.snoop_fanout::min_value 0 668system.membus.snoop_fanout::max_value 0 669system.membus.snoop_fanout::total 6833 670system.membus.reqLayer0.occupancy 7281500 671system.membus.reqLayer0.utilization 0.0 672system.membus.respLayer1.occupancy 34160000 673system.membus.respLayer1.utilization 0.0 674 675---------- End Simulation Statistics ---------- 676