config.ini revision 8521
1[root] 2type=Root 3children=system 4time_sync_enable=false 5time_sync_period=100000000000 6time_sync_spin_threshold=100000000 7 8[system] 9type=LinuxArmSystem 10children=bridge cpu diskmem intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver 11boot_cpu_frequency=500 12boot_loader= 13boot_loader_mem=Null 14boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB slram=slram0,0x8000000,+0x8000000 mtdparts=slram0:- root=/dev/mtdblock0 15flags_addr=0 16gic_cpu_addr=0 17init_param=0 18kernel=/arm/scratch/sysexplr/dist/binaries/vmlinux.arm 19load_addr_mask=268435455 20machine_type=RealView_PBX 21mem_mode=timing 22memories=system.physmem system.diskmem 23midr_regval=890224640 24physmem=system.physmem 25readfile=tests/halt.sh 26symbolfile= 27work_begin_ckpt_count=0 28work_begin_cpu_id_exit=-1 29work_begin_exit_count=0 30work_cpus_ckpt_count=0 31work_end_ckpt_count=0 32work_end_exit_count=0 33work_item_id=-1 34 35[system.bridge] 36type=Bridge 37delay=50000 38filter_ranges_a=0:18446744073709551615 39filter_ranges_b=0:134217727 40nack_delay=4000 41req_size_a=16 42req_size_b=16 43resp_size_a=16 44resp_size_b=16 45write_ack=false 46side_a=system.iobus.port[0] 47side_b=system.membus.port[0] 48 49[system.cpu] 50type=DerivO3CPU 51children=dcache dtb fuPool icache interrupts itb tracer 52BTBEntries=4096 53BTBTagSize=16 54LFSTSize=1024 55LQEntries=32 56LSQCheckLoads=true 57LSQDepCheckShift=4 58RASSize=16 59SQEntries=32 60SSITSize=1024 61activity=0 62backComSize=5 63cachePorts=200 64checker=Null 65choiceCtrBits=2 66choicePredictorSize=8192 67clock=500 68commitToDecodeDelay=1 69commitToFetchDelay=1 70commitToIEWDelay=1 71commitToRenameDelay=1 72commitWidth=8 73cpu_id=0 74decodeToFetchDelay=1 75decodeToRenameDelay=1 76decodeWidth=8 77defer_registration=false 78dispatchWidth=8 79do_checkpoint_insts=true 80do_quiesce=true 81do_statistics_insts=true 82dtb=system.cpu.dtb 83fetchToDecodeDelay=1 84fetchTrapLatency=1 85fetchWidth=8 86forwardComSize=5 87fuPool=system.cpu.fuPool 88function_trace=false 89function_trace_start=0 90globalCtrBits=2 91globalHistoryBits=13 92globalPredictorSize=8192 93iewToCommitDelay=1 94iewToDecodeDelay=1 95iewToFetchDelay=1 96iewToRenameDelay=1 97instShiftAmt=2 98interrupts=system.cpu.interrupts 99issueToExecuteDelay=1 100issueWidth=8 101itb=system.cpu.itb 102localCtrBits=2 103localHistoryBits=11 104localHistoryTableSize=2048 105localPredictorSize=2048 106max_insts_all_threads=0 107max_insts_any_thread=0 108max_loads_all_threads=0 109max_loads_any_thread=0 110numIQEntries=64 111numPhysFloatRegs=256 112numPhysIntRegs=256 113numROBEntries=192 114numRobs=1 115numThreads=1 116phase=0 117predType=tournament 118profile=0 119progress_interval=0 120renameToDecodeDelay=1 121renameToFetchDelay=1 122renameToIEWDelay=2 123renameToROBDelay=1 124renameWidth=8 125smtCommitPolicy=RoundRobin 126smtFetchPolicy=SingleThread 127smtIQPolicy=Partitioned 128smtIQThreshold=100 129smtLSQPolicy=Partitioned 130smtLSQThreshold=100 131smtNumFetchingThreads=1 132smtROBPolicy=Partitioned 133smtROBThreshold=100 134squashWidth=8 135store_set_clear_period=250000 136system=system 137tracer=system.cpu.tracer 138trapLatency=13 139wbDepth=1 140wbWidth=8 141dcache_port=system.cpu.dcache.cpu_side 142icache_port=system.cpu.icache.cpu_side 143 144[system.cpu.dcache] 145type=BaseCache 146addr_range=0:18446744073709551615 147assoc=4 148block_size=64 149forward_snoops=true 150hash_delay=1 151is_top_level=true 152latency=1000 153max_miss_count=0 154mshrs=4 155num_cpus=1 156prefetch_data_accesses_only=false 157prefetch_degree=1 158prefetch_latency=10000 159prefetch_on_access=false 160prefetch_past_page=false 161prefetch_policy=none 162prefetch_serial_squash=false 163prefetch_use_cpu_id=true 164prefetcher_size=100 165prioritizeRequests=false 166repl=Null 167size=32768 168subblock_size=0 169tgts_per_mshr=20 170trace_addr=0 171two_queue=false 172write_buffers=8 173cpu_side=system.cpu.dcache_port 174mem_side=system.toL2Bus.port[2] 175 176[system.cpu.dtb] 177type=ArmTLB 178children=walker 179size=64 180walker=system.cpu.dtb.walker 181 182[system.cpu.dtb.walker] 183type=ArmTableWalker 184max_backoff=100000 185min_backoff=0 186sys=system 187port=system.toL2Bus.port[4] 188 189[system.cpu.fuPool] 190type=FUPool 191children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 192FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8 193 194[system.cpu.fuPool.FUList0] 195type=FUDesc 196children=opList 197count=6 198opList=system.cpu.fuPool.FUList0.opList 199 200[system.cpu.fuPool.FUList0.opList] 201type=OpDesc 202issueLat=1 203opClass=IntAlu 204opLat=1 205 206[system.cpu.fuPool.FUList1] 207type=FUDesc 208children=opList0 opList1 209count=2 210opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 211 212[system.cpu.fuPool.FUList1.opList0] 213type=OpDesc 214issueLat=1 215opClass=IntMult 216opLat=3 217 218[system.cpu.fuPool.FUList1.opList1] 219type=OpDesc 220issueLat=19 221opClass=IntDiv 222opLat=20 223 224[system.cpu.fuPool.FUList2] 225type=FUDesc 226children=opList0 opList1 opList2 227count=4 228opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2 229 230[system.cpu.fuPool.FUList2.opList0] 231type=OpDesc 232issueLat=1 233opClass=FloatAdd 234opLat=2 235 236[system.cpu.fuPool.FUList2.opList1] 237type=OpDesc 238issueLat=1 239opClass=FloatCmp 240opLat=2 241 242[system.cpu.fuPool.FUList2.opList2] 243type=OpDesc 244issueLat=1 245opClass=FloatCvt 246opLat=2 247 248[system.cpu.fuPool.FUList3] 249type=FUDesc 250children=opList0 opList1 opList2 251count=2 252opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 253 254[system.cpu.fuPool.FUList3.opList0] 255type=OpDesc 256issueLat=1 257opClass=FloatMult 258opLat=4 259 260[system.cpu.fuPool.FUList3.opList1] 261type=OpDesc 262issueLat=12 263opClass=FloatDiv 264opLat=12 265 266[system.cpu.fuPool.FUList3.opList2] 267type=OpDesc 268issueLat=24 269opClass=FloatSqrt 270opLat=24 271 272[system.cpu.fuPool.FUList4] 273type=FUDesc 274children=opList 275count=0 276opList=system.cpu.fuPool.FUList4.opList 277 278[system.cpu.fuPool.FUList4.opList] 279type=OpDesc 280issueLat=1 281opClass=MemRead 282opLat=1 283 284[system.cpu.fuPool.FUList5] 285type=FUDesc 286children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 287count=4 288opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19 289 290[system.cpu.fuPool.FUList5.opList00] 291type=OpDesc 292issueLat=1 293opClass=SimdAdd 294opLat=1 295 296[system.cpu.fuPool.FUList5.opList01] 297type=OpDesc 298issueLat=1 299opClass=SimdAddAcc 300opLat=1 301 302[system.cpu.fuPool.FUList5.opList02] 303type=OpDesc 304issueLat=1 305opClass=SimdAlu 306opLat=1 307 308[system.cpu.fuPool.FUList5.opList03] 309type=OpDesc 310issueLat=1 311opClass=SimdCmp 312opLat=1 313 314[system.cpu.fuPool.FUList5.opList04] 315type=OpDesc 316issueLat=1 317opClass=SimdCvt 318opLat=1 319 320[system.cpu.fuPool.FUList5.opList05] 321type=OpDesc 322issueLat=1 323opClass=SimdMisc 324opLat=1 325 326[system.cpu.fuPool.FUList5.opList06] 327type=OpDesc 328issueLat=1 329opClass=SimdMult 330opLat=1 331 332[system.cpu.fuPool.FUList5.opList07] 333type=OpDesc 334issueLat=1 335opClass=SimdMultAcc 336opLat=1 337 338[system.cpu.fuPool.FUList5.opList08] 339type=OpDesc 340issueLat=1 341opClass=SimdShift 342opLat=1 343 344[system.cpu.fuPool.FUList5.opList09] 345type=OpDesc 346issueLat=1 347opClass=SimdShiftAcc 348opLat=1 349 350[system.cpu.fuPool.FUList5.opList10] 351type=OpDesc 352issueLat=1 353opClass=SimdSqrt 354opLat=1 355 356[system.cpu.fuPool.FUList5.opList11] 357type=OpDesc 358issueLat=1 359opClass=SimdFloatAdd 360opLat=1 361 362[system.cpu.fuPool.FUList5.opList12] 363type=OpDesc 364issueLat=1 365opClass=SimdFloatAlu 366opLat=1 367 368[system.cpu.fuPool.FUList5.opList13] 369type=OpDesc 370issueLat=1 371opClass=SimdFloatCmp 372opLat=1 373 374[system.cpu.fuPool.FUList5.opList14] 375type=OpDesc 376issueLat=1 377opClass=SimdFloatCvt 378opLat=1 379 380[system.cpu.fuPool.FUList5.opList15] 381type=OpDesc 382issueLat=1 383opClass=SimdFloatDiv 384opLat=1 385 386[system.cpu.fuPool.FUList5.opList16] 387type=OpDesc 388issueLat=1 389opClass=SimdFloatMisc 390opLat=1 391 392[system.cpu.fuPool.FUList5.opList17] 393type=OpDesc 394issueLat=1 395opClass=SimdFloatMult 396opLat=1 397 398[system.cpu.fuPool.FUList5.opList18] 399type=OpDesc 400issueLat=1 401opClass=SimdFloatMultAcc 402opLat=1 403 404[system.cpu.fuPool.FUList5.opList19] 405type=OpDesc 406issueLat=1 407opClass=SimdFloatSqrt 408opLat=1 409 410[system.cpu.fuPool.FUList6] 411type=FUDesc 412children=opList 413count=0 414opList=system.cpu.fuPool.FUList6.opList 415 416[system.cpu.fuPool.FUList6.opList] 417type=OpDesc 418issueLat=1 419opClass=MemWrite 420opLat=1 421 422[system.cpu.fuPool.FUList7] 423type=FUDesc 424children=opList0 opList1 425count=4 426opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 427 428[system.cpu.fuPool.FUList7.opList0] 429type=OpDesc 430issueLat=1 431opClass=MemRead 432opLat=1 433 434[system.cpu.fuPool.FUList7.opList1] 435type=OpDesc 436issueLat=1 437opClass=MemWrite 438opLat=1 439 440[system.cpu.fuPool.FUList8] 441type=FUDesc 442children=opList 443count=1 444opList=system.cpu.fuPool.FUList8.opList 445 446[system.cpu.fuPool.FUList8.opList] 447type=OpDesc 448issueLat=3 449opClass=IprAccess 450opLat=3 451 452[system.cpu.icache] 453type=BaseCache 454addr_range=0:18446744073709551615 455assoc=1 456block_size=64 457forward_snoops=true 458hash_delay=1 459is_top_level=true 460latency=1000 461max_miss_count=0 462mshrs=4 463num_cpus=1 464prefetch_data_accesses_only=false 465prefetch_degree=1 466prefetch_latency=10000 467prefetch_on_access=false 468prefetch_past_page=false 469prefetch_policy=none 470prefetch_serial_squash=false 471prefetch_use_cpu_id=true 472prefetcher_size=100 473prioritizeRequests=false 474repl=Null 475size=32768 476subblock_size=0 477tgts_per_mshr=20 478trace_addr=0 479two_queue=false 480write_buffers=8 481cpu_side=system.cpu.icache_port 482mem_side=system.toL2Bus.port[1] 483 484[system.cpu.interrupts] 485type=ArmInterrupts 486 487[system.cpu.itb] 488type=ArmTLB 489children=walker 490size=64 491walker=system.cpu.itb.walker 492 493[system.cpu.itb.walker] 494type=ArmTableWalker 495max_backoff=100000 496min_backoff=0 497sys=system 498port=system.toL2Bus.port[3] 499 500[system.cpu.tracer] 501type=ExeTracer 502 503[system.diskmem] 504type=PhysicalMemory 505file=/arm/scratch/sysexplr/dist/disks/ael-arm.ext2 506latency=30000 507latency_var=0 508null=false 509range=134217728:268435455 510zero=false 511port=system.membus.port[1] 512 513[system.intrctrl] 514type=IntrControl 515sys=system 516 517[system.iobus] 518type=Bus 519block_size=64 520bus_id=0 521clock=1000 522header_cycles=1 523use_default_range=false 524width=64 525port=system.bridge.side_a system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc_fake.pio system.realview.flash_fake.pio system.iocache.cpu_side system.realview.cf_ctrl.config system.realview.cf_ctrl.dma system.realview.clcd.dma 526 527[system.iocache] 528type=BaseCache 529addr_range=0:134217727 530assoc=8 531block_size=64 532forward_snoops=false 533hash_delay=1 534is_top_level=false 535latency=50000 536max_miss_count=0 537mshrs=20 538num_cpus=1 539prefetch_data_accesses_only=false 540prefetch_degree=1 541prefetch_latency=500000 542prefetch_on_access=false 543prefetch_past_page=false 544prefetch_policy=none 545prefetch_serial_squash=false 546prefetch_use_cpu_id=true 547prefetcher_size=100 548prioritizeRequests=false 549repl=Null 550size=1024 551subblock_size=0 552tgts_per_mshr=12 553trace_addr=0 554two_queue=false 555write_buffers=8 556cpu_side=system.iobus.port[25] 557mem_side=system.membus.port[7] 558 559[system.l2c] 560type=BaseCache 561addr_range=0:18446744073709551615 562assoc=8 563block_size=64 564forward_snoops=true 565hash_delay=1 566is_top_level=false 567latency=10000 568max_miss_count=0 569mshrs=92 570num_cpus=1 571prefetch_data_accesses_only=false 572prefetch_degree=1 573prefetch_latency=100000 574prefetch_on_access=false 575prefetch_past_page=false 576prefetch_policy=none 577prefetch_serial_squash=false 578prefetch_use_cpu_id=true 579prefetcher_size=100 580prioritizeRequests=false 581repl=Null 582size=4194304 583subblock_size=0 584tgts_per_mshr=16 585trace_addr=0 586two_queue=false 587write_buffers=8 588cpu_side=system.toL2Bus.port[0] 589mem_side=system.membus.port[8] 590 591[system.membus] 592type=Bus 593children=badaddr_responder 594block_size=64 595bus_id=1 596clock=1000 597header_cycles=1 598use_default_range=false 599width=64 600default=system.membus.badaddr_responder.pio 601port=system.bridge.side_b system.diskmem.port[0] system.physmem.port[0] system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio system.iocache.mem_side system.l2c.mem_side 602 603[system.membus.badaddr_responder] 604type=IsaFake 605fake_mem=false 606pio_addr=0 607pio_latency=1000 608pio_size=8 609platform=system.realview 610ret_bad_addr=true 611ret_data16=65535 612ret_data32=4294967295 613ret_data64=18446744073709551615 614ret_data8=255 615system=system 616update_data=false 617warn_access=warn 618pio=system.membus.default 619 620[system.physmem] 621type=PhysicalMemory 622file= 623latency=30000 624latency_var=0 625null=false 626range=0:134217727 627zero=true 628port=system.membus.port[2] 629 630[system.realview] 631type=RealView 632children=a9scu aaci_fake cf_ctrl clcd dmac_fake flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake realview_io rtc_fake sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake 633intrctrl=system.intrctrl 634system=system 635 636[system.realview.a9scu] 637type=A9SCU 638pio_addr=520093696 639pio_latency=1000 640platform=system.realview 641system=system 642pio=system.membus.port[5] 643 644[system.realview.aaci_fake] 645type=AmbaFake 646amba_id=0 647ignore_access=false 648pio_addr=268451840 649pio_latency=1000 650platform=system.realview 651system=system 652pio=system.iobus.port[21] 653 654[system.realview.cf_ctrl] 655type=IdeController 656BAR0=402653184 657BAR0LegacyIO=true 658BAR0Size=16 659BAR1=402653440 660BAR1LegacyIO=true 661BAR1Size=1 662BAR2=1 663BAR2LegacyIO=false 664BAR2Size=8 665BAR3=1 666BAR3LegacyIO=false 667BAR3Size=4 668BAR4=1 669BAR4LegacyIO=false 670BAR4Size=16 671BAR5=1 672BAR5LegacyIO=false 673BAR5Size=0 674BIST=0 675CacheLineSize=0 676CardbusCIS=0 677ClassCode=1 678Command=1 679DeviceID=28945 680ExpansionROM=0 681HeaderType=0 682InterruptLine=31 683InterruptPin=1 684LatencyTimer=0 685MaximumLatency=0 686MinimumGrant=0 687ProgIF=133 688Revision=0 689Status=640 690SubClassCode=1 691SubsystemID=0 692SubsystemVendorID=0 693VendorID=32902 694config_latency=20000 695ctrl_offset=2 696disks= 697io_shift=1 698max_backoff_delay=10000000 699min_backoff_delay=4000 700pci_bus=0 701pci_dev=0 702pci_func=0 703pio_latency=1000 704platform=system.realview 705system=system 706config=system.iobus.port[26] 707dma=system.iobus.port[27] 708pio=system.iobus.port[8] 709 710[system.realview.clcd] 711type=Pl111 712amba_id=1315089 713clock=41667 714gic=system.realview.gic 715int_num=55 716max_backoff_delay=10000000 717min_backoff_delay=4000 718pio_addr=268566528 719pio_latency=10000 720platform=system.realview 721system=system 722vnc=system.vncserver 723dma=system.iobus.port[28] 724pio=system.iobus.port[5] 725 726[system.realview.dmac_fake] 727type=AmbaFake 728amba_id=0 729ignore_access=false 730pio_addr=268632064 731pio_latency=1000 732platform=system.realview 733system=system 734pio=system.iobus.port[9] 735 736[system.realview.flash_fake] 737type=IsaFake 738fake_mem=true 739pio_addr=1073741824 740pio_latency=1000 741pio_size=536870912 742platform=system.realview 743ret_bad_addr=false 744ret_data16=65535 745ret_data32=4294967295 746ret_data64=18446744073709551615 747ret_data8=255 748system=system 749update_data=false 750warn_access= 751pio=system.iobus.port[24] 752 753[system.realview.gic] 754type=Gic 755cpu_addr=520093952 756cpu_pio_delay=10000 757dist_addr=520097792 758dist_pio_delay=10000 759int_latency=10000 760it_lines=128 761platform=system.realview 762system=system 763pio=system.membus.port[3] 764 765[system.realview.gpio0_fake] 766type=AmbaFake 767amba_id=0 768ignore_access=false 769pio_addr=268513280 770pio_latency=1000 771platform=system.realview 772system=system 773pio=system.iobus.port[16] 774 775[system.realview.gpio1_fake] 776type=AmbaFake 777amba_id=0 778ignore_access=false 779pio_addr=268517376 780pio_latency=1000 781platform=system.realview 782system=system 783pio=system.iobus.port[17] 784 785[system.realview.gpio2_fake] 786type=AmbaFake 787amba_id=0 788ignore_access=false 789pio_addr=268521472 790pio_latency=1000 791platform=system.realview 792system=system 793pio=system.iobus.port[18] 794 795[system.realview.kmi0] 796type=Pl050 797amba_id=1314896 798gic=system.realview.gic 799int_delay=1000000 800int_num=52 801is_mouse=false 802pio_addr=268460032 803pio_latency=1000 804platform=system.realview 805system=system 806vnc=system.vncserver 807pio=system.iobus.port[6] 808 809[system.realview.kmi1] 810type=Pl050 811amba_id=1314896 812gic=system.realview.gic 813int_delay=1000000 814int_num=53 815is_mouse=true 816pio_addr=268464128 817pio_latency=1000 818platform=system.realview 819system=system 820vnc=system.vncserver 821pio=system.iobus.port[7] 822 823[system.realview.l2x0_fake] 824type=IsaFake 825fake_mem=false 826pio_addr=520101888 827pio_latency=1000 828pio_size=4095 829platform=system.realview 830ret_bad_addr=false 831ret_data16=65535 832ret_data32=4294967295 833ret_data64=18446744073709551615 834ret_data8=255 835system=system 836update_data=false 837warn_access= 838pio=system.membus.port[4] 839 840[system.realview.local_cpu_timer] 841type=CpuLocalTimer 842clock=1000 843gic=system.realview.gic 844int_num_timer=29 845int_num_watchdog=30 846pio_addr=520095232 847pio_latency=1000 848platform=system.realview 849system=system 850pio=system.membus.port[6] 851 852[system.realview.mmc_fake] 853type=AmbaFake 854amba_id=0 855ignore_access=false 856pio_addr=268455936 857pio_latency=1000 858platform=system.realview 859system=system 860pio=system.iobus.port[22] 861 862[system.realview.realview_io] 863type=RealViewCtrl 864idreg=0 865pio_addr=268435456 866pio_latency=1000 867platform=system.realview 868proc_id=201326592 869system=system 870pio=system.iobus.port[2] 871 872[system.realview.rtc_fake] 873type=AmbaFake 874amba_id=266289 875ignore_access=false 876pio_addr=268529664 877pio_latency=1000 878platform=system.realview 879system=system 880pio=system.iobus.port[23] 881 882[system.realview.sci_fake] 883type=AmbaFake 884amba_id=0 885ignore_access=false 886pio_addr=268492800 887pio_latency=1000 888platform=system.realview 889system=system 890pio=system.iobus.port[20] 891 892[system.realview.smc_fake] 893type=AmbaFake 894amba_id=0 895ignore_access=false 896pio_addr=269357056 897pio_latency=1000 898platform=system.realview 899system=system 900pio=system.iobus.port[13] 901 902[system.realview.sp810_fake] 903type=AmbaFake 904amba_id=0 905ignore_access=true 906pio_addr=268439552 907pio_latency=1000 908platform=system.realview 909system=system 910pio=system.iobus.port[14] 911 912[system.realview.ssp_fake] 913type=AmbaFake 914amba_id=0 915ignore_access=false 916pio_addr=268488704 917pio_latency=1000 918platform=system.realview 919system=system 920pio=system.iobus.port[19] 921 922[system.realview.timer0] 923type=Sp804 924amba_id=1316868 925clock0=1000000 926clock1=1000000 927gic=system.realview.gic 928int_num0=36 929int_num1=36 930pio_addr=268505088 931pio_latency=1000 932platform=system.realview 933system=system 934pio=system.iobus.port[3] 935 936[system.realview.timer1] 937type=Sp804 938amba_id=1316868 939clock0=1000000 940clock1=1000000 941gic=system.realview.gic 942int_num0=37 943int_num1=37 944pio_addr=268509184 945pio_latency=1000 946platform=system.realview 947system=system 948pio=system.iobus.port[4] 949 950[system.realview.uart] 951type=Pl011 952end_on_eot=false 953gic=system.realview.gic 954int_delay=100000 955int_num=44 956pio_addr=268472320 957pio_latency=1000 958platform=system.realview 959system=system 960terminal=system.terminal 961pio=system.iobus.port[1] 962 963[system.realview.uart1_fake] 964type=AmbaFake 965amba_id=0 966ignore_access=false 967pio_addr=268476416 968pio_latency=1000 969platform=system.realview 970system=system 971pio=system.iobus.port[10] 972 973[system.realview.uart2_fake] 974type=AmbaFake 975amba_id=0 976ignore_access=false 977pio_addr=268480512 978pio_latency=1000 979platform=system.realview 980system=system 981pio=system.iobus.port[11] 982 983[system.realview.uart3_fake] 984type=AmbaFake 985amba_id=0 986ignore_access=false 987pio_addr=268484608 988pio_latency=1000 989platform=system.realview 990system=system 991pio=system.iobus.port[12] 992 993[system.realview.watchdog_fake] 994type=AmbaFake 995amba_id=0 996ignore_access=false 997pio_addr=268500992 998pio_latency=1000 999platform=system.realview 1000system=system 1001pio=system.iobus.port[15] 1002 1003[system.terminal] 1004type=Terminal 1005intr_control=system.intrctrl 1006number=0 1007output=true 1008port=3456 1009 1010[system.toL2Bus] 1011type=Bus 1012block_size=64 1013bus_id=0 1014clock=1000 1015header_cycles=1 1016use_default_range=false 1017width=64 1018port=system.l2c.cpu_side system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 1019 1020[system.vncserver] 1021type=VncServer 1022number=0 1023port=5900 1024 1025