1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxArmSystem 13children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain 14atags_addr=134217728 15boot_loader=/usr/local/google/home/gabeblack/gem5/dist/m5/system/binaries/boot_emm.arm 16boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1 17cache_line_size=64 18clk_domain=system.clk_domain 19default_p_state=UNDEFINED 20dtb_filename=/usr/local/google/home/gabeblack/gem5/dist/m5/system/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb 21early_kernel_symbols=false 22enable_context_switch_stats_dump=false 23eventq_index=0 24exit_on_work_items=false 25flags_addr=469827632 26gic_cpu_addr=738205696 27have_large_asid_64=false 28have_lpae=true 29have_security=false 30have_virtualization=false 31highest_el_is_64=false 32init_param=0 33kernel=/usr/local/google/home/gabeblack/gem5/dist/m5/system/binaries/vmlinux.aarch32.ll_20131205.0-gem5 34kernel_addr_check=true 35load_addr_mask=268435455 36load_offset=2147483648 37machine_type=VExpress_EMM 38mem_mode=timing 39mem_ranges=2147483648:2415919103:0:0:0:0 40memories=system.physmem system.realview.nvmem system.realview.vram 41mmap_using_noreserve=false 42multi_proc=true 43multi_thread=false 44num_work_ids=16 45p_state_clk_gate_bins=20 46p_state_clk_gate_max=1000000000000 47p_state_clk_gate_min=1000 48panic_on_oops=true 49panic_on_panic=true 50phys_addr_range_64=40 51power_model=Null 52readfile=/usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../halt.sh 53reset_addr_64=0 54symbolfile= 55thermal_components= 56thermal_model=Null 57work_begin_ckpt_count=0 58work_begin_cpu_id_exit=-1 59work_begin_exit_count=0 60work_cpus_ckpt_count=0 61work_end_ckpt_count=0 62work_end_exit_count=0 63work_item_id=-1 64system_port=system.membus.slave[1] 65 66[system.bridge] 67type=Bridge 68clk_domain=system.clk_domain 69default_p_state=UNDEFINED 70delay=50000 71eventq_index=0 72p_state_clk_gate_bins=20 73p_state_clk_gate_max=1000000000000 74p_state_clk_gate_min=1000 75power_model=Null 76ranges=788529152:805306367:0:0:0:0 721420288:725614591:0:0:0:0 805306368:1073741823:0:0:0:0 1073741824:1610612735:0:0:0:0 402653184:469762047:0:0:0:0 469762048:536870911:0:0:0:0 77req_size=16 78resp_size=16 79master=system.iobus.slave[0] 80slave=system.membus.master[0] 81 82[system.cf0] 83type=IdeDisk 84children=image 85delay=1000000 86driveID=master 87eventq_index=0 88image=system.cf0.image 89 90[system.cf0.image] 91type=CowDiskImage 92children=child 93child=system.cf0.image.child 94eventq_index=0 95image_file= 96read_only=false 97table_size=65536 98 99[system.cf0.image.child] 100type=RawDiskImage 101eventq_index=0 102image_file=/usr/local/google/home/gabeblack/gem5/dist/m5/system/disks/linux-aarch32-ael.img 103read_only=true 104 105[system.clk_domain] 106type=SrcClockDomain 107clock=1000 108domain_id=-1 109eventq_index=0 110init_perf_level=0 111voltage_domain=system.voltage_domain 112 113[system.cpu] 114type=DerivO3CPU 115children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer 116LFSTSize=1024 117LQEntries=16 118LSQCheckLoads=true 119LSQDepCheckShift=0 120SQEntries=16 121SSITSize=1024 122activity=0 123backComSize=5 124branchPred=system.cpu.branchPred 125cacheStorePorts=200 126checker=Null 127clk_domain=system.cpu_clk_domain 128commitToDecodeDelay=1 129commitToFetchDelay=1 130commitToIEWDelay=1 131commitToRenameDelay=1 132commitWidth=8 133cpu_id=0 134decodeToFetchDelay=1 135decodeToRenameDelay=2 136decodeWidth=3 137default_p_state=UNDEFINED 138dispatchWidth=6 139do_checkpoint_insts=true 140do_quiesce=true 141do_statistics_insts=true 142dstage2_mmu=system.cpu.dstage2_mmu 143dtb=system.cpu.dtb 144eventq_index=0 145fetchBufferSize=16 146fetchQueueSize=32 147fetchToDecodeDelay=3 148fetchTrapLatency=1 149fetchWidth=3 150forwardComSize=5 151fuPool=system.cpu.fuPool 152function_trace=false 153function_trace_start=0 154iewToCommitDelay=1 155iewToDecodeDelay=1 156iewToFetchDelay=1 157iewToRenameDelay=1 158interrupts=system.cpu.interrupts 159isa=system.cpu.isa 160issueToExecuteDelay=1 161issueWidth=8 162istage2_mmu=system.cpu.istage2_mmu 163itb=system.cpu.itb 164max_insts_all_threads=0 165max_insts_any_thread=0 166max_loads_all_threads=0 167max_loads_any_thread=0 168needsTSO=false 169numIQEntries=32 170numPhysCCRegs=640 171numPhysFloatRegs=192 172numPhysIntRegs=128 173numROBEntries=40 174numRobs=1 175numThreads=1 176p_state_clk_gate_bins=20 177p_state_clk_gate_max=1000000000000 178p_state_clk_gate_min=1000 179power_model=Null 180profile=0 181progress_interval=0 182renameToDecodeDelay=1 183renameToFetchDelay=1 184renameToIEWDelay=1 185renameToROBDelay=1 186renameWidth=3 187simpoint_start_insts= 188smtCommitPolicy=RoundRobin 189smtFetchPolicy=SingleThread 190smtIQPolicy=Partitioned 191smtIQThreshold=100 192smtLSQPolicy=Partitioned 193smtLSQThreshold=100 194smtNumFetchingThreads=1 195smtROBPolicy=Partitioned 196smtROBThreshold=100 197socket_id=0 198squashWidth=8 199store_set_clear_period=250000 200switched_out=false 201syscallRetryLatency=10000 202system=system 203tracer=system.cpu.tracer 204trapLatency=13 205wbWidth=8 206workload= 207dcache_port=system.cpu.dcache.cpu_side 208icache_port=system.cpu.icache.cpu_side 209 210[system.cpu.branchPred] 211type=BiModeBP 212BTBEntries=2048 213BTBTagSize=18 214RASSize=16 215choiceCtrBits=2 216choicePredictorSize=8192 217eventq_index=0 218globalCtrBits=2 219globalPredictorSize=8192 220indirectHashGHR=true 221indirectHashTargets=true 222indirectPathLength=3 223indirectSets=256 224indirectTagSize=16 225indirectWays=2 226instShiftAmt=2 227numThreads=1 228useIndirect=true 229 230[system.cpu.dcache] 231type=Cache 232children=tags 233addr_ranges=0:18446744073709551615:0:0:0:0 234assoc=4 235clk_domain=system.cpu_clk_domain 236clusivity=mostly_incl 237data_latency=2 238default_p_state=UNDEFINED 239demand_mshr_reserve=1 240eventq_index=0 241is_read_only=false 242max_miss_count=0 243mshrs=4 244p_state_clk_gate_bins=20 245p_state_clk_gate_max=1000000000000 246p_state_clk_gate_min=1000 247power_model=Null 248prefetch_on_access=false 249prefetcher=Null 250response_latency=2 251sequential_access=false 252size=32768 253system=system 254tag_latency=2 255tags=system.cpu.dcache.tags 256tgts_per_mshr=20 257write_buffers=8 258writeback_clean=false 259cpu_side=system.cpu.dcache_port 260mem_side=system.cpu.toL2Bus.slave[1] 261 262[system.cpu.dcache.tags] 263type=LRU 264assoc=4 265block_size=64 266clk_domain=system.cpu_clk_domain 267data_latency=2 268default_p_state=UNDEFINED 269eventq_index=0 270p_state_clk_gate_bins=20 271p_state_clk_gate_max=1000000000000 272p_state_clk_gate_min=1000 273power_model=Null 274sequential_access=false 275size=32768 276tag_latency=2 277 278[system.cpu.dstage2_mmu] 279type=ArmStage2MMU 280children=stage2_tlb 281eventq_index=0 282stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 283sys=system 284tlb=system.cpu.dtb 285 286[system.cpu.dstage2_mmu.stage2_tlb] 287type=ArmTLB 288children=walker 289eventq_index=0 290is_stage2=true 291size=32 292walker=system.cpu.dstage2_mmu.stage2_tlb.walker 293 294[system.cpu.dstage2_mmu.stage2_tlb.walker] 295type=ArmTableWalker 296clk_domain=system.cpu_clk_domain 297default_p_state=UNDEFINED 298eventq_index=0 299is_stage2=true 300num_squash_per_cycle=2 301p_state_clk_gate_bins=20 302p_state_clk_gate_max=1000000000000 303p_state_clk_gate_min=1000 304power_model=Null 305sys=system 306 307[system.cpu.dtb] 308type=ArmTLB 309children=walker 310eventq_index=0 311is_stage2=false 312size=64 313walker=system.cpu.dtb.walker 314 315[system.cpu.dtb.walker] 316type=ArmTableWalker 317clk_domain=system.cpu_clk_domain 318default_p_state=UNDEFINED 319eventq_index=0 320is_stage2=false 321num_squash_per_cycle=2 322p_state_clk_gate_bins=20 323p_state_clk_gate_max=1000000000000 324p_state_clk_gate_min=1000 325power_model=Null 326sys=system 327port=system.cpu.toL2Bus.slave[3] 328 329[system.cpu.fuPool] 330type=FUPool 331children=FUList0 FUList1 FUList2 FUList3 FUList4 332FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 333eventq_index=0 334 335[system.cpu.fuPool.FUList0] 336type=FUDesc 337children=opList 338count=2 339eventq_index=0 340opList=system.cpu.fuPool.FUList0.opList 341 342[system.cpu.fuPool.FUList0.opList] 343type=OpDesc 344eventq_index=0 345opClass=IntAlu 346opLat=1 347pipelined=true 348 349[system.cpu.fuPool.FUList1] 350type=FUDesc 351children=opList0 opList1 opList2 352count=1 353eventq_index=0 354opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 system.cpu.fuPool.FUList1.opList2 355 356[system.cpu.fuPool.FUList1.opList0] 357type=OpDesc 358eventq_index=0 359opClass=IntMult 360opLat=3 361pipelined=true 362 363[system.cpu.fuPool.FUList1.opList1] 364type=OpDesc 365eventq_index=0 366opClass=IntDiv 367opLat=12 368pipelined=false 369 370[system.cpu.fuPool.FUList1.opList2] 371type=OpDesc 372eventq_index=0 373opClass=IprAccess 374opLat=3 375pipelined=true 376 377[system.cpu.fuPool.FUList2] 378type=FUDesc 379children=opList0 opList1 380count=1 381eventq_index=0 382opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 383 384[system.cpu.fuPool.FUList2.opList0] 385type=OpDesc 386eventq_index=0 387opClass=MemRead 388opLat=2 389pipelined=true 390 391[system.cpu.fuPool.FUList2.opList1] 392type=OpDesc 393eventq_index=0 394opClass=FloatMemRead 395opLat=2 396pipelined=true 397 398[system.cpu.fuPool.FUList3] 399type=FUDesc 400children=opList0 opList1 401count=1 402eventq_index=0 403opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 404 405[system.cpu.fuPool.FUList3.opList0] 406type=OpDesc 407eventq_index=0 408opClass=MemWrite 409opLat=2 410pipelined=true 411 412[system.cpu.fuPool.FUList3.opList1] 413type=OpDesc 414eventq_index=0 415opClass=FloatMemWrite 416opLat=2 417pipelined=true 418 419[system.cpu.fuPool.FUList4] 420type=FUDesc 421children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 opList20 opList21 opList22 opList23 opList24 opList25 opList26 opList27 422count=2 423eventq_index=0 424opList=system.cpu.fuPool.FUList4.opList00 system.cpu.fuPool.FUList4.opList01 system.cpu.fuPool.FUList4.opList02 system.cpu.fuPool.FUList4.opList03 system.cpu.fuPool.FUList4.opList04 system.cpu.fuPool.FUList4.opList05 system.cpu.fuPool.FUList4.opList06 system.cpu.fuPool.FUList4.opList07 system.cpu.fuPool.FUList4.opList08 system.cpu.fuPool.FUList4.opList09 system.cpu.fuPool.FUList4.opList10 system.cpu.fuPool.FUList4.opList11 system.cpu.fuPool.FUList4.opList12 system.cpu.fuPool.FUList4.opList13 system.cpu.fuPool.FUList4.opList14 system.cpu.fuPool.FUList4.opList15 system.cpu.fuPool.FUList4.opList16 system.cpu.fuPool.FUList4.opList17 system.cpu.fuPool.FUList4.opList18 system.cpu.fuPool.FUList4.opList19 system.cpu.fuPool.FUList4.opList20 system.cpu.fuPool.FUList4.opList21 system.cpu.fuPool.FUList4.opList22 system.cpu.fuPool.FUList4.opList23 system.cpu.fuPool.FUList4.opList24 system.cpu.fuPool.FUList4.opList25 system.cpu.fuPool.FUList4.opList26 system.cpu.fuPool.FUList4.opList27 425 426[system.cpu.fuPool.FUList4.opList00] 427type=OpDesc 428eventq_index=0 429opClass=SimdAdd 430opLat=4 431pipelined=true 432 433[system.cpu.fuPool.FUList4.opList01] 434type=OpDesc 435eventq_index=0 436opClass=SimdAddAcc 437opLat=4 438pipelined=true 439 440[system.cpu.fuPool.FUList4.opList02] 441type=OpDesc 442eventq_index=0 443opClass=SimdAlu 444opLat=4 445pipelined=true 446 447[system.cpu.fuPool.FUList4.opList03] 448type=OpDesc 449eventq_index=0 450opClass=SimdCmp 451opLat=4 452pipelined=true 453 454[system.cpu.fuPool.FUList4.opList04] 455type=OpDesc 456eventq_index=0 457opClass=SimdCvt 458opLat=3 459pipelined=true 460 461[system.cpu.fuPool.FUList4.opList05] 462type=OpDesc 463eventq_index=0 464opClass=SimdMisc 465opLat=3 466pipelined=true 467 468[system.cpu.fuPool.FUList4.opList06] 469type=OpDesc 470eventq_index=0 471opClass=SimdMult 472opLat=5 473pipelined=true 474 475[system.cpu.fuPool.FUList4.opList07] 476type=OpDesc 477eventq_index=0 478opClass=SimdMultAcc 479opLat=5 480pipelined=true 481 482[system.cpu.fuPool.FUList4.opList08] 483type=OpDesc 484eventq_index=0 485opClass=SimdShift 486opLat=3 487pipelined=true 488 489[system.cpu.fuPool.FUList4.opList09] 490type=OpDesc 491eventq_index=0 492opClass=SimdShiftAcc 493opLat=3 494pipelined=true 495 496[system.cpu.fuPool.FUList4.opList10] 497type=OpDesc 498eventq_index=0 499opClass=SimdSqrt 500opLat=9 501pipelined=true 502 503[system.cpu.fuPool.FUList4.opList11] 504type=OpDesc 505eventq_index=0 506opClass=SimdFloatAdd 507opLat=5 508pipelined=true 509 510[system.cpu.fuPool.FUList4.opList12] 511type=OpDesc 512eventq_index=0 513opClass=SimdFloatAlu 514opLat=5 515pipelined=true 516 517[system.cpu.fuPool.FUList4.opList13] 518type=OpDesc 519eventq_index=0 520opClass=SimdFloatCmp 521opLat=3 522pipelined=true 523 524[system.cpu.fuPool.FUList4.opList14] 525type=OpDesc 526eventq_index=0 527opClass=SimdFloatCvt 528opLat=3 529pipelined=true 530 531[system.cpu.fuPool.FUList4.opList15] 532type=OpDesc 533eventq_index=0 534opClass=SimdFloatDiv 535opLat=3 536pipelined=true 537 538[system.cpu.fuPool.FUList4.opList16] 539type=OpDesc 540eventq_index=0 541opClass=SimdFloatMisc 542opLat=3 543pipelined=true 544 545[system.cpu.fuPool.FUList4.opList17] 546type=OpDesc 547eventq_index=0 548opClass=SimdFloatMult 549opLat=3 550pipelined=true 551 552[system.cpu.fuPool.FUList4.opList18] 553type=OpDesc 554eventq_index=0 555opClass=SimdFloatMultAcc 556opLat=5 557pipelined=true 558 559[system.cpu.fuPool.FUList4.opList19] 560type=OpDesc 561eventq_index=0 562opClass=SimdFloatSqrt 563opLat=9 564pipelined=true 565 566[system.cpu.fuPool.FUList4.opList20] 567type=OpDesc 568eventq_index=0 569opClass=FloatAdd 570opLat=5 571pipelined=true 572 573[system.cpu.fuPool.FUList4.opList21] 574type=OpDesc 575eventq_index=0 576opClass=FloatCmp 577opLat=5 578pipelined=true 579 580[system.cpu.fuPool.FUList4.opList22] 581type=OpDesc 582eventq_index=0 583opClass=FloatCvt 584opLat=5 585pipelined=true 586 587[system.cpu.fuPool.FUList4.opList23] 588type=OpDesc 589eventq_index=0 590opClass=FloatDiv 591opLat=9 592pipelined=false 593 594[system.cpu.fuPool.FUList4.opList24] 595type=OpDesc 596eventq_index=0 597opClass=FloatSqrt 598opLat=33 599pipelined=false 600 601[system.cpu.fuPool.FUList4.opList25] 602type=OpDesc 603eventq_index=0 604opClass=FloatMult 605opLat=4 606pipelined=true 607 608[system.cpu.fuPool.FUList4.opList26] 609type=OpDesc 610eventq_index=0 611opClass=FloatMultAcc 612opLat=5 613pipelined=true 614 615[system.cpu.fuPool.FUList4.opList27] 616type=OpDesc 617eventq_index=0 618opClass=FloatMisc 619opLat=3 620pipelined=true 621 622[system.cpu.icache] 623type=Cache 624children=tags 625addr_ranges=0:18446744073709551615:0:0:0:0 626assoc=1 627clk_domain=system.cpu_clk_domain 628clusivity=mostly_incl 629data_latency=2 630default_p_state=UNDEFINED 631demand_mshr_reserve=1 632eventq_index=0 633is_read_only=true 634max_miss_count=0 635mshrs=4 636p_state_clk_gate_bins=20 637p_state_clk_gate_max=1000000000000 638p_state_clk_gate_min=1000 639power_model=Null 640prefetch_on_access=false 641prefetcher=Null 642response_latency=2 643sequential_access=false 644size=32768 645system=system 646tag_latency=2 647tags=system.cpu.icache.tags 648tgts_per_mshr=20 649write_buffers=8 650writeback_clean=true 651cpu_side=system.cpu.icache_port 652mem_side=system.cpu.toL2Bus.slave[0] 653 654[system.cpu.icache.tags] 655type=LRU 656assoc=1 657block_size=64 658clk_domain=system.cpu_clk_domain 659data_latency=2 660default_p_state=UNDEFINED 661eventq_index=0 662p_state_clk_gate_bins=20 663p_state_clk_gate_max=1000000000000 664p_state_clk_gate_min=1000 665power_model=Null 666sequential_access=false 667size=32768 668tag_latency=2 669 670[system.cpu.interrupts] 671type=ArmInterrupts 672eventq_index=0 673 674[system.cpu.isa] 675type=ArmISA 676decoderFlavour=Generic 677eventq_index=0 678fpsid=1090793632 679id_aa64afr0_el1=0 680id_aa64afr1_el1=0 681id_aa64dfr0_el1=1052678 682id_aa64dfr1_el1=0 683id_aa64isar0_el1=0 684id_aa64isar1_el1=0 685id_aa64mmfr0_el1=15728642 686id_aa64mmfr1_el1=0 687id_isar0=34607377 688id_isar1=34677009 689id_isar2=555950401 690id_isar3=17899825 691id_isar4=268501314 692id_isar5=0 693id_mmfr0=270536963 694id_mmfr1=0 695id_mmfr2=19070976 696id_mmfr3=34611729 697midr=1091551472 698pmu=Null 699system=system 700 701[system.cpu.istage2_mmu] 702type=ArmStage2MMU 703children=stage2_tlb 704eventq_index=0 705stage2_tlb=system.cpu.istage2_mmu.stage2_tlb 706sys=system 707tlb=system.cpu.itb 708 709[system.cpu.istage2_mmu.stage2_tlb] 710type=ArmTLB 711children=walker 712eventq_index=0 713is_stage2=true 714size=32 715walker=system.cpu.istage2_mmu.stage2_tlb.walker 716 717[system.cpu.istage2_mmu.stage2_tlb.walker] 718type=ArmTableWalker 719clk_domain=system.cpu_clk_domain 720default_p_state=UNDEFINED 721eventq_index=0 722is_stage2=true 723num_squash_per_cycle=2 724p_state_clk_gate_bins=20 725p_state_clk_gate_max=1000000000000 726p_state_clk_gate_min=1000 727power_model=Null 728sys=system 729 730[system.cpu.itb] 731type=ArmTLB 732children=walker 733eventq_index=0 734is_stage2=false 735size=64 736walker=system.cpu.itb.walker 737 738[system.cpu.itb.walker] 739type=ArmTableWalker 740clk_domain=system.cpu_clk_domain 741default_p_state=UNDEFINED 742eventq_index=0 743is_stage2=false 744num_squash_per_cycle=2 745p_state_clk_gate_bins=20 746p_state_clk_gate_max=1000000000000 747p_state_clk_gate_min=1000 748power_model=Null 749sys=system 750port=system.cpu.toL2Bus.slave[2] 751 752[system.cpu.l2cache] 753type=Cache 754children=tags 755addr_ranges=0:18446744073709551615:0:0:0:0 756assoc=8 757clk_domain=system.cpu_clk_domain 758clusivity=mostly_incl 759data_latency=20 760default_p_state=UNDEFINED 761demand_mshr_reserve=1 762eventq_index=0 763is_read_only=false 764max_miss_count=0 765mshrs=20 766p_state_clk_gate_bins=20 767p_state_clk_gate_max=1000000000000 768p_state_clk_gate_min=1000 769power_model=Null 770prefetch_on_access=false 771prefetcher=Null 772response_latency=20 773sequential_access=false 774size=4194304 775system=system 776tag_latency=20 777tags=system.cpu.l2cache.tags 778tgts_per_mshr=12 779write_buffers=8 780writeback_clean=false 781cpu_side=system.cpu.toL2Bus.master[0] 782mem_side=system.membus.slave[2] 783 784[system.cpu.l2cache.tags] 785type=LRU 786assoc=8 787block_size=64 788clk_domain=system.cpu_clk_domain 789data_latency=20 790default_p_state=UNDEFINED 791eventq_index=0 792p_state_clk_gate_bins=20 793p_state_clk_gate_max=1000000000000 794p_state_clk_gate_min=1000 795power_model=Null 796sequential_access=false 797size=4194304 798tag_latency=20 799 800[system.cpu.toL2Bus] 801type=CoherentXBar 802children=snoop_filter 803clk_domain=system.cpu_clk_domain 804default_p_state=UNDEFINED 805eventq_index=0 806forward_latency=0 807frontend_latency=1 808p_state_clk_gate_bins=20 809p_state_clk_gate_max=1000000000000 810p_state_clk_gate_min=1000 811point_of_coherency=false 812power_model=Null 813response_latency=1 814snoop_filter=system.cpu.toL2Bus.snoop_filter 815snoop_response_latency=1 816system=system 817use_default_range=false 818width=32 819master=system.cpu.l2cache.cpu_side 820slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 821 822[system.cpu.toL2Bus.snoop_filter] 823type=SnoopFilter 824eventq_index=0 825lookup_latency=0 826max_capacity=8388608 827system=system 828 829[system.cpu.tracer] 830type=ExeTracer 831eventq_index=0 832 833[system.cpu_clk_domain] 834type=SrcClockDomain 835clock=500 836domain_id=-1 837eventq_index=0 838init_perf_level=0 839voltage_domain=system.voltage_domain 840 841[system.dvfs_handler] 842type=DVFSHandler 843domains= 844enable=false 845eventq_index=0 846sys_clk_domain=system.clk_domain 847transition_latency=100000000 848 849[system.intrctrl] 850type=IntrControl 851eventq_index=0 852sys=system 853 854[system.iobus] 855type=NoncoherentXBar 856clk_domain=system.clk_domain 857default_p_state=UNDEFINED 858eventq_index=0 859forward_latency=1 860frontend_latency=2 861p_state_clk_gate_bins=20 862p_state_clk_gate_max=1000000000000 863p_state_clk_gate_min=1000 864power_model=Null 865response_latency=2 866use_default_range=false 867width=16 868master=system.realview.uart.pio system.realview.realview_io.pio system.realview.pci_host.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ethernet.pio system.iocache.cpu_side 869slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma 870 871[system.iocache] 872type=Cache 873children=tags 874addr_ranges=2147483648:2415919103:0:0:0:0 875assoc=8 876clk_domain=system.clk_domain 877clusivity=mostly_incl 878data_latency=50 879default_p_state=UNDEFINED 880demand_mshr_reserve=1 881eventq_index=0 882is_read_only=false 883max_miss_count=0 884mshrs=20 885p_state_clk_gate_bins=20 886p_state_clk_gate_max=1000000000000 887p_state_clk_gate_min=1000 888power_model=Null 889prefetch_on_access=false 890prefetcher=Null 891response_latency=50 892sequential_access=false 893size=1024 894system=system 895tag_latency=50 896tags=system.iocache.tags 897tgts_per_mshr=12 898write_buffers=8 899writeback_clean=false 900cpu_side=system.iobus.master[25] 901mem_side=system.membus.slave[3] 902 903[system.iocache.tags] 904type=LRU 905assoc=8 906block_size=64 907clk_domain=system.clk_domain 908data_latency=50 909default_p_state=UNDEFINED 910eventq_index=0 911p_state_clk_gate_bins=20 912p_state_clk_gate_max=1000000000000 913p_state_clk_gate_min=1000 914power_model=Null 915sequential_access=false 916size=1024 917tag_latency=50 918 919[system.membus] 920type=CoherentXBar 921children=badaddr_responder snoop_filter 922clk_domain=system.clk_domain 923default_p_state=UNDEFINED 924eventq_index=0 925forward_latency=4 926frontend_latency=3 927p_state_clk_gate_bins=20 928p_state_clk_gate_max=1000000000000 929p_state_clk_gate_min=1000 930point_of_coherency=true 931power_model=Null 932response_latency=2 933snoop_filter=system.membus.snoop_filter 934snoop_response_latency=4 935system=system 936use_default_range=false 937width=16 938default=system.membus.badaddr_responder.pio 939master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port 940slave=system.realview.hdlcd.dma system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side 941 942[system.membus.badaddr_responder] 943type=IsaFake 944clk_domain=system.clk_domain 945default_p_state=UNDEFINED 946eventq_index=0 947fake_mem=false 948p_state_clk_gate_bins=20 949p_state_clk_gate_max=1000000000000 950p_state_clk_gate_min=1000 951pio_addr=0 952pio_latency=100000 953pio_size=8 954power_model=Null 955ret_bad_addr=true 956ret_data16=65535 957ret_data32=4294967295 958ret_data64=18446744073709551615 959ret_data8=255 960system=system 961update_data=false 962warn_access=warn 963pio=system.membus.default 964 965[system.membus.snoop_filter] 966type=SnoopFilter 967eventq_index=0 968lookup_latency=1 969max_capacity=8388608 970system=system 971 972[system.physmem] 973type=DRAMCtrl 974IDD0=0.055000 975IDD02=0.000000 976IDD2N=0.032000 977IDD2N2=0.000000 978IDD2P0=0.000000 979IDD2P02=0.000000 980IDD2P1=0.032000 981IDD2P12=0.000000 982IDD3N=0.038000 983IDD3N2=0.000000 984IDD3P0=0.000000 985IDD3P02=0.000000 986IDD3P1=0.038000 987IDD3P12=0.000000 988IDD4R=0.157000 989IDD4R2=0.000000 990IDD4W=0.125000 991IDD4W2=0.000000 992IDD5=0.235000 993IDD52=0.000000 994IDD6=0.020000 995IDD62=0.000000 996VDD=1.500000 997VDD2=0.000000 998activation_limit=4 999addr_mapping=RoRaBaCoCh 1000bank_groups_per_rank=0 1001banks_per_rank=8 1002burst_length=8 1003channels=1 1004clk_domain=system.clk_domain 1005conf_table_reported=true 1006default_p_state=UNDEFINED 1007device_bus_width=8 1008device_rowbuffer_size=1024 1009device_size=536870912 1010devices_per_rank=8 1011dll=true 1012eventq_index=0 1013in_addr_map=true 1014kvm_map=true 1015max_accesses_per_row=16 1016mem_sched_policy=frfcfs 1017min_writes_per_switch=16 1018null=false 1019p_state_clk_gate_bins=20 1020p_state_clk_gate_max=1000000000000 1021p_state_clk_gate_min=1000 1022page_policy=open_adaptive 1023power_model=Null 1024range=2147483648:2415919103:0:0:0:0 1025ranks_per_channel=2 1026read_buffer_size=32 1027static_backend_latency=10000 1028static_frontend_latency=10000 1029tBURST=5000 1030tCCD_L=0 1031tCK=1250 1032tCL=13750 1033tCS=2500 1034tRAS=35000 1035tRCD=13750 1036tREFI=7800000 1037tRFC=260000 1038tRP=13750 1039tRRD=6000 1040tRRD_L=0 1041tRTP=7500 1042tRTW=2500 1043tWR=15000 1044tWTR=7500 1045tXAW=30000 1046tXP=6000 1047tXPDLL=0 1048tXS=270000 1049tXSDLL=0 1050write_buffer_size=64 1051write_high_thresh_perc=85 1052write_low_thresh_perc=50 1053port=system.membus.master[5] 1054 1055[system.realview] 1056type=RealView 1057children=aaci_fake cf_ctrl clcd dcc energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mcc mmc_fake nvmem pci_host realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake 1058eventq_index=0 1059intrctrl=system.intrctrl 1060system=system 1061 1062[system.realview.aaci_fake] 1063type=AmbaFake 1064amba_id=0 1065clk_domain=system.clk_domain 1066default_p_state=UNDEFINED 1067eventq_index=0 1068ignore_access=false 1069p_state_clk_gate_bins=20 1070p_state_clk_gate_max=1000000000000 1071p_state_clk_gate_min=1000 1072pio_addr=470024192 1073pio_latency=100000 1074power_model=Null 1075system=system 1076pio=system.iobus.master[18] 1077 1078[system.realview.cf_ctrl] 1079type=IdeController 1080BAR0=471465984 1081BAR0LegacyIO=true 1082BAR0Size=256 1083BAR1=471466240 1084BAR1LegacyIO=true 1085BAR1Size=4096 1086BAR2=1 1087BAR2LegacyIO=false 1088BAR2Size=8 1089BAR3=1 1090BAR3LegacyIO=false 1091BAR3Size=4 1092BAR4=1 1093BAR4LegacyIO=false 1094BAR4Size=16 1095BAR5=1 1096BAR5LegacyIO=false 1097BAR5Size=0 1098BIST=0 1099CacheLineSize=0 1100CapabilityPtr=0 1101CardbusCIS=0 1102ClassCode=1 1103Command=1 1104DeviceID=28945 1105ExpansionROM=0 1106HeaderType=0 1107InterruptLine=31 1108InterruptPin=1 1109LatencyTimer=0 1110LegacyIOBase=0 1111MSICAPBaseOffset=0 1112MSICAPCapId=0 1113MSICAPMaskBits=0 1114MSICAPMsgAddr=0 1115MSICAPMsgCtrl=0 1116MSICAPMsgData=0 1117MSICAPMsgUpperAddr=0 1118MSICAPNextCapability=0 1119MSICAPPendingBits=0 1120MSIXCAPBaseOffset=0 1121MSIXCAPCapId=0 1122MSIXCAPNextCapability=0 1123MSIXMsgCtrl=0 1124MSIXPbaOffset=0 1125MSIXTableOffset=0 1126MaximumLatency=0 1127MinimumGrant=0 1128PMCAPBaseOffset=0 1129PMCAPCapId=0 1130PMCAPCapabilities=0 1131PMCAPCtrlStatus=0 1132PMCAPNextCapability=0 1133PXCAPBaseOffset=0 1134PXCAPCapId=0 1135PXCAPCapabilities=0 1136PXCAPDevCap2=0 1137PXCAPDevCapabilities=0 1138PXCAPDevCtrl=0 1139PXCAPDevCtrl2=0 1140PXCAPDevStatus=0 1141PXCAPLinkCap=0 1142PXCAPLinkCtrl=0 1143PXCAPLinkStatus=0 1144PXCAPNextCapability=0 1145ProgIF=133 1146Revision=0 1147Status=640 1148SubClassCode=1 1149SubsystemID=0 1150SubsystemVendorID=0 1151VendorID=32902 1152clk_domain=system.clk_domain 1153config_latency=20000 1154ctrl_offset=2 1155default_p_state=UNDEFINED 1156disks= 1157eventq_index=0 1158host=system.realview.pci_host 1159io_shift=2 1160p_state_clk_gate_bins=20 1161p_state_clk_gate_max=1000000000000 1162p_state_clk_gate_min=1000 1163pci_bus=2 1164pci_dev=0 1165pci_func=0 1166pio_latency=30000 1167power_model=Null 1168system=system 1169dma=system.iobus.slave[2] 1170pio=system.iobus.master[9] 1171 1172[system.realview.clcd] 1173type=Pl111 1174amba_id=1315089 1175clk_domain=system.clk_domain 1176default_p_state=UNDEFINED 1177enable_capture=true 1178eventq_index=0 1179gic=system.realview.gic 1180int_num=46 1181p_state_clk_gate_bins=20 1182p_state_clk_gate_max=1000000000000 1183p_state_clk_gate_min=1000 1184pio_addr=471793664 1185pio_latency=10000 1186pixel_clock=41667 1187power_model=Null 1188system=system 1189vnc=system.vncserver 1190dma=system.iobus.slave[1] 1191pio=system.iobus.master[5] 1192 1193[system.realview.dcc] 1194type=SubSystem 1195children=osc_cpu osc_ddr osc_hsbm osc_pxl osc_smb osc_sys 1196eventq_index=0 1197thermal_domain=Null 1198 1199[system.realview.dcc.osc_cpu] 1200type=RealViewOsc 1201dcc=0 1202device=0 1203eventq_index=0 1204freq=16667 1205parent=system.realview.realview_io 1206position=0 1207site=1 1208voltage_domain=system.voltage_domain 1209 1210[system.realview.dcc.osc_ddr] 1211type=RealViewOsc 1212dcc=0 1213device=8 1214eventq_index=0 1215freq=25000 1216parent=system.realview.realview_io 1217position=0 1218site=1 1219voltage_domain=system.voltage_domain 1220 1221[system.realview.dcc.osc_hsbm] 1222type=RealViewOsc 1223dcc=0 1224device=4 1225eventq_index=0 1226freq=25000 1227parent=system.realview.realview_io 1228position=0 1229site=1 1230voltage_domain=system.voltage_domain 1231 1232[system.realview.dcc.osc_pxl] 1233type=RealViewOsc 1234dcc=0 1235device=5 1236eventq_index=0 1237freq=42105 1238parent=system.realview.realview_io 1239position=0 1240site=1 1241voltage_domain=system.voltage_domain 1242 1243[system.realview.dcc.osc_smb] 1244type=RealViewOsc 1245dcc=0 1246device=6 1247eventq_index=0 1248freq=20000 1249parent=system.realview.realview_io 1250position=0 1251site=1 1252voltage_domain=system.voltage_domain 1253 1254[system.realview.dcc.osc_sys] 1255type=RealViewOsc 1256dcc=0 1257device=7 1258eventq_index=0 1259freq=16667 1260parent=system.realview.realview_io 1261position=0 1262site=1 1263voltage_domain=system.voltage_domain 1264 1265[system.realview.energy_ctrl] 1266type=EnergyCtrl 1267clk_domain=system.clk_domain 1268default_p_state=UNDEFINED 1269dvfs_handler=system.dvfs_handler 1270eventq_index=0 1271p_state_clk_gate_bins=20 1272p_state_clk_gate_max=1000000000000 1273p_state_clk_gate_min=1000 1274pio_addr=470286336 1275pio_latency=100000 1276power_model=Null 1277system=system 1278pio=system.iobus.master[22] 1279 1280[system.realview.ethernet] 1281type=IGbE 1282BAR0=0 1283BAR0LegacyIO=false 1284BAR0Size=131072 1285BAR1=0 1286BAR1LegacyIO=false 1287BAR1Size=0 1288BAR2=0 1289BAR2LegacyIO=false 1290BAR2Size=0 1291BAR3=0 1292BAR3LegacyIO=false 1293BAR3Size=0 1294BAR4=0 1295BAR4LegacyIO=false 1296BAR4Size=0 1297BAR5=0 1298BAR5LegacyIO=false 1299BAR5Size=0 1300BIST=0 1301CacheLineSize=0 1302CapabilityPtr=0 1303CardbusCIS=0 1304ClassCode=2 1305Command=0 1306DeviceID=4213 1307ExpansionROM=0 1308HeaderType=0 1309InterruptLine=1 1310InterruptPin=1 1311LatencyTimer=0 1312LegacyIOBase=0 1313MSICAPBaseOffset=0 1314MSICAPCapId=0 1315MSICAPMaskBits=0 1316MSICAPMsgAddr=0 1317MSICAPMsgCtrl=0 1318MSICAPMsgData=0 1319MSICAPMsgUpperAddr=0 1320MSICAPNextCapability=0 1321MSICAPPendingBits=0 1322MSIXCAPBaseOffset=0 1323MSIXCAPCapId=0 1324MSIXCAPNextCapability=0 1325MSIXMsgCtrl=0 1326MSIXPbaOffset=0 1327MSIXTableOffset=0 1328MaximumLatency=0 1329MinimumGrant=255 1330PMCAPBaseOffset=0 1331PMCAPCapId=0 1332PMCAPCapabilities=0 1333PMCAPCtrlStatus=0 1334PMCAPNextCapability=0 1335PXCAPBaseOffset=0 1336PXCAPCapId=0 1337PXCAPCapabilities=0 1338PXCAPDevCap2=0 1339PXCAPDevCapabilities=0 1340PXCAPDevCtrl=0 1341PXCAPDevCtrl2=0 1342PXCAPDevStatus=0 1343PXCAPLinkCap=0 1344PXCAPLinkCtrl=0 1345PXCAPLinkStatus=0 1346PXCAPNextCapability=0 1347ProgIF=0 1348Revision=0 1349Status=0 1350SubClassCode=0 1351SubsystemID=4104 1352SubsystemVendorID=32902 1353VendorID=32902 1354clk_domain=system.clk_domain 1355config_latency=20000 1356default_p_state=UNDEFINED 1357eventq_index=0 1358fetch_comp_delay=10000 1359fetch_delay=10000 1360hardware_address=00:90:00:00:00:01 1361host=system.realview.pci_host 1362p_state_clk_gate_bins=20 1363p_state_clk_gate_max=1000000000000 1364p_state_clk_gate_min=1000 1365pci_bus=0 1366pci_dev=0 1367pci_func=0 1368phy_epid=896 1369phy_pid=680 1370pio_latency=30000 1371power_model=Null 1372rx_desc_cache_size=64 1373rx_fifo_size=393216 1374rx_write_delay=0 1375system=system 1376tx_desc_cache_size=64 1377tx_fifo_size=393216 1378tx_read_delay=0 1379wb_comp_delay=10000 1380wb_delay=10000 1381dma=system.iobus.slave[4] 1382pio=system.iobus.master[24] 1383 1384[system.realview.generic_timer] 1385type=GenericTimer 1386eventq_index=0 1387gic=system.realview.gic 1388int_phys=29 1389int_virt=27 1390system=system 1391 1392[system.realview.gic] 1393type=Pl390 1394clk_domain=system.clk_domain 1395cpu_addr=738205696 1396cpu_pio_delay=10000 1397default_p_state=UNDEFINED 1398dist_addr=738201600 1399dist_pio_delay=10000 1400eventq_index=0 1401gem5_extensions=false 1402int_latency=10000 1403it_lines=128 1404p_state_clk_gate_bins=20 1405p_state_clk_gate_max=1000000000000 1406p_state_clk_gate_min=1000 1407platform=system.realview 1408power_model=Null 1409system=system 1410pio=system.membus.master[2] 1411 1412[system.realview.hdlcd] 1413type=HDLcd 1414amba_id=1314816 1415clk_domain=system.clk_domain 1416default_p_state=UNDEFINED 1417enable_capture=true 1418eventq_index=0 1419gic=system.realview.gic 1420int_num=117 1421p_state_clk_gate_bins=20 1422p_state_clk_gate_max=1000000000000 1423p_state_clk_gate_min=1000 1424pio_addr=721420288 1425pio_latency=10000 1426pixel_buffer_size=2048 1427pixel_chunk=32 1428power_model=Null 1429pxl_clk=system.realview.dcc.osc_pxl 1430system=system 1431vnc=system.vncserver 1432workaround_dma_line_count=true 1433workaround_swap_rb=true 1434dma=system.membus.slave[0] 1435pio=system.iobus.master[6] 1436 1437[system.realview.ide] 1438type=IdeController 1439BAR0=1 1440BAR0LegacyIO=false 1441BAR0Size=8 1442BAR1=1 1443BAR1LegacyIO=false 1444BAR1Size=4 1445BAR2=1 1446BAR2LegacyIO=false 1447BAR2Size=8 1448BAR3=1 1449BAR3LegacyIO=false 1450BAR3Size=4 1451BAR4=1 1452BAR4LegacyIO=false 1453BAR4Size=16 1454BAR5=1 1455BAR5LegacyIO=false 1456BAR5Size=0 1457BIST=0 1458CacheLineSize=0 1459CapabilityPtr=0 1460CardbusCIS=0 1461ClassCode=1 1462Command=0 1463DeviceID=28945 1464ExpansionROM=0 1465HeaderType=0 1466InterruptLine=2 1467InterruptPin=2 1468LatencyTimer=0 1469LegacyIOBase=0 1470MSICAPBaseOffset=0 1471MSICAPCapId=0 1472MSICAPMaskBits=0 1473MSICAPMsgAddr=0 1474MSICAPMsgCtrl=0 1475MSICAPMsgData=0 1476MSICAPMsgUpperAddr=0 1477MSICAPNextCapability=0 1478MSICAPPendingBits=0 1479MSIXCAPBaseOffset=0 1480MSIXCAPCapId=0 1481MSIXCAPNextCapability=0 1482MSIXMsgCtrl=0 1483MSIXPbaOffset=0 1484MSIXTableOffset=0 1485MaximumLatency=0 1486MinimumGrant=0 1487PMCAPBaseOffset=0 1488PMCAPCapId=0 1489PMCAPCapabilities=0 1490PMCAPCtrlStatus=0 1491PMCAPNextCapability=0 1492PXCAPBaseOffset=0 1493PXCAPCapId=0 1494PXCAPCapabilities=0 1495PXCAPDevCap2=0 1496PXCAPDevCapabilities=0 1497PXCAPDevCtrl=0 1498PXCAPDevCtrl2=0 1499PXCAPDevStatus=0 1500PXCAPLinkCap=0 1501PXCAPLinkCtrl=0 1502PXCAPLinkStatus=0 1503PXCAPNextCapability=0 1504ProgIF=133 1505Revision=0 1506Status=640 1507SubClassCode=1 1508SubsystemID=0 1509SubsystemVendorID=0 1510VendorID=32902 1511clk_domain=system.clk_domain 1512config_latency=20000 1513ctrl_offset=0 1514default_p_state=UNDEFINED 1515disks=system.cf0 1516eventq_index=0 1517host=system.realview.pci_host 1518io_shift=0 1519p_state_clk_gate_bins=20 1520p_state_clk_gate_max=1000000000000 1521p_state_clk_gate_min=1000 1522pci_bus=0 1523pci_dev=1 1524pci_func=0 1525pio_latency=30000 1526power_model=Null 1527system=system 1528dma=system.iobus.slave[3] 1529pio=system.iobus.master[23] 1530 1531[system.realview.kmi0] 1532type=Pl050 1533amba_id=1314896 1534clk_domain=system.clk_domain 1535default_p_state=UNDEFINED 1536eventq_index=0 1537gic=system.realview.gic 1538int_delay=1000000 1539int_num=44 1540is_mouse=false 1541p_state_clk_gate_bins=20 1542p_state_clk_gate_max=1000000000000 1543p_state_clk_gate_min=1000 1544pio_addr=470155264 1545pio_latency=100000 1546power_model=Null 1547system=system 1548vnc=system.vncserver 1549pio=system.iobus.master[7] 1550 1551[system.realview.kmi1] 1552type=Pl050 1553amba_id=1314896 1554clk_domain=system.clk_domain 1555default_p_state=UNDEFINED 1556eventq_index=0 1557gic=system.realview.gic 1558int_delay=1000000 1559int_num=45 1560is_mouse=true 1561p_state_clk_gate_bins=20 1562p_state_clk_gate_max=1000000000000 1563p_state_clk_gate_min=1000 1564pio_addr=470220800 1565pio_latency=100000 1566power_model=Null 1567system=system 1568vnc=system.vncserver 1569pio=system.iobus.master[8] 1570 1571[system.realview.l2x0_fake] 1572type=IsaFake 1573clk_domain=system.clk_domain 1574default_p_state=UNDEFINED 1575eventq_index=0 1576fake_mem=false 1577p_state_clk_gate_bins=20 1578p_state_clk_gate_max=1000000000000 1579p_state_clk_gate_min=1000 1580pio_addr=739246080 1581pio_latency=100000 1582pio_size=4095 1583power_model=Null 1584ret_bad_addr=false 1585ret_data16=65535 1586ret_data32=4294967295 1587ret_data64=18446744073709551615 1588ret_data8=255 1589system=system 1590update_data=false 1591warn_access= 1592pio=system.iobus.master[12] 1593 1594[system.realview.lan_fake] 1595type=IsaFake 1596clk_domain=system.clk_domain 1597default_p_state=UNDEFINED 1598eventq_index=0 1599fake_mem=false 1600p_state_clk_gate_bins=20 1601p_state_clk_gate_max=1000000000000 1602p_state_clk_gate_min=1000 1603pio_addr=436207616 1604pio_latency=100000 1605pio_size=65535 1606power_model=Null 1607ret_bad_addr=false 1608ret_data16=65535 1609ret_data32=4294967295 1610ret_data64=18446744073709551615 1611ret_data8=255 1612system=system 1613update_data=false 1614warn_access= 1615pio=system.iobus.master[19] 1616 1617[system.realview.local_cpu_timer] 1618type=CpuLocalTimer 1619clk_domain=system.clk_domain 1620default_p_state=UNDEFINED 1621eventq_index=0 1622gic=system.realview.gic 1623int_num_timer=29 1624int_num_watchdog=30 1625p_state_clk_gate_bins=20 1626p_state_clk_gate_max=1000000000000 1627p_state_clk_gate_min=1000 1628pio_addr=738721792 1629pio_latency=100000 1630power_model=Null 1631system=system 1632pio=system.membus.master[4] 1633 1634[system.realview.mcc] 1635type=SubSystem 1636children=osc_clcd osc_mcc osc_peripheral osc_system_bus temp_crtl 1637eventq_index=0 1638thermal_domain=Null 1639 1640[system.realview.mcc.osc_clcd] 1641type=RealViewOsc 1642dcc=0 1643device=1 1644eventq_index=0 1645freq=42105 1646parent=system.realview.realview_io 1647position=0 1648site=0 1649voltage_domain=system.voltage_domain 1650 1651[system.realview.mcc.osc_mcc] 1652type=RealViewOsc 1653dcc=0 1654device=0 1655eventq_index=0 1656freq=20000 1657parent=system.realview.realview_io 1658position=0 1659site=0 1660voltage_domain=system.voltage_domain 1661 1662[system.realview.mcc.osc_peripheral] 1663type=RealViewOsc 1664dcc=0 1665device=2 1666eventq_index=0 1667freq=41667 1668parent=system.realview.realview_io 1669position=0 1670site=0 1671voltage_domain=system.voltage_domain 1672 1673[system.realview.mcc.osc_system_bus] 1674type=RealViewOsc 1675dcc=0 1676device=4 1677eventq_index=0 1678freq=41667 1679parent=system.realview.realview_io 1680position=0 1681site=0 1682voltage_domain=system.voltage_domain 1683 1684[system.realview.mcc.temp_crtl] 1685type=RealViewTemperatureSensor 1686dcc=0 1687device=0 1688eventq_index=0 1689parent=system.realview.realview_io 1690position=0 1691site=0 1692system=system 1693 1694[system.realview.mmc_fake] 1695type=AmbaFake 1696amba_id=0 1697clk_domain=system.clk_domain 1698default_p_state=UNDEFINED 1699eventq_index=0 1700ignore_access=false 1701p_state_clk_gate_bins=20 1702p_state_clk_gate_max=1000000000000 1703p_state_clk_gate_min=1000 1704pio_addr=470089728 1705pio_latency=100000 1706power_model=Null 1707system=system 1708pio=system.iobus.master[21] 1709 1710[system.realview.nvmem] 1711type=SimpleMemory 1712bandwidth=73.000000 1713clk_domain=system.clk_domain 1714conf_table_reported=false 1715default_p_state=UNDEFINED 1716eventq_index=0 1717in_addr_map=true 1718kvm_map=true 1719latency=30000 1720latency_var=0 1721null=false 1722p_state_clk_gate_bins=20 1723p_state_clk_gate_max=1000000000000 1724p_state_clk_gate_min=1000 1725power_model=Null 1726range=0:67108863:0:0:0:0 1727port=system.membus.master[1] 1728 1729[system.realview.pci_host] 1730type=GenericPciHost 1731clk_domain=system.clk_domain 1732conf_base=805306368 1733conf_device_bits=16 1734conf_size=268435456 1735default_p_state=UNDEFINED 1736eventq_index=0 1737p_state_clk_gate_bins=20 1738p_state_clk_gate_max=1000000000000 1739p_state_clk_gate_min=1000 1740pci_dma_base=0 1741pci_mem_base=0 1742pci_pio_base=0 1743platform=system.realview 1744power_model=Null 1745system=system 1746pio=system.iobus.master[2] 1747 1748[system.realview.realview_io] 1749type=RealViewCtrl 1750clk_domain=system.clk_domain 1751default_p_state=UNDEFINED 1752eventq_index=0 1753idreg=35979264 1754p_state_clk_gate_bins=20 1755p_state_clk_gate_max=1000000000000 1756p_state_clk_gate_min=1000 1757pio_addr=469827584 1758pio_latency=100000 1759power_model=Null 1760proc_id0=335544320 1761proc_id1=335544320 1762system=system 1763pio=system.iobus.master[1] 1764 1765[system.realview.rtc] 1766type=PL031 1767amba_id=3412017 1768clk_domain=system.clk_domain 1769default_p_state=UNDEFINED 1770eventq_index=0 1771gic=system.realview.gic 1772int_delay=100000 1773int_num=36 1774p_state_clk_gate_bins=20 1775p_state_clk_gate_max=1000000000000 1776p_state_clk_gate_min=1000 1777pio_addr=471269376 1778pio_latency=100000 1779power_model=Null 1780system=system 1781time=Thu Jan 1 00:00:00 2009 1782pio=system.iobus.master[10] 1783 1784[system.realview.sp810_fake] 1785type=AmbaFake 1786amba_id=0 1787clk_domain=system.clk_domain 1788default_p_state=UNDEFINED 1789eventq_index=0 1790ignore_access=true 1791p_state_clk_gate_bins=20 1792p_state_clk_gate_max=1000000000000 1793p_state_clk_gate_min=1000 1794pio_addr=469893120 1795pio_latency=100000 1796power_model=Null 1797system=system 1798pio=system.iobus.master[16] 1799 1800[system.realview.timer0] 1801type=Sp804 1802amba_id=1316868 1803clk_domain=system.clk_domain 1804clock0=1000000 1805clock1=1000000 1806default_p_state=UNDEFINED 1807eventq_index=0 1808gic=system.realview.gic 1809int_num0=34 1810int_num1=34 1811p_state_clk_gate_bins=20 1812p_state_clk_gate_max=1000000000000 1813p_state_clk_gate_min=1000 1814pio_addr=470876160 1815pio_latency=100000 1816power_model=Null 1817system=system 1818pio=system.iobus.master[3] 1819 1820[system.realview.timer1] 1821type=Sp804 1822amba_id=1316868 1823clk_domain=system.clk_domain 1824clock0=1000000 1825clock1=1000000 1826default_p_state=UNDEFINED 1827eventq_index=0 1828gic=system.realview.gic 1829int_num0=35 1830int_num1=35 1831p_state_clk_gate_bins=20 1832p_state_clk_gate_max=1000000000000 1833p_state_clk_gate_min=1000 1834pio_addr=470941696 1835pio_latency=100000 1836power_model=Null 1837system=system 1838pio=system.iobus.master[4] 1839 1840[system.realview.uart] 1841type=Pl011 1842clk_domain=system.clk_domain 1843default_p_state=UNDEFINED 1844end_on_eot=false 1845eventq_index=0 1846gic=system.realview.gic 1847int_delay=100000 1848int_num=37 1849p_state_clk_gate_bins=20 1850p_state_clk_gate_max=1000000000000 1851p_state_clk_gate_min=1000 1852pio_addr=470351872 1853pio_latency=100000 1854platform=system.realview 1855power_model=Null 1856system=system 1857terminal=system.terminal 1858pio=system.iobus.master[0] 1859 1860[system.realview.uart1_fake] 1861type=AmbaFake 1862amba_id=0 1863clk_domain=system.clk_domain 1864default_p_state=UNDEFINED 1865eventq_index=0 1866ignore_access=false 1867p_state_clk_gate_bins=20 1868p_state_clk_gate_max=1000000000000 1869p_state_clk_gate_min=1000 1870pio_addr=470417408 1871pio_latency=100000 1872power_model=Null 1873system=system 1874pio=system.iobus.master[13] 1875 1876[system.realview.uart2_fake] 1877type=AmbaFake 1878amba_id=0 1879clk_domain=system.clk_domain 1880default_p_state=UNDEFINED 1881eventq_index=0 1882ignore_access=false 1883p_state_clk_gate_bins=20 1884p_state_clk_gate_max=1000000000000 1885p_state_clk_gate_min=1000 1886pio_addr=470482944 1887pio_latency=100000 1888power_model=Null 1889system=system 1890pio=system.iobus.master[14] 1891 1892[system.realview.uart3_fake] 1893type=AmbaFake 1894amba_id=0 1895clk_domain=system.clk_domain 1896default_p_state=UNDEFINED 1897eventq_index=0 1898ignore_access=false 1899p_state_clk_gate_bins=20 1900p_state_clk_gate_max=1000000000000 1901p_state_clk_gate_min=1000 1902pio_addr=470548480 1903pio_latency=100000 1904power_model=Null 1905system=system 1906pio=system.iobus.master[15] 1907 1908[system.realview.usb_fake] 1909type=IsaFake 1910clk_domain=system.clk_domain 1911default_p_state=UNDEFINED 1912eventq_index=0 1913fake_mem=false 1914p_state_clk_gate_bins=20 1915p_state_clk_gate_max=1000000000000 1916p_state_clk_gate_min=1000 1917pio_addr=452984832 1918pio_latency=100000 1919pio_size=131071 1920power_model=Null 1921ret_bad_addr=false 1922ret_data16=65535 1923ret_data32=4294967295 1924ret_data64=18446744073709551615 1925ret_data8=255 1926system=system 1927update_data=false 1928warn_access= 1929pio=system.iobus.master[20] 1930 1931[system.realview.vgic] 1932type=VGic 1933clk_domain=system.clk_domain 1934default_p_state=UNDEFINED 1935eventq_index=0 1936gic=system.realview.gic 1937hv_addr=738213888 1938p_state_clk_gate_bins=20 1939p_state_clk_gate_max=1000000000000 1940p_state_clk_gate_min=1000 1941pio_delay=10000 1942platform=system.realview 1943power_model=Null 1944ppint=25 1945system=system 1946vcpu_addr=738222080 1947pio=system.membus.master[3] 1948 1949[system.realview.vram] 1950type=SimpleMemory 1951bandwidth=73.000000 1952clk_domain=system.clk_domain 1953conf_table_reported=false 1954default_p_state=UNDEFINED 1955eventq_index=0 1956in_addr_map=true 1957kvm_map=true 1958latency=30000 1959latency_var=0 1960null=false 1961p_state_clk_gate_bins=20 1962p_state_clk_gate_max=1000000000000 1963p_state_clk_gate_min=1000 1964power_model=Null 1965range=402653184:436207615:0:0:0:0 1966port=system.iobus.master[11] 1967 1968[system.realview.watchdog_fake] 1969type=AmbaFake 1970amba_id=0 1971clk_domain=system.clk_domain 1972default_p_state=UNDEFINED 1973eventq_index=0 1974ignore_access=false 1975p_state_clk_gate_bins=20 1976p_state_clk_gate_max=1000000000000 1977p_state_clk_gate_min=1000 1978pio_addr=470745088 1979pio_latency=100000 1980power_model=Null 1981system=system 1982pio=system.iobus.master[17] 1983 1984[system.terminal] 1985type=Terminal 1986eventq_index=0 1987intr_control=system.intrctrl 1988number=0 1989output=true 1990port=3456 1991 1992[system.vncserver] 1993type=VncServer 1994eventq_index=0 1995frame_capture=false 1996number=0 1997port=5900 1998 1999[system.voltage_domain] 2000type=VoltageDomain 2001eventq_index=0 2002voltage=1.000000 2003 2004