config.ini revision 11570:4aac82f10951
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxArmSystem 13children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain 14atags_addr=134217728 15boot_loader=/arm/projectscratch/randd/systems/dist/binaries/boot_emm.arm 16boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1 17cache_line_size=64 18clk_domain=system.clk_domain 19default_p_state=UNDEFINED 20dtb_filename=/arm/projectscratch/randd/systems/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb 21early_kernel_symbols=false 22enable_context_switch_stats_dump=false 23eventq_index=0 24exit_on_work_items=false 25flags_addr=469827632 26gic_cpu_addr=738205696 27have_large_asid_64=false 28have_lpae=true 29have_security=false 30have_virtualization=false 31highest_el_is_64=false 32init_param=0 33kernel=/arm/projectscratch/randd/systems/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5 34kernel_addr_check=true 35load_addr_mask=268435455 36load_offset=2147483648 37machine_type=VExpress_EMM 38mem_mode=timing 39mem_ranges=2147483648:2415919103 40memories=system.physmem system.realview.nvmem system.realview.vram 41mmap_using_noreserve=false 42multi_proc=true 43multi_thread=false 44num_work_ids=16 45p_state_clk_gate_bins=20 46p_state_clk_gate_max=1000000000000 47p_state_clk_gate_min=1000 48panic_on_oops=true 49panic_on_panic=true 50phys_addr_range_64=40 51power_model=Null 52readfile=/work/curdun01/gem5-external.hg/tests/testing/../halt.sh 53reset_addr_64=0 54symbolfile= 55thermal_components= 56thermal_model=Null 57work_begin_ckpt_count=0 58work_begin_cpu_id_exit=-1 59work_begin_exit_count=0 60work_cpus_ckpt_count=0 61work_end_ckpt_count=0 62work_end_exit_count=0 63work_item_id=-1 64system_port=system.membus.slave[1] 65 66[system.bridge] 67type=Bridge 68clk_domain=system.clk_domain 69default_p_state=UNDEFINED 70delay=50000 71eventq_index=0 72p_state_clk_gate_bins=20 73p_state_clk_gate_max=1000000000000 74p_state_clk_gate_min=1000 75power_model=Null 76ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911 77req_size=16 78resp_size=16 79master=system.iobus.slave[0] 80slave=system.membus.master[0] 81 82[system.cf0] 83type=IdeDisk 84children=image 85delay=1000000 86driveID=master 87eventq_index=0 88image=system.cf0.image 89 90[system.cf0.image] 91type=CowDiskImage 92children=child 93child=system.cf0.image.child 94eventq_index=0 95image_file= 96read_only=false 97table_size=65536 98 99[system.cf0.image.child] 100type=RawDiskImage 101eventq_index=0 102image_file=/arm/projectscratch/randd/systems/dist/disks/linux-aarch32-ael.img 103read_only=true 104 105[system.clk_domain] 106type=SrcClockDomain 107clock=1000 108domain_id=-1 109eventq_index=0 110init_perf_level=0 111voltage_domain=system.voltage_domain 112 113[system.cpu] 114type=DerivO3CPU 115children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer 116LFSTSize=1024 117LQEntries=16 118LSQCheckLoads=true 119LSQDepCheckShift=0 120SQEntries=16 121SSITSize=1024 122activity=0 123backComSize=5 124branchPred=system.cpu.branchPred 125cachePorts=200 126checker=Null 127clk_domain=system.cpu_clk_domain 128commitToDecodeDelay=1 129commitToFetchDelay=1 130commitToIEWDelay=1 131commitToRenameDelay=1 132commitWidth=8 133cpu_id=0 134decodeToFetchDelay=1 135decodeToRenameDelay=2 136decodeWidth=3 137default_p_state=UNDEFINED 138dispatchWidth=6 139do_checkpoint_insts=true 140do_quiesce=true 141do_statistics_insts=true 142dstage2_mmu=system.cpu.dstage2_mmu 143dtb=system.cpu.dtb 144eventq_index=0 145fetchBufferSize=16 146fetchQueueSize=32 147fetchToDecodeDelay=3 148fetchTrapLatency=1 149fetchWidth=3 150forwardComSize=5 151fuPool=system.cpu.fuPool 152function_trace=false 153function_trace_start=0 154iewToCommitDelay=1 155iewToDecodeDelay=1 156iewToFetchDelay=1 157iewToRenameDelay=1 158interrupts=system.cpu.interrupts 159isa=system.cpu.isa 160issueToExecuteDelay=1 161issueWidth=8 162istage2_mmu=system.cpu.istage2_mmu 163itb=system.cpu.itb 164max_insts_all_threads=0 165max_insts_any_thread=0 166max_loads_all_threads=0 167max_loads_any_thread=0 168needsTSO=false 169numIQEntries=32 170numPhysCCRegs=640 171numPhysFloatRegs=192 172numPhysIntRegs=128 173numROBEntries=40 174numRobs=1 175numThreads=1 176p_state_clk_gate_bins=20 177p_state_clk_gate_max=1000000000000 178p_state_clk_gate_min=1000 179power_model=Null 180profile=0 181progress_interval=0 182renameToDecodeDelay=1 183renameToFetchDelay=1 184renameToIEWDelay=1 185renameToROBDelay=1 186renameWidth=3 187simpoint_start_insts= 188smtCommitPolicy=RoundRobin 189smtFetchPolicy=SingleThread 190smtIQPolicy=Partitioned 191smtIQThreshold=100 192smtLSQPolicy=Partitioned 193smtLSQThreshold=100 194smtNumFetchingThreads=1 195smtROBPolicy=Partitioned 196smtROBThreshold=100 197socket_id=0 198squashWidth=8 199store_set_clear_period=250000 200switched_out=false 201system=system 202tracer=system.cpu.tracer 203trapLatency=13 204wbWidth=8 205workload= 206dcache_port=system.cpu.dcache.cpu_side 207icache_port=system.cpu.icache.cpu_side 208 209[system.cpu.branchPred] 210type=BiModeBP 211BTBEntries=2048 212BTBTagSize=18 213RASSize=16 214choiceCtrBits=2 215choicePredictorSize=8192 216eventq_index=0 217globalCtrBits=2 218globalPredictorSize=8192 219indirectHashGHR=true 220indirectHashTargets=true 221indirectPathLength=3 222indirectSets=256 223indirectTagSize=16 224indirectWays=2 225instShiftAmt=2 226numThreads=1 227useIndirect=true 228 229[system.cpu.dcache] 230type=Cache 231children=tags 232addr_ranges=0:18446744073709551615 233assoc=4 234clk_domain=system.cpu_clk_domain 235clusivity=mostly_incl 236default_p_state=UNDEFINED 237demand_mshr_reserve=1 238eventq_index=0 239hit_latency=2 240is_read_only=false 241max_miss_count=0 242mshrs=4 243p_state_clk_gate_bins=20 244p_state_clk_gate_max=1000000000000 245p_state_clk_gate_min=1000 246power_model=Null 247prefetch_on_access=false 248prefetcher=Null 249response_latency=2 250sequential_access=false 251size=32768 252system=system 253tags=system.cpu.dcache.tags 254tgts_per_mshr=20 255write_buffers=8 256writeback_clean=false 257cpu_side=system.cpu.dcache_port 258mem_side=system.cpu.toL2Bus.slave[1] 259 260[system.cpu.dcache.tags] 261type=LRU 262assoc=4 263block_size=64 264clk_domain=system.cpu_clk_domain 265default_p_state=UNDEFINED 266eventq_index=0 267hit_latency=2 268p_state_clk_gate_bins=20 269p_state_clk_gate_max=1000000000000 270p_state_clk_gate_min=1000 271power_model=Null 272sequential_access=false 273size=32768 274 275[system.cpu.dstage2_mmu] 276type=ArmStage2MMU 277children=stage2_tlb 278eventq_index=0 279stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 280sys=system 281tlb=system.cpu.dtb 282 283[system.cpu.dstage2_mmu.stage2_tlb] 284type=ArmTLB 285children=walker 286eventq_index=0 287is_stage2=true 288size=32 289walker=system.cpu.dstage2_mmu.stage2_tlb.walker 290 291[system.cpu.dstage2_mmu.stage2_tlb.walker] 292type=ArmTableWalker 293clk_domain=system.cpu_clk_domain 294default_p_state=UNDEFINED 295eventq_index=0 296is_stage2=true 297num_squash_per_cycle=2 298p_state_clk_gate_bins=20 299p_state_clk_gate_max=1000000000000 300p_state_clk_gate_min=1000 301power_model=Null 302sys=system 303 304[system.cpu.dtb] 305type=ArmTLB 306children=walker 307eventq_index=0 308is_stage2=false 309size=64 310walker=system.cpu.dtb.walker 311 312[system.cpu.dtb.walker] 313type=ArmTableWalker 314clk_domain=system.cpu_clk_domain 315default_p_state=UNDEFINED 316eventq_index=0 317is_stage2=false 318num_squash_per_cycle=2 319p_state_clk_gate_bins=20 320p_state_clk_gate_max=1000000000000 321p_state_clk_gate_min=1000 322power_model=Null 323sys=system 324port=system.cpu.toL2Bus.slave[3] 325 326[system.cpu.fuPool] 327type=FUPool 328children=FUList0 FUList1 FUList2 FUList3 FUList4 329FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 330eventq_index=0 331 332[system.cpu.fuPool.FUList0] 333type=FUDesc 334children=opList 335count=2 336eventq_index=0 337opList=system.cpu.fuPool.FUList0.opList 338 339[system.cpu.fuPool.FUList0.opList] 340type=OpDesc 341eventq_index=0 342opClass=IntAlu 343opLat=1 344pipelined=true 345 346[system.cpu.fuPool.FUList1] 347type=FUDesc 348children=opList0 opList1 opList2 349count=1 350eventq_index=0 351opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 system.cpu.fuPool.FUList1.opList2 352 353[system.cpu.fuPool.FUList1.opList0] 354type=OpDesc 355eventq_index=0 356opClass=IntMult 357opLat=3 358pipelined=true 359 360[system.cpu.fuPool.FUList1.opList1] 361type=OpDesc 362eventq_index=0 363opClass=IntDiv 364opLat=12 365pipelined=false 366 367[system.cpu.fuPool.FUList1.opList2] 368type=OpDesc 369eventq_index=0 370opClass=IprAccess 371opLat=3 372pipelined=true 373 374[system.cpu.fuPool.FUList2] 375type=FUDesc 376children=opList 377count=1 378eventq_index=0 379opList=system.cpu.fuPool.FUList2.opList 380 381[system.cpu.fuPool.FUList2.opList] 382type=OpDesc 383eventq_index=0 384opClass=MemRead 385opLat=2 386pipelined=true 387 388[system.cpu.fuPool.FUList3] 389type=FUDesc 390children=opList 391count=1 392eventq_index=0 393opList=system.cpu.fuPool.FUList3.opList 394 395[system.cpu.fuPool.FUList3.opList] 396type=OpDesc 397eventq_index=0 398opClass=MemWrite 399opLat=2 400pipelined=true 401 402[system.cpu.fuPool.FUList4] 403type=FUDesc 404children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 opList20 opList21 opList22 opList23 opList24 opList25 405count=2 406eventq_index=0 407opList=system.cpu.fuPool.FUList4.opList00 system.cpu.fuPool.FUList4.opList01 system.cpu.fuPool.FUList4.opList02 system.cpu.fuPool.FUList4.opList03 system.cpu.fuPool.FUList4.opList04 system.cpu.fuPool.FUList4.opList05 system.cpu.fuPool.FUList4.opList06 system.cpu.fuPool.FUList4.opList07 system.cpu.fuPool.FUList4.opList08 system.cpu.fuPool.FUList4.opList09 system.cpu.fuPool.FUList4.opList10 system.cpu.fuPool.FUList4.opList11 system.cpu.fuPool.FUList4.opList12 system.cpu.fuPool.FUList4.opList13 system.cpu.fuPool.FUList4.opList14 system.cpu.fuPool.FUList4.opList15 system.cpu.fuPool.FUList4.opList16 system.cpu.fuPool.FUList4.opList17 system.cpu.fuPool.FUList4.opList18 system.cpu.fuPool.FUList4.opList19 system.cpu.fuPool.FUList4.opList20 system.cpu.fuPool.FUList4.opList21 system.cpu.fuPool.FUList4.opList22 system.cpu.fuPool.FUList4.opList23 system.cpu.fuPool.FUList4.opList24 system.cpu.fuPool.FUList4.opList25 408 409[system.cpu.fuPool.FUList4.opList00] 410type=OpDesc 411eventq_index=0 412opClass=SimdAdd 413opLat=4 414pipelined=true 415 416[system.cpu.fuPool.FUList4.opList01] 417type=OpDesc 418eventq_index=0 419opClass=SimdAddAcc 420opLat=4 421pipelined=true 422 423[system.cpu.fuPool.FUList4.opList02] 424type=OpDesc 425eventq_index=0 426opClass=SimdAlu 427opLat=4 428pipelined=true 429 430[system.cpu.fuPool.FUList4.opList03] 431type=OpDesc 432eventq_index=0 433opClass=SimdCmp 434opLat=4 435pipelined=true 436 437[system.cpu.fuPool.FUList4.opList04] 438type=OpDesc 439eventq_index=0 440opClass=SimdCvt 441opLat=3 442pipelined=true 443 444[system.cpu.fuPool.FUList4.opList05] 445type=OpDesc 446eventq_index=0 447opClass=SimdMisc 448opLat=3 449pipelined=true 450 451[system.cpu.fuPool.FUList4.opList06] 452type=OpDesc 453eventq_index=0 454opClass=SimdMult 455opLat=5 456pipelined=true 457 458[system.cpu.fuPool.FUList4.opList07] 459type=OpDesc 460eventq_index=0 461opClass=SimdMultAcc 462opLat=5 463pipelined=true 464 465[system.cpu.fuPool.FUList4.opList08] 466type=OpDesc 467eventq_index=0 468opClass=SimdShift 469opLat=3 470pipelined=true 471 472[system.cpu.fuPool.FUList4.opList09] 473type=OpDesc 474eventq_index=0 475opClass=SimdShiftAcc 476opLat=3 477pipelined=true 478 479[system.cpu.fuPool.FUList4.opList10] 480type=OpDesc 481eventq_index=0 482opClass=SimdSqrt 483opLat=9 484pipelined=true 485 486[system.cpu.fuPool.FUList4.opList11] 487type=OpDesc 488eventq_index=0 489opClass=SimdFloatAdd 490opLat=5 491pipelined=true 492 493[system.cpu.fuPool.FUList4.opList12] 494type=OpDesc 495eventq_index=0 496opClass=SimdFloatAlu 497opLat=5 498pipelined=true 499 500[system.cpu.fuPool.FUList4.opList13] 501type=OpDesc 502eventq_index=0 503opClass=SimdFloatCmp 504opLat=3 505pipelined=true 506 507[system.cpu.fuPool.FUList4.opList14] 508type=OpDesc 509eventq_index=0 510opClass=SimdFloatCvt 511opLat=3 512pipelined=true 513 514[system.cpu.fuPool.FUList4.opList15] 515type=OpDesc 516eventq_index=0 517opClass=SimdFloatDiv 518opLat=3 519pipelined=true 520 521[system.cpu.fuPool.FUList4.opList16] 522type=OpDesc 523eventq_index=0 524opClass=SimdFloatMisc 525opLat=3 526pipelined=true 527 528[system.cpu.fuPool.FUList4.opList17] 529type=OpDesc 530eventq_index=0 531opClass=SimdFloatMult 532opLat=3 533pipelined=true 534 535[system.cpu.fuPool.FUList4.opList18] 536type=OpDesc 537eventq_index=0 538opClass=SimdFloatMultAcc 539opLat=1 540pipelined=true 541 542[system.cpu.fuPool.FUList4.opList19] 543type=OpDesc 544eventq_index=0 545opClass=SimdFloatSqrt 546opLat=9 547pipelined=true 548 549[system.cpu.fuPool.FUList4.opList20] 550type=OpDesc 551eventq_index=0 552opClass=FloatAdd 553opLat=5 554pipelined=true 555 556[system.cpu.fuPool.FUList4.opList21] 557type=OpDesc 558eventq_index=0 559opClass=FloatCmp 560opLat=5 561pipelined=true 562 563[system.cpu.fuPool.FUList4.opList22] 564type=OpDesc 565eventq_index=0 566opClass=FloatCvt 567opLat=5 568pipelined=true 569 570[system.cpu.fuPool.FUList4.opList23] 571type=OpDesc 572eventq_index=0 573opClass=FloatDiv 574opLat=9 575pipelined=false 576 577[system.cpu.fuPool.FUList4.opList24] 578type=OpDesc 579eventq_index=0 580opClass=FloatSqrt 581opLat=33 582pipelined=false 583 584[system.cpu.fuPool.FUList4.opList25] 585type=OpDesc 586eventq_index=0 587opClass=FloatMult 588opLat=4 589pipelined=true 590 591[system.cpu.icache] 592type=Cache 593children=tags 594addr_ranges=0:18446744073709551615 595assoc=1 596clk_domain=system.cpu_clk_domain 597clusivity=mostly_incl 598default_p_state=UNDEFINED 599demand_mshr_reserve=1 600eventq_index=0 601hit_latency=2 602is_read_only=true 603max_miss_count=0 604mshrs=4 605p_state_clk_gate_bins=20 606p_state_clk_gate_max=1000000000000 607p_state_clk_gate_min=1000 608power_model=Null 609prefetch_on_access=false 610prefetcher=Null 611response_latency=2 612sequential_access=false 613size=32768 614system=system 615tags=system.cpu.icache.tags 616tgts_per_mshr=20 617write_buffers=8 618writeback_clean=true 619cpu_side=system.cpu.icache_port 620mem_side=system.cpu.toL2Bus.slave[0] 621 622[system.cpu.icache.tags] 623type=LRU 624assoc=1 625block_size=64 626clk_domain=system.cpu_clk_domain 627default_p_state=UNDEFINED 628eventq_index=0 629hit_latency=2 630p_state_clk_gate_bins=20 631p_state_clk_gate_max=1000000000000 632p_state_clk_gate_min=1000 633power_model=Null 634sequential_access=false 635size=32768 636 637[system.cpu.interrupts] 638type=ArmInterrupts 639eventq_index=0 640 641[system.cpu.isa] 642type=ArmISA 643decoderFlavour=Generic 644eventq_index=0 645fpsid=1090793632 646id_aa64afr0_el1=0 647id_aa64afr1_el1=0 648id_aa64dfr0_el1=1052678 649id_aa64dfr1_el1=0 650id_aa64isar0_el1=0 651id_aa64isar1_el1=0 652id_aa64mmfr0_el1=15728642 653id_aa64mmfr1_el1=0 654id_aa64pfr0_el1=17 655id_aa64pfr1_el1=0 656id_isar0=34607377 657id_isar1=34677009 658id_isar2=555950401 659id_isar3=17899825 660id_isar4=268501314 661id_isar5=0 662id_mmfr0=270536963 663id_mmfr1=0 664id_mmfr2=19070976 665id_mmfr3=34611729 666id_pfr0=49 667id_pfr1=4113 668midr=1091551472 669pmu=Null 670system=system 671 672[system.cpu.istage2_mmu] 673type=ArmStage2MMU 674children=stage2_tlb 675eventq_index=0 676stage2_tlb=system.cpu.istage2_mmu.stage2_tlb 677sys=system 678tlb=system.cpu.itb 679 680[system.cpu.istage2_mmu.stage2_tlb] 681type=ArmTLB 682children=walker 683eventq_index=0 684is_stage2=true 685size=32 686walker=system.cpu.istage2_mmu.stage2_tlb.walker 687 688[system.cpu.istage2_mmu.stage2_tlb.walker] 689type=ArmTableWalker 690clk_domain=system.cpu_clk_domain 691default_p_state=UNDEFINED 692eventq_index=0 693is_stage2=true 694num_squash_per_cycle=2 695p_state_clk_gate_bins=20 696p_state_clk_gate_max=1000000000000 697p_state_clk_gate_min=1000 698power_model=Null 699sys=system 700 701[system.cpu.itb] 702type=ArmTLB 703children=walker 704eventq_index=0 705is_stage2=false 706size=64 707walker=system.cpu.itb.walker 708 709[system.cpu.itb.walker] 710type=ArmTableWalker 711clk_domain=system.cpu_clk_domain 712default_p_state=UNDEFINED 713eventq_index=0 714is_stage2=false 715num_squash_per_cycle=2 716p_state_clk_gate_bins=20 717p_state_clk_gate_max=1000000000000 718p_state_clk_gate_min=1000 719power_model=Null 720sys=system 721port=system.cpu.toL2Bus.slave[2] 722 723[system.cpu.l2cache] 724type=Cache 725children=tags 726addr_ranges=0:18446744073709551615 727assoc=8 728clk_domain=system.cpu_clk_domain 729clusivity=mostly_incl 730default_p_state=UNDEFINED 731demand_mshr_reserve=1 732eventq_index=0 733hit_latency=20 734is_read_only=false 735max_miss_count=0 736mshrs=20 737p_state_clk_gate_bins=20 738p_state_clk_gate_max=1000000000000 739p_state_clk_gate_min=1000 740power_model=Null 741prefetch_on_access=false 742prefetcher=Null 743response_latency=20 744sequential_access=false 745size=4194304 746system=system 747tags=system.cpu.l2cache.tags 748tgts_per_mshr=12 749write_buffers=8 750writeback_clean=false 751cpu_side=system.cpu.toL2Bus.master[0] 752mem_side=system.membus.slave[2] 753 754[system.cpu.l2cache.tags] 755type=LRU 756assoc=8 757block_size=64 758clk_domain=system.cpu_clk_domain 759default_p_state=UNDEFINED 760eventq_index=0 761hit_latency=20 762p_state_clk_gate_bins=20 763p_state_clk_gate_max=1000000000000 764p_state_clk_gate_min=1000 765power_model=Null 766sequential_access=false 767size=4194304 768 769[system.cpu.toL2Bus] 770type=CoherentXBar 771children=snoop_filter 772clk_domain=system.cpu_clk_domain 773default_p_state=UNDEFINED 774eventq_index=0 775forward_latency=0 776frontend_latency=1 777p_state_clk_gate_bins=20 778p_state_clk_gate_max=1000000000000 779p_state_clk_gate_min=1000 780point_of_coherency=false 781power_model=Null 782response_latency=1 783snoop_filter=system.cpu.toL2Bus.snoop_filter 784snoop_response_latency=1 785system=system 786use_default_range=false 787width=32 788master=system.cpu.l2cache.cpu_side 789slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 790 791[system.cpu.toL2Bus.snoop_filter] 792type=SnoopFilter 793eventq_index=0 794lookup_latency=0 795max_capacity=8388608 796system=system 797 798[system.cpu.tracer] 799type=ExeTracer 800eventq_index=0 801 802[system.cpu_clk_domain] 803type=SrcClockDomain 804clock=500 805domain_id=-1 806eventq_index=0 807init_perf_level=0 808voltage_domain=system.voltage_domain 809 810[system.dvfs_handler] 811type=DVFSHandler 812domains= 813enable=false 814eventq_index=0 815sys_clk_domain=system.clk_domain 816transition_latency=100000000 817 818[system.intrctrl] 819type=IntrControl 820eventq_index=0 821sys=system 822 823[system.iobus] 824type=NoncoherentXBar 825clk_domain=system.clk_domain 826default_p_state=UNDEFINED 827eventq_index=0 828forward_latency=1 829frontend_latency=2 830p_state_clk_gate_bins=20 831p_state_clk_gate_max=1000000000000 832p_state_clk_gate_min=1000 833power_model=Null 834response_latency=2 835use_default_range=false 836width=16 837master=system.realview.uart.pio system.realview.realview_io.pio system.realview.pci_host.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ethernet.pio system.iocache.cpu_side 838slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma 839 840[system.iocache] 841type=Cache 842children=tags 843addr_ranges=2147483648:2415919103 844assoc=8 845clk_domain=system.clk_domain 846clusivity=mostly_incl 847default_p_state=UNDEFINED 848demand_mshr_reserve=1 849eventq_index=0 850hit_latency=50 851is_read_only=false 852max_miss_count=0 853mshrs=20 854p_state_clk_gate_bins=20 855p_state_clk_gate_max=1000000000000 856p_state_clk_gate_min=1000 857power_model=Null 858prefetch_on_access=false 859prefetcher=Null 860response_latency=50 861sequential_access=false 862size=1024 863system=system 864tags=system.iocache.tags 865tgts_per_mshr=12 866write_buffers=8 867writeback_clean=false 868cpu_side=system.iobus.master[25] 869mem_side=system.membus.slave[3] 870 871[system.iocache.tags] 872type=LRU 873assoc=8 874block_size=64 875clk_domain=system.clk_domain 876default_p_state=UNDEFINED 877eventq_index=0 878hit_latency=50 879p_state_clk_gate_bins=20 880p_state_clk_gate_max=1000000000000 881p_state_clk_gate_min=1000 882power_model=Null 883sequential_access=false 884size=1024 885 886[system.membus] 887type=CoherentXBar 888children=badaddr_responder 889clk_domain=system.clk_domain 890default_p_state=UNDEFINED 891eventq_index=0 892forward_latency=4 893frontend_latency=3 894p_state_clk_gate_bins=20 895p_state_clk_gate_max=1000000000000 896p_state_clk_gate_min=1000 897point_of_coherency=true 898power_model=Null 899response_latency=2 900snoop_filter=Null 901snoop_response_latency=4 902system=system 903use_default_range=false 904width=16 905default=system.membus.badaddr_responder.pio 906master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port 907slave=system.realview.hdlcd.dma system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side 908 909[system.membus.badaddr_responder] 910type=IsaFake 911clk_domain=system.clk_domain 912default_p_state=UNDEFINED 913eventq_index=0 914fake_mem=false 915p_state_clk_gate_bins=20 916p_state_clk_gate_max=1000000000000 917p_state_clk_gate_min=1000 918pio_addr=0 919pio_latency=100000 920pio_size=8 921power_model=Null 922ret_bad_addr=true 923ret_data16=65535 924ret_data32=4294967295 925ret_data64=18446744073709551615 926ret_data8=255 927system=system 928update_data=false 929warn_access=warn 930pio=system.membus.default 931 932[system.physmem] 933type=DRAMCtrl 934IDD0=0.075000 935IDD02=0.000000 936IDD2N=0.050000 937IDD2N2=0.000000 938IDD2P0=0.000000 939IDD2P02=0.000000 940IDD2P1=0.000000 941IDD2P12=0.000000 942IDD3N=0.057000 943IDD3N2=0.000000 944IDD3P0=0.000000 945IDD3P02=0.000000 946IDD3P1=0.000000 947IDD3P12=0.000000 948IDD4R=0.187000 949IDD4R2=0.000000 950IDD4W=0.165000 951IDD4W2=0.000000 952IDD5=0.220000 953IDD52=0.000000 954IDD6=0.000000 955IDD62=0.000000 956VDD=1.500000 957VDD2=0.000000 958activation_limit=4 959addr_mapping=RoRaBaCoCh 960bank_groups_per_rank=0 961banks_per_rank=8 962burst_length=8 963channels=1 964clk_domain=system.clk_domain 965conf_table_reported=true 966default_p_state=UNDEFINED 967device_bus_width=8 968device_rowbuffer_size=1024 969device_size=536870912 970devices_per_rank=8 971dll=true 972eventq_index=0 973in_addr_map=true 974max_accesses_per_row=16 975mem_sched_policy=frfcfs 976min_writes_per_switch=16 977null=false 978p_state_clk_gate_bins=20 979p_state_clk_gate_max=1000000000000 980p_state_clk_gate_min=1000 981page_policy=open_adaptive 982power_model=Null 983range=2147483648:2415919103 984ranks_per_channel=2 985read_buffer_size=32 986static_backend_latency=10000 987static_frontend_latency=10000 988tBURST=5000 989tCCD_L=0 990tCK=1250 991tCL=13750 992tCS=2500 993tRAS=35000 994tRCD=13750 995tREFI=7800000 996tRFC=260000 997tRP=13750 998tRRD=6000 999tRRD_L=0 1000tRTP=7500 1001tRTW=2500 1002tWR=15000 1003tWTR=7500 1004tXAW=30000 1005tXP=0 1006tXPDLL=0 1007tXS=0 1008tXSDLL=0 1009write_buffer_size=64 1010write_high_thresh_perc=85 1011write_low_thresh_perc=50 1012port=system.membus.master[5] 1013 1014[system.realview] 1015type=RealView 1016children=aaci_fake cf_ctrl clcd dcc energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mcc mmc_fake nvmem pci_host realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake 1017eventq_index=0 1018intrctrl=system.intrctrl 1019system=system 1020 1021[system.realview.aaci_fake] 1022type=AmbaFake 1023amba_id=0 1024clk_domain=system.clk_domain 1025default_p_state=UNDEFINED 1026eventq_index=0 1027ignore_access=false 1028p_state_clk_gate_bins=20 1029p_state_clk_gate_max=1000000000000 1030p_state_clk_gate_min=1000 1031pio_addr=470024192 1032pio_latency=100000 1033power_model=Null 1034system=system 1035pio=system.iobus.master[18] 1036 1037[system.realview.cf_ctrl] 1038type=IdeController 1039BAR0=471465984 1040BAR0LegacyIO=true 1041BAR0Size=256 1042BAR1=471466240 1043BAR1LegacyIO=true 1044BAR1Size=4096 1045BAR2=1 1046BAR2LegacyIO=false 1047BAR2Size=8 1048BAR3=1 1049BAR3LegacyIO=false 1050BAR3Size=4 1051BAR4=1 1052BAR4LegacyIO=false 1053BAR4Size=16 1054BAR5=1 1055BAR5LegacyIO=false 1056BAR5Size=0 1057BIST=0 1058CacheLineSize=0 1059CapabilityPtr=0 1060CardbusCIS=0 1061ClassCode=1 1062Command=1 1063DeviceID=28945 1064ExpansionROM=0 1065HeaderType=0 1066InterruptLine=31 1067InterruptPin=1 1068LatencyTimer=0 1069LegacyIOBase=0 1070MSICAPBaseOffset=0 1071MSICAPCapId=0 1072MSICAPMaskBits=0 1073MSICAPMsgAddr=0 1074MSICAPMsgCtrl=0 1075MSICAPMsgData=0 1076MSICAPMsgUpperAddr=0 1077MSICAPNextCapability=0 1078MSICAPPendingBits=0 1079MSIXCAPBaseOffset=0 1080MSIXCAPCapId=0 1081MSIXCAPNextCapability=0 1082MSIXMsgCtrl=0 1083MSIXPbaOffset=0 1084MSIXTableOffset=0 1085MaximumLatency=0 1086MinimumGrant=0 1087PMCAPBaseOffset=0 1088PMCAPCapId=0 1089PMCAPCapabilities=0 1090PMCAPCtrlStatus=0 1091PMCAPNextCapability=0 1092PXCAPBaseOffset=0 1093PXCAPCapId=0 1094PXCAPCapabilities=0 1095PXCAPDevCap2=0 1096PXCAPDevCapabilities=0 1097PXCAPDevCtrl=0 1098PXCAPDevCtrl2=0 1099PXCAPDevStatus=0 1100PXCAPLinkCap=0 1101PXCAPLinkCtrl=0 1102PXCAPLinkStatus=0 1103PXCAPNextCapability=0 1104ProgIF=133 1105Revision=0 1106Status=640 1107SubClassCode=1 1108SubsystemID=0 1109SubsystemVendorID=0 1110VendorID=32902 1111clk_domain=system.clk_domain 1112config_latency=20000 1113ctrl_offset=2 1114default_p_state=UNDEFINED 1115disks= 1116eventq_index=0 1117host=system.realview.pci_host 1118io_shift=2 1119p_state_clk_gate_bins=20 1120p_state_clk_gate_max=1000000000000 1121p_state_clk_gate_min=1000 1122pci_bus=2 1123pci_dev=0 1124pci_func=0 1125pio_latency=30000 1126power_model=Null 1127system=system 1128dma=system.iobus.slave[2] 1129pio=system.iobus.master[9] 1130 1131[system.realview.clcd] 1132type=Pl111 1133amba_id=1315089 1134clk_domain=system.clk_domain 1135default_p_state=UNDEFINED 1136enable_capture=true 1137eventq_index=0 1138gic=system.realview.gic 1139int_num=46 1140p_state_clk_gate_bins=20 1141p_state_clk_gate_max=1000000000000 1142p_state_clk_gate_min=1000 1143pio_addr=471793664 1144pio_latency=10000 1145pixel_clock=41667 1146power_model=Null 1147system=system 1148vnc=system.vncserver 1149dma=system.iobus.slave[1] 1150pio=system.iobus.master[5] 1151 1152[system.realview.dcc] 1153type=SubSystem 1154children=osc_cpu osc_ddr osc_hsbm osc_pxl osc_smb osc_sys 1155eventq_index=0 1156thermal_domain=Null 1157 1158[system.realview.dcc.osc_cpu] 1159type=RealViewOsc 1160dcc=0 1161device=0 1162eventq_index=0 1163freq=16667 1164parent=system.realview.realview_io 1165position=0 1166site=1 1167voltage_domain=system.voltage_domain 1168 1169[system.realview.dcc.osc_ddr] 1170type=RealViewOsc 1171dcc=0 1172device=8 1173eventq_index=0 1174freq=25000 1175parent=system.realview.realview_io 1176position=0 1177site=1 1178voltage_domain=system.voltage_domain 1179 1180[system.realview.dcc.osc_hsbm] 1181type=RealViewOsc 1182dcc=0 1183device=4 1184eventq_index=0 1185freq=25000 1186parent=system.realview.realview_io 1187position=0 1188site=1 1189voltage_domain=system.voltage_domain 1190 1191[system.realview.dcc.osc_pxl] 1192type=RealViewOsc 1193dcc=0 1194device=5 1195eventq_index=0 1196freq=42105 1197parent=system.realview.realview_io 1198position=0 1199site=1 1200voltage_domain=system.voltage_domain 1201 1202[system.realview.dcc.osc_smb] 1203type=RealViewOsc 1204dcc=0 1205device=6 1206eventq_index=0 1207freq=20000 1208parent=system.realview.realview_io 1209position=0 1210site=1 1211voltage_domain=system.voltage_domain 1212 1213[system.realview.dcc.osc_sys] 1214type=RealViewOsc 1215dcc=0 1216device=7 1217eventq_index=0 1218freq=16667 1219parent=system.realview.realview_io 1220position=0 1221site=1 1222voltage_domain=system.voltage_domain 1223 1224[system.realview.energy_ctrl] 1225type=EnergyCtrl 1226clk_domain=system.clk_domain 1227default_p_state=UNDEFINED 1228dvfs_handler=system.dvfs_handler 1229eventq_index=0 1230p_state_clk_gate_bins=20 1231p_state_clk_gate_max=1000000000000 1232p_state_clk_gate_min=1000 1233pio_addr=470286336 1234pio_latency=100000 1235power_model=Null 1236system=system 1237pio=system.iobus.master[22] 1238 1239[system.realview.ethernet] 1240type=IGbE 1241BAR0=0 1242BAR0LegacyIO=false 1243BAR0Size=131072 1244BAR1=0 1245BAR1LegacyIO=false 1246BAR1Size=0 1247BAR2=0 1248BAR2LegacyIO=false 1249BAR2Size=0 1250BAR3=0 1251BAR3LegacyIO=false 1252BAR3Size=0 1253BAR4=0 1254BAR4LegacyIO=false 1255BAR4Size=0 1256BAR5=0 1257BAR5LegacyIO=false 1258BAR5Size=0 1259BIST=0 1260CacheLineSize=0 1261CapabilityPtr=0 1262CardbusCIS=0 1263ClassCode=2 1264Command=0 1265DeviceID=4213 1266ExpansionROM=0 1267HeaderType=0 1268InterruptLine=1 1269InterruptPin=1 1270LatencyTimer=0 1271LegacyIOBase=0 1272MSICAPBaseOffset=0 1273MSICAPCapId=0 1274MSICAPMaskBits=0 1275MSICAPMsgAddr=0 1276MSICAPMsgCtrl=0 1277MSICAPMsgData=0 1278MSICAPMsgUpperAddr=0 1279MSICAPNextCapability=0 1280MSICAPPendingBits=0 1281MSIXCAPBaseOffset=0 1282MSIXCAPCapId=0 1283MSIXCAPNextCapability=0 1284MSIXMsgCtrl=0 1285MSIXPbaOffset=0 1286MSIXTableOffset=0 1287MaximumLatency=0 1288MinimumGrant=255 1289PMCAPBaseOffset=0 1290PMCAPCapId=0 1291PMCAPCapabilities=0 1292PMCAPCtrlStatus=0 1293PMCAPNextCapability=0 1294PXCAPBaseOffset=0 1295PXCAPCapId=0 1296PXCAPCapabilities=0 1297PXCAPDevCap2=0 1298PXCAPDevCapabilities=0 1299PXCAPDevCtrl=0 1300PXCAPDevCtrl2=0 1301PXCAPDevStatus=0 1302PXCAPLinkCap=0 1303PXCAPLinkCtrl=0 1304PXCAPLinkStatus=0 1305PXCAPNextCapability=0 1306ProgIF=0 1307Revision=0 1308Status=0 1309SubClassCode=0 1310SubsystemID=4104 1311SubsystemVendorID=32902 1312VendorID=32902 1313clk_domain=system.clk_domain 1314config_latency=20000 1315default_p_state=UNDEFINED 1316eventq_index=0 1317fetch_comp_delay=10000 1318fetch_delay=10000 1319hardware_address=00:90:00:00:00:01 1320host=system.realview.pci_host 1321p_state_clk_gate_bins=20 1322p_state_clk_gate_max=1000000000000 1323p_state_clk_gate_min=1000 1324pci_bus=0 1325pci_dev=0 1326pci_func=0 1327phy_epid=896 1328phy_pid=680 1329pio_latency=30000 1330power_model=Null 1331rx_desc_cache_size=64 1332rx_fifo_size=393216 1333rx_write_delay=0 1334system=system 1335tx_desc_cache_size=64 1336tx_fifo_size=393216 1337tx_read_delay=0 1338wb_comp_delay=10000 1339wb_delay=10000 1340dma=system.iobus.slave[4] 1341pio=system.iobus.master[24] 1342 1343[system.realview.generic_timer] 1344type=GenericTimer 1345eventq_index=0 1346gic=system.realview.gic 1347int_phys=29 1348int_virt=27 1349system=system 1350 1351[system.realview.gic] 1352type=Pl390 1353clk_domain=system.clk_domain 1354cpu_addr=738205696 1355cpu_pio_delay=10000 1356default_p_state=UNDEFINED 1357dist_addr=738201600 1358dist_pio_delay=10000 1359eventq_index=0 1360gem5_extensions=true 1361int_latency=10000 1362it_lines=128 1363p_state_clk_gate_bins=20 1364p_state_clk_gate_max=1000000000000 1365p_state_clk_gate_min=1000 1366platform=system.realview 1367power_model=Null 1368system=system 1369pio=system.membus.master[2] 1370 1371[system.realview.hdlcd] 1372type=HDLcd 1373amba_id=1314816 1374clk_domain=system.clk_domain 1375default_p_state=UNDEFINED 1376enable_capture=true 1377eventq_index=0 1378gic=system.realview.gic 1379int_num=117 1380p_state_clk_gate_bins=20 1381p_state_clk_gate_max=1000000000000 1382p_state_clk_gate_min=1000 1383pio_addr=721420288 1384pio_latency=10000 1385pixel_buffer_size=2048 1386pixel_chunk=32 1387power_model=Null 1388pxl_clk=system.realview.dcc.osc_pxl 1389system=system 1390vnc=system.vncserver 1391workaround_dma_line_count=true 1392workaround_swap_rb=true 1393dma=system.membus.slave[0] 1394pio=system.iobus.master[6] 1395 1396[system.realview.ide] 1397type=IdeController 1398BAR0=1 1399BAR0LegacyIO=false 1400BAR0Size=8 1401BAR1=1 1402BAR1LegacyIO=false 1403BAR1Size=4 1404BAR2=1 1405BAR2LegacyIO=false 1406BAR2Size=8 1407BAR3=1 1408BAR3LegacyIO=false 1409BAR3Size=4 1410BAR4=1 1411BAR4LegacyIO=false 1412BAR4Size=16 1413BAR5=1 1414BAR5LegacyIO=false 1415BAR5Size=0 1416BIST=0 1417CacheLineSize=0 1418CapabilityPtr=0 1419CardbusCIS=0 1420ClassCode=1 1421Command=0 1422DeviceID=28945 1423ExpansionROM=0 1424HeaderType=0 1425InterruptLine=2 1426InterruptPin=2 1427LatencyTimer=0 1428LegacyIOBase=0 1429MSICAPBaseOffset=0 1430MSICAPCapId=0 1431MSICAPMaskBits=0 1432MSICAPMsgAddr=0 1433MSICAPMsgCtrl=0 1434MSICAPMsgData=0 1435MSICAPMsgUpperAddr=0 1436MSICAPNextCapability=0 1437MSICAPPendingBits=0 1438MSIXCAPBaseOffset=0 1439MSIXCAPCapId=0 1440MSIXCAPNextCapability=0 1441MSIXMsgCtrl=0 1442MSIXPbaOffset=0 1443MSIXTableOffset=0 1444MaximumLatency=0 1445MinimumGrant=0 1446PMCAPBaseOffset=0 1447PMCAPCapId=0 1448PMCAPCapabilities=0 1449PMCAPCtrlStatus=0 1450PMCAPNextCapability=0 1451PXCAPBaseOffset=0 1452PXCAPCapId=0 1453PXCAPCapabilities=0 1454PXCAPDevCap2=0 1455PXCAPDevCapabilities=0 1456PXCAPDevCtrl=0 1457PXCAPDevCtrl2=0 1458PXCAPDevStatus=0 1459PXCAPLinkCap=0 1460PXCAPLinkCtrl=0 1461PXCAPLinkStatus=0 1462PXCAPNextCapability=0 1463ProgIF=133 1464Revision=0 1465Status=640 1466SubClassCode=1 1467SubsystemID=0 1468SubsystemVendorID=0 1469VendorID=32902 1470clk_domain=system.clk_domain 1471config_latency=20000 1472ctrl_offset=0 1473default_p_state=UNDEFINED 1474disks=system.cf0 1475eventq_index=0 1476host=system.realview.pci_host 1477io_shift=0 1478p_state_clk_gate_bins=20 1479p_state_clk_gate_max=1000000000000 1480p_state_clk_gate_min=1000 1481pci_bus=0 1482pci_dev=1 1483pci_func=0 1484pio_latency=30000 1485power_model=Null 1486system=system 1487dma=system.iobus.slave[3] 1488pio=system.iobus.master[23] 1489 1490[system.realview.kmi0] 1491type=Pl050 1492amba_id=1314896 1493clk_domain=system.clk_domain 1494default_p_state=UNDEFINED 1495eventq_index=0 1496gic=system.realview.gic 1497int_delay=1000000 1498int_num=44 1499is_mouse=false 1500p_state_clk_gate_bins=20 1501p_state_clk_gate_max=1000000000000 1502p_state_clk_gate_min=1000 1503pio_addr=470155264 1504pio_latency=100000 1505power_model=Null 1506system=system 1507vnc=system.vncserver 1508pio=system.iobus.master[7] 1509 1510[system.realview.kmi1] 1511type=Pl050 1512amba_id=1314896 1513clk_domain=system.clk_domain 1514default_p_state=UNDEFINED 1515eventq_index=0 1516gic=system.realview.gic 1517int_delay=1000000 1518int_num=45 1519is_mouse=true 1520p_state_clk_gate_bins=20 1521p_state_clk_gate_max=1000000000000 1522p_state_clk_gate_min=1000 1523pio_addr=470220800 1524pio_latency=100000 1525power_model=Null 1526system=system 1527vnc=system.vncserver 1528pio=system.iobus.master[8] 1529 1530[system.realview.l2x0_fake] 1531type=IsaFake 1532clk_domain=system.clk_domain 1533default_p_state=UNDEFINED 1534eventq_index=0 1535fake_mem=false 1536p_state_clk_gate_bins=20 1537p_state_clk_gate_max=1000000000000 1538p_state_clk_gate_min=1000 1539pio_addr=739246080 1540pio_latency=100000 1541pio_size=4095 1542power_model=Null 1543ret_bad_addr=false 1544ret_data16=65535 1545ret_data32=4294967295 1546ret_data64=18446744073709551615 1547ret_data8=255 1548system=system 1549update_data=false 1550warn_access= 1551pio=system.iobus.master[12] 1552 1553[system.realview.lan_fake] 1554type=IsaFake 1555clk_domain=system.clk_domain 1556default_p_state=UNDEFINED 1557eventq_index=0 1558fake_mem=false 1559p_state_clk_gate_bins=20 1560p_state_clk_gate_max=1000000000000 1561p_state_clk_gate_min=1000 1562pio_addr=436207616 1563pio_latency=100000 1564pio_size=65535 1565power_model=Null 1566ret_bad_addr=false 1567ret_data16=65535 1568ret_data32=4294967295 1569ret_data64=18446744073709551615 1570ret_data8=255 1571system=system 1572update_data=false 1573warn_access= 1574pio=system.iobus.master[19] 1575 1576[system.realview.local_cpu_timer] 1577type=CpuLocalTimer 1578clk_domain=system.clk_domain 1579default_p_state=UNDEFINED 1580eventq_index=0 1581gic=system.realview.gic 1582int_num_timer=29 1583int_num_watchdog=30 1584p_state_clk_gate_bins=20 1585p_state_clk_gate_max=1000000000000 1586p_state_clk_gate_min=1000 1587pio_addr=738721792 1588pio_latency=100000 1589power_model=Null 1590system=system 1591pio=system.membus.master[4] 1592 1593[system.realview.mcc] 1594type=SubSystem 1595children=osc_clcd osc_mcc osc_peripheral osc_system_bus temp_crtl 1596eventq_index=0 1597thermal_domain=Null 1598 1599[system.realview.mcc.osc_clcd] 1600type=RealViewOsc 1601dcc=0 1602device=1 1603eventq_index=0 1604freq=42105 1605parent=system.realview.realview_io 1606position=0 1607site=0 1608voltage_domain=system.voltage_domain 1609 1610[system.realview.mcc.osc_mcc] 1611type=RealViewOsc 1612dcc=0 1613device=0 1614eventq_index=0 1615freq=20000 1616parent=system.realview.realview_io 1617position=0 1618site=0 1619voltage_domain=system.voltage_domain 1620 1621[system.realview.mcc.osc_peripheral] 1622type=RealViewOsc 1623dcc=0 1624device=2 1625eventq_index=0 1626freq=41667 1627parent=system.realview.realview_io 1628position=0 1629site=0 1630voltage_domain=system.voltage_domain 1631 1632[system.realview.mcc.osc_system_bus] 1633type=RealViewOsc 1634dcc=0 1635device=4 1636eventq_index=0 1637freq=41667 1638parent=system.realview.realview_io 1639position=0 1640site=0 1641voltage_domain=system.voltage_domain 1642 1643[system.realview.mcc.temp_crtl] 1644type=RealViewTemperatureSensor 1645dcc=0 1646device=0 1647eventq_index=0 1648parent=system.realview.realview_io 1649position=0 1650site=0 1651system=system 1652 1653[system.realview.mmc_fake] 1654type=AmbaFake 1655amba_id=0 1656clk_domain=system.clk_domain 1657default_p_state=UNDEFINED 1658eventq_index=0 1659ignore_access=false 1660p_state_clk_gate_bins=20 1661p_state_clk_gate_max=1000000000000 1662p_state_clk_gate_min=1000 1663pio_addr=470089728 1664pio_latency=100000 1665power_model=Null 1666system=system 1667pio=system.iobus.master[21] 1668 1669[system.realview.nvmem] 1670type=SimpleMemory 1671bandwidth=73.000000 1672clk_domain=system.clk_domain 1673conf_table_reported=false 1674default_p_state=UNDEFINED 1675eventq_index=0 1676in_addr_map=true 1677latency=30000 1678latency_var=0 1679null=false 1680p_state_clk_gate_bins=20 1681p_state_clk_gate_max=1000000000000 1682p_state_clk_gate_min=1000 1683power_model=Null 1684range=0:67108863 1685port=system.membus.master[1] 1686 1687[system.realview.pci_host] 1688type=GenericPciHost 1689clk_domain=system.clk_domain 1690conf_base=805306368 1691conf_device_bits=16 1692conf_size=268435456 1693default_p_state=UNDEFINED 1694eventq_index=0 1695p_state_clk_gate_bins=20 1696p_state_clk_gate_max=1000000000000 1697p_state_clk_gate_min=1000 1698pci_dma_base=0 1699pci_mem_base=0 1700pci_pio_base=0 1701platform=system.realview 1702power_model=Null 1703system=system 1704pio=system.iobus.master[2] 1705 1706[system.realview.realview_io] 1707type=RealViewCtrl 1708clk_domain=system.clk_domain 1709default_p_state=UNDEFINED 1710eventq_index=0 1711idreg=35979264 1712p_state_clk_gate_bins=20 1713p_state_clk_gate_max=1000000000000 1714p_state_clk_gate_min=1000 1715pio_addr=469827584 1716pio_latency=100000 1717power_model=Null 1718proc_id0=335544320 1719proc_id1=335544320 1720system=system 1721pio=system.iobus.master[1] 1722 1723[system.realview.rtc] 1724type=PL031 1725amba_id=3412017 1726clk_domain=system.clk_domain 1727default_p_state=UNDEFINED 1728eventq_index=0 1729gic=system.realview.gic 1730int_delay=100000 1731int_num=36 1732p_state_clk_gate_bins=20 1733p_state_clk_gate_max=1000000000000 1734p_state_clk_gate_min=1000 1735pio_addr=471269376 1736pio_latency=100000 1737power_model=Null 1738system=system 1739time=Thu Jan 1 00:00:00 2009 1740pio=system.iobus.master[10] 1741 1742[system.realview.sp810_fake] 1743type=AmbaFake 1744amba_id=0 1745clk_domain=system.clk_domain 1746default_p_state=UNDEFINED 1747eventq_index=0 1748ignore_access=true 1749p_state_clk_gate_bins=20 1750p_state_clk_gate_max=1000000000000 1751p_state_clk_gate_min=1000 1752pio_addr=469893120 1753pio_latency=100000 1754power_model=Null 1755system=system 1756pio=system.iobus.master[16] 1757 1758[system.realview.timer0] 1759type=Sp804 1760amba_id=1316868 1761clk_domain=system.clk_domain 1762clock0=1000000 1763clock1=1000000 1764default_p_state=UNDEFINED 1765eventq_index=0 1766gic=system.realview.gic 1767int_num0=34 1768int_num1=34 1769p_state_clk_gate_bins=20 1770p_state_clk_gate_max=1000000000000 1771p_state_clk_gate_min=1000 1772pio_addr=470876160 1773pio_latency=100000 1774power_model=Null 1775system=system 1776pio=system.iobus.master[3] 1777 1778[system.realview.timer1] 1779type=Sp804 1780amba_id=1316868 1781clk_domain=system.clk_domain 1782clock0=1000000 1783clock1=1000000 1784default_p_state=UNDEFINED 1785eventq_index=0 1786gic=system.realview.gic 1787int_num0=35 1788int_num1=35 1789p_state_clk_gate_bins=20 1790p_state_clk_gate_max=1000000000000 1791p_state_clk_gate_min=1000 1792pio_addr=470941696 1793pio_latency=100000 1794power_model=Null 1795system=system 1796pio=system.iobus.master[4] 1797 1798[system.realview.uart] 1799type=Pl011 1800clk_domain=system.clk_domain 1801default_p_state=UNDEFINED 1802end_on_eot=false 1803eventq_index=0 1804gic=system.realview.gic 1805int_delay=100000 1806int_num=37 1807p_state_clk_gate_bins=20 1808p_state_clk_gate_max=1000000000000 1809p_state_clk_gate_min=1000 1810pio_addr=470351872 1811pio_latency=100000 1812platform=system.realview 1813power_model=Null 1814system=system 1815terminal=system.terminal 1816pio=system.iobus.master[0] 1817 1818[system.realview.uart1_fake] 1819type=AmbaFake 1820amba_id=0 1821clk_domain=system.clk_domain 1822default_p_state=UNDEFINED 1823eventq_index=0 1824ignore_access=false 1825p_state_clk_gate_bins=20 1826p_state_clk_gate_max=1000000000000 1827p_state_clk_gate_min=1000 1828pio_addr=470417408 1829pio_latency=100000 1830power_model=Null 1831system=system 1832pio=system.iobus.master[13] 1833 1834[system.realview.uart2_fake] 1835type=AmbaFake 1836amba_id=0 1837clk_domain=system.clk_domain 1838default_p_state=UNDEFINED 1839eventq_index=0 1840ignore_access=false 1841p_state_clk_gate_bins=20 1842p_state_clk_gate_max=1000000000000 1843p_state_clk_gate_min=1000 1844pio_addr=470482944 1845pio_latency=100000 1846power_model=Null 1847system=system 1848pio=system.iobus.master[14] 1849 1850[system.realview.uart3_fake] 1851type=AmbaFake 1852amba_id=0 1853clk_domain=system.clk_domain 1854default_p_state=UNDEFINED 1855eventq_index=0 1856ignore_access=false 1857p_state_clk_gate_bins=20 1858p_state_clk_gate_max=1000000000000 1859p_state_clk_gate_min=1000 1860pio_addr=470548480 1861pio_latency=100000 1862power_model=Null 1863system=system 1864pio=system.iobus.master[15] 1865 1866[system.realview.usb_fake] 1867type=IsaFake 1868clk_domain=system.clk_domain 1869default_p_state=UNDEFINED 1870eventq_index=0 1871fake_mem=false 1872p_state_clk_gate_bins=20 1873p_state_clk_gate_max=1000000000000 1874p_state_clk_gate_min=1000 1875pio_addr=452984832 1876pio_latency=100000 1877pio_size=131071 1878power_model=Null 1879ret_bad_addr=false 1880ret_data16=65535 1881ret_data32=4294967295 1882ret_data64=18446744073709551615 1883ret_data8=255 1884system=system 1885update_data=false 1886warn_access= 1887pio=system.iobus.master[20] 1888 1889[system.realview.vgic] 1890type=VGic 1891clk_domain=system.clk_domain 1892default_p_state=UNDEFINED 1893eventq_index=0 1894gic=system.realview.gic 1895hv_addr=738213888 1896p_state_clk_gate_bins=20 1897p_state_clk_gate_max=1000000000000 1898p_state_clk_gate_min=1000 1899pio_delay=10000 1900platform=system.realview 1901power_model=Null 1902ppint=25 1903system=system 1904vcpu_addr=738222080 1905pio=system.membus.master[3] 1906 1907[system.realview.vram] 1908type=SimpleMemory 1909bandwidth=73.000000 1910clk_domain=system.clk_domain 1911conf_table_reported=false 1912default_p_state=UNDEFINED 1913eventq_index=0 1914in_addr_map=true 1915latency=30000 1916latency_var=0 1917null=false 1918p_state_clk_gate_bins=20 1919p_state_clk_gate_max=1000000000000 1920p_state_clk_gate_min=1000 1921power_model=Null 1922range=402653184:436207615 1923port=system.iobus.master[11] 1924 1925[system.realview.watchdog_fake] 1926type=AmbaFake 1927amba_id=0 1928clk_domain=system.clk_domain 1929default_p_state=UNDEFINED 1930eventq_index=0 1931ignore_access=false 1932p_state_clk_gate_bins=20 1933p_state_clk_gate_max=1000000000000 1934p_state_clk_gate_min=1000 1935pio_addr=470745088 1936pio_latency=100000 1937power_model=Null 1938system=system 1939pio=system.iobus.master[17] 1940 1941[system.terminal] 1942type=Terminal 1943eventq_index=0 1944intr_control=system.intrctrl 1945number=0 1946output=true 1947port=3456 1948 1949[system.vncserver] 1950type=VncServer 1951eventq_index=0 1952frame_capture=false 1953number=0 1954port=5900 1955 1956[system.voltage_domain] 1957type=VoltageDomain 1958eventq_index=0 1959voltage=1.000000 1960 1961