1# Copyright (c) 2012 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license 9# terms below provided that you ensure that this notice is replicated 10# unmodified and in its entirety in all distributions of the software, 11# modified or unmodified, in source code or in binary form. 12# 13# Redistribution and use in source and binary forms, with or without 14# modification, are permitted provided that the following conditions are 15# met: redistributions of source code must retain the above copyright 16# notice, this list of conditions and the following disclaimer; 17# redistributions in binary form must reproduce the above copyright 18# notice, this list of conditions and the following disclaimer in the 19# documentation and/or other materials provided with the distribution; 20# neither the name of the copyright holders nor the names of its 21# contributors may be used to endorse or promote products derived from 22# this software without specific prior written permission. 23# 24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 25# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 27# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 28# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 29# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35# 36# Authors: Andreas Sandberg 37 38from abc import ABCMeta, abstractmethod 39import m5 40from m5.objects import * 41from m5.proxy import * 42m5.util.addToPath('../configs/') 43from common.Benchmarks import SysConfig 44from common import FSConfig, SysPaths 45from common.Caches import * 46from base_config import * 47 48class LinuxX86SystemBuilder(object): 49 """Mix-in that implements create_system. 50 51 This mix-in is intended as a convenient way of adding an 52 X86-specific create_system method to a class deriving from one of 53 the generic base systems. 54 """ 55 def __init__(self): 56 pass 57 58 def create_system(self): 59 mdesc = SysConfig(disk = 'linux-x86.img') 60 system = FSConfig.makeLinuxX86System(self.mem_mode, 61 numCPUs=self.num_cpus, 62 mdesc=mdesc) 63 system.kernel = SysPaths.binary('x86_64-vmlinux-2.6.22.9') 64 65 self.init_system(system) 66 return system 67 68class LinuxX86FSSystem(LinuxX86SystemBuilder, 69 BaseFSSystem): 70 """Basic X86 full system builder.""" 71 72 def __init__(self, **kwargs): 73 """Initialize an X86 system that supports full system simulation. 74 75 Note: Keyword arguments that are not listed below will be 76 passed to the BaseFSSystem. 77 78 Keyword Arguments: 79 machine_type -- String describing the platform to simulate 80 """ 81 BaseSystem.__init__(self, **kwargs) 82 LinuxX86SystemBuilder.__init__(self) 83 84 def create_caches_private(self, cpu): 85 cpu.addPrivateSplitL1Caches(L1_ICache(size='32kB', assoc=1), 86 L1_DCache(size='32kB', assoc=4), 87 PageTableWalkerCache(), 88 PageTableWalkerCache()) 89 90class LinuxX86FSSystemUniprocessor(LinuxX86SystemBuilder, 91 BaseFSSystemUniprocessor): 92 """Basic X86 full system builder for uniprocessor systems. 93 94 Note: This class is a specialization of the X86FSSystem and is 95 only really needed to provide backwards compatibility for existing 96 test cases. 97 """ 98 99 def __init__(self, **kwargs): 100 BaseFSSystemUniprocessor.__init__(self, **kwargs) 101 LinuxX86SystemBuilder.__init__(self) 102 103 def create_caches_private(self, cpu): 104 cpu.addTwoLevelCacheHierarchy(L1_ICache(size='32kB', assoc=1), 105 L1_DCache(size='32kB', assoc=4), 106 L2Cache(size='4MB', assoc=8), 107 PageTableWalkerCache(), 108 PageTableWalkerCache()) 109 110 111class LinuxX86FSSwitcheroo(LinuxX86SystemBuilder, BaseFSSwitcheroo): 112 """Uniprocessor X86 system prepared for CPU switching""" 113 114 def __init__(self, **kwargs): 115 BaseFSSwitcheroo.__init__(self, **kwargs) 116 LinuxX86SystemBuilder.__init__(self) 117