simple-timing.py revision 2998
1import m5 2from m5.objects import * 3m5.AddToPath('../configs/common') 4from SEConfig import * 5 6class MyCache(BaseCache): 7 assoc = 2 8 block_size = 64 9 latency = 1 10 mshrs = 10 11 tgts_per_mshr = 5 12 13cpu = TimingSimpleCPU() 14cpu.addTwoLevelCacheHierarchy(MyCache(size = '128kB'), MyCache(size = '256kB'), 15 MyCache(size = '2MB')) 16 17system = System(cpu = cpu, 18 physmem = PhysicalMemory(), 19 membus = Bus()) 20system.physmem.port = system.membus.port 21cpu.connectMemPorts(system.membus) 22 23root = Root(system = system) 24