arm_generic.py revision 10406:3819b85ff21a
15625Sgblack@eecs.umich.edu# Copyright (c) 2012 ARM Limited 25625Sgblack@eecs.umich.edu# All rights reserved. 35625Sgblack@eecs.umich.edu# 45625Sgblack@eecs.umich.edu# The license below extends only to copyright in the software and shall 57087Snate@binkert.org# not be construed as granting a license to any other intellectual 67087Snate@binkert.org# property including but not limited to intellectual property relating 77087Snate@binkert.org# to a hardware implementation of the functionality of the software 87087Snate@binkert.org# licensed hereunder. You may use the software subject to the license 97087Snate@binkert.org# terms below provided that you ensure that this notice is replicated 107087Snate@binkert.org# unmodified and in its entirety in all distributions of the software, 117087Snate@binkert.org# modified or unmodified, in source code or in binary form. 127087Snate@binkert.org# 135625Sgblack@eecs.umich.edu# Redistribution and use in source and binary forms, with or without 147087Snate@binkert.org# modification, are permitted provided that the following conditions are 157087Snate@binkert.org# met: redistributions of source code must retain the above copyright 167087Snate@binkert.org# notice, this list of conditions and the following disclaimer; 177087Snate@binkert.org# redistributions in binary form must reproduce the above copyright 187087Snate@binkert.org# notice, this list of conditions and the following disclaimer in the 197087Snate@binkert.org# documentation and/or other materials provided with the distribution; 207087Snate@binkert.org# neither the name of the copyright holders nor the names of its 217087Snate@binkert.org# contributors may be used to endorse or promote products derived from 225625Sgblack@eecs.umich.edu# this software without specific prior written permission. 237087Snate@binkert.org# 245625Sgblack@eecs.umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 255625Sgblack@eecs.umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 265625Sgblack@eecs.umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 275625Sgblack@eecs.umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 285625Sgblack@eecs.umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 295625Sgblack@eecs.umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 305625Sgblack@eecs.umich.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 315625Sgblack@eecs.umich.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 325625Sgblack@eecs.umich.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 335625Sgblack@eecs.umich.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 345625Sgblack@eecs.umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 355625Sgblack@eecs.umich.edu# 365625Sgblack@eecs.umich.edu# Authors: Andreas Sandberg 375625Sgblack@eecs.umich.edu 385625Sgblack@eecs.umich.edufrom abc import ABCMeta, abstractmethod 395625Sgblack@eecs.umich.eduimport m5 405625Sgblack@eecs.umich.edufrom m5.objects import * 415625Sgblack@eecs.umich.edufrom m5.proxy import * 425625Sgblack@eecs.umich.edum5.util.addToPath('../configs/common') 436216Snate@binkert.orgimport FSConfig 448706Sandreas.hansson@arm.comfrom Caches import * 455625Sgblack@eecs.umich.edufrom base_config import * 465625Sgblack@eecs.umich.edufrom O3_ARM_v7a import * 475625Sgblack@eecs.umich.edu 485625Sgblack@eecs.umich.educlass ArmSESystemUniprocessor(BaseSESystemUniprocessor): 495625Sgblack@eecs.umich.edu """Syscall-emulation builder for ARM uniprocessor systems. 505625Sgblack@eecs.umich.edu 515625Sgblack@eecs.umich.edu A small tweak of the syscall-emulation builder to use more 525625Sgblack@eecs.umich.edu representative cache configurations. 535625Sgblack@eecs.umich.edu """ 545625Sgblack@eecs.umich.edu 555625Sgblack@eecs.umich.edu def __init__(self, **kwargs): 565625Sgblack@eecs.umich.edu BaseSESystem.__init__(self, **kwargs) 575625Sgblack@eecs.umich.edu 585625Sgblack@eecs.umich.edu def create_caches_private(self, cpu): 595625Sgblack@eecs.umich.edu # The atomic SE configurations do not use caches 605625Sgblack@eecs.umich.edu if self.mem_mode == "timing": 615625Sgblack@eecs.umich.edu # Use the more representative cache configuration 625625Sgblack@eecs.umich.edu cpu.addTwoLevelCacheHierarchy(O3_ARM_v7a_ICache(), 635625Sgblack@eecs.umich.edu O3_ARM_v7a_DCache(), 645625Sgblack@eecs.umich.edu O3_ARM_v7aL2()) 655625Sgblack@eecs.umich.edu 665625Sgblack@eecs.umich.educlass LinuxArmSystemBuilder(object): 675625Sgblack@eecs.umich.edu """Mix-in that implements create_system. 685625Sgblack@eecs.umich.edu 695625Sgblack@eecs.umich.edu This mix-in is intended as a convenient way of adding an 705625Sgblack@eecs.umich.edu ARM-specific create_system method to a class deriving from one of 715625Sgblack@eecs.umich.edu the generic base systems. 725625Sgblack@eecs.umich.edu """ 738706Sandreas.hansson@arm.com def __init__(self, machine_type): 745625Sgblack@eecs.umich.edu """ 758737Skoansin.tan@gmail.com Arguments: 768706Sandreas.hansson@arm.com machine_type -- String describing the platform to simulate 775625Sgblack@eecs.umich.edu """ 785625Sgblack@eecs.umich.edu self.machine_type = machine_type 795625Sgblack@eecs.umich.edu 805625Sgblack@eecs.umich.edu def create_system(self): 815625Sgblack@eecs.umich.edu system = FSConfig.makeArmSystem(self.mem_mode, 825625Sgblack@eecs.umich.edu self.machine_type, None, False) 835625Sgblack@eecs.umich.edu 845625Sgblack@eecs.umich.edu # We typically want the simulator to panic if the kernel 855625Sgblack@eecs.umich.edu # panics or oopses. This prevents the simulator from running 865625Sgblack@eecs.umich.edu # an obviously failed test case until the end of time. 878706Sandreas.hansson@arm.com system.panic_on_panic = True 885625Sgblack@eecs.umich.edu system.panic_on_oops = True 895625Sgblack@eecs.umich.edu 905625Sgblack@eecs.umich.edu self.init_system(system) 915625Sgblack@eecs.umich.edu return system 925625Sgblack@eecs.umich.edu 935625Sgblack@eecs.umich.educlass LinuxArmFSSystem(LinuxArmSystemBuilder, 945625Sgblack@eecs.umich.edu BaseFSSystem): 955625Sgblack@eecs.umich.edu """Basic ARM full system builder.""" 965625Sgblack@eecs.umich.edu 975625Sgblack@eecs.umich.edu def __init__(self, machine_type='RealView_PBX', **kwargs): 985625Sgblack@eecs.umich.edu """Initialize an ARM system that supports full system simulation. 995625Sgblack@eecs.umich.edu 1008706Sandreas.hansson@arm.com Note: Keyword arguments that are not listed below will be 1015625Sgblack@eecs.umich.edu passed to the BaseFSSystem. 1025625Sgblack@eecs.umich.edu 1035625Sgblack@eecs.umich.edu Keyword Arguments: 1045625Sgblack@eecs.umich.edu machine_type -- String describing the platform to simulate 1055625Sgblack@eecs.umich.edu """ 1065625Sgblack@eecs.umich.edu BaseSystem.__init__(self, **kwargs) 1075625Sgblack@eecs.umich.edu LinuxArmSystemBuilder.__init__(self, machine_type) 1085625Sgblack@eecs.umich.edu 1095625Sgblack@eecs.umich.edu def create_caches_private(self, cpu): 1108706Sandreas.hansson@arm.com # Use the more representative cache configuration 1115625Sgblack@eecs.umich.edu cpu.addTwoLevelCacheHierarchy(O3_ARM_v7a_ICache(), 1125625Sgblack@eecs.umich.edu O3_ARM_v7a_DCache(), 1135625Sgblack@eecs.umich.edu O3_ARM_v7aL2()) 1145625Sgblack@eecs.umich.edu 1155625Sgblack@eecs.umich.educlass LinuxArmFSSystemUniprocessor(LinuxArmSystemBuilder, 1165625Sgblack@eecs.umich.edu BaseFSSystemUniprocessor): 1175625Sgblack@eecs.umich.edu """Basic ARM full system builder for uniprocessor systems. 1185625Sgblack@eecs.umich.edu 1195625Sgblack@eecs.umich.edu Note: This class is a specialization of the ArmFSSystem and is 1205625Sgblack@eecs.umich.edu only really needed to provide backwards compatibility for existing 1215625Sgblack@eecs.umich.edu test cases. 1225625Sgblack@eecs.umich.edu """ 1238706Sandreas.hansson@arm.com 1245625Sgblack@eecs.umich.edu def __init__(self, machine_type='RealView_PBX', **kwargs): 1255625Sgblack@eecs.umich.edu BaseFSSystemUniprocessor.__init__(self, **kwargs) 1265625Sgblack@eecs.umich.edu LinuxArmSystemBuilder.__init__(self, machine_type) 1278706Sandreas.hansson@arm.com 1285625Sgblack@eecs.umich.educlass LinuxArmFSSwitcheroo(LinuxArmSystemBuilder, BaseFSSwitcheroo): 1295625Sgblack@eecs.umich.edu """Uniprocessor ARM system prepared for CPU switching""" 1305625Sgblack@eecs.umich.edu 1318706Sandreas.hansson@arm.com def __init__(self, machine_type='RealView_PBX', **kwargs): 1325625Sgblack@eecs.umich.edu BaseFSSwitcheroo.__init__(self, **kwargs) 1335625Sgblack@eecs.umich.edu LinuxArmSystemBuilder.__init__(self, machine_type) 1348706Sandreas.hansson@arm.com