paljtokern.S revision 8026:680f5c014bed
1/* 2 * Copyright (c) 2003, 2004 3 * The Regents of The University of Michigan 4 * All Rights Reserved 5 * 6 * This code is part of the M5 simulator. 7 * 8 * Permission is granted to use, copy, create derivative works and 9 * redistribute this software and such derivative works for any purpose, 10 * so long as the copyright notice above, this grant of permission, and 11 * the disclaimer below appear in all copies made; and so long as the 12 * name of The University of Michigan is not used in any advertising or 13 * publicity pertaining to the use or distribution of this software 14 * without specific, written prior authorization. 15 * 16 * THIS SOFTWARE IS PROVIDED AS IS, WITHOUT REPRESENTATION FROM THE 17 * UNIVERSITY OF MICHIGAN AS TO ITS FITNESS FOR ANY PURPOSE, AND WITHOUT 18 * WARRANTY BY THE UNIVERSITY OF MICHIGAN OF ANY KIND, EITHER EXPRESS OR 19 * IMPLIED, INCLUDING WITHOUT LIMITATION THE IMPLIED WARRANTIES OF 20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE REGENTS OF 21 * THE UNIVERSITY OF MICHIGAN SHALL NOT BE LIABLE FOR ANY DAMAGES, 22 * INCLUDING DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL 23 * DAMAGES, WITH RESPECT TO ANY CLAIM ARISING OUT OF OR IN CONNECTION 24 * WITH THE USE OF THE SOFTWARE, EVEN IF IT HAS BEEN OR IS HEREAFTER 25 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. 26 */ 27 28/* 29 * Copyright 1993 Hewlett-Packard Development Company, L.P. 30 * 31 * Permission is hereby granted, free of charge, to any person 32 * obtaining a copy of this software and associated documentation 33 * files (the "Software"), to deal in the Software without 34 * restriction, including without limitation the rights to use, copy, 35 * modify, merge, publish, distribute, sublicense, and/or sell copies 36 * of the Software, and to permit persons to whom the Software is 37 * furnished to do so, subject to the following conditions: 38 * 39 * The above copyright notice and this permission notice shall be 40 * included in all copies or substantial portions of the Software. 41 * 42 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 43 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 44 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 45 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 46 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 47 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 48 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 49 * SOFTWARE. 50 */ 51 52#include "dc21164FromGasSources.h" // DECchip 21164 specific definitions 53#include "ev5_defs.h" 54#include "fromHudsonOsf.h" // OSF/1 specific definitions 55#include "fromHudsonMacros.h" // Global macro definitions 56 57/* Jump to kernel 58 * args: 59 * Kernel address - a0 60 * PCBB - a1 61 * First free PFN - a3? 62 * 63 * Enable kseg addressing in ICSR 64 * Enable kseg addressing in MCSR 65 * Set VTBR -- Set to 1GB as per SRM, or maybe 8GB?? 66 * Set PCBB -- pass pointer in arg 67 * Set PTBR -- get it out of PCB 68 * Set KSP -- get it out of PCB 69 * 70 * Jump to kernel address 71 * 72 * Kernel args- 73 * s0 first free PFN 74 * s1 ptbr 75 * s2 argc 0 76 * s3 argv NULL 77 * s5 osf_param (sysconfigtab) NULL 78 */ 79 80 .global palJToKern 81 .text 3 82palJToKern: 83 ALIGN_BRANCH 84 85 ldq_p a0, 0(zero) 86 ldq_p a1, 8(zero) 87 ldq_p a3, 16(zero) 88 89 /* Point the Vptbr at 8GB */ 90 lda t0, 0x1(zero) 91 sll t0, 33, t0 92 93 mtpr t0, mVptBr // Load Mbox copy 94 mtpr t0, iVptBr // Load Ibox copy 95 STALL // don't dual issue the load with mtpr -pb 96 97 /* Turn on superpage mapping in the mbox and icsr */ 98 lda t0, (2<<MCSR_V_SP)(zero) // Get a '10' (binary) in MCSR<SP> 99 STALL // don't dual issue the load with mtpr -pb 100 mtpr t0, mcsr // Set the super page mode enable bit 101 STALL // don't dual issue the load with mtpr -pb 102 103 lda t0, 0(zero) 104 mtpr t0, dtbAsn 105 mtpr t0, itbAsn 106 107 LDLI (t1,0x20000000) 108 STALL // don't dual issue the load with mtpr -pb 109 mfpr t0, icsr // Enable superpage mapping 110 STALL // don't dual issue the load with mtpr -pb 111 bis t0, t1, t0 112 mtpr t0, icsr 113 114 STALL // Required stall to update chip ... 115 STALL 116 STALL 117 STALL 118 STALL 119 120 ldq_p s0, PCB_Q_PTBR(a1) 121 sll s0, VA_S_OFF, s0 // Shift PTBR into position 122 STALL // don't dual issue the load with mtpr -pb 123 mtpr s0, ptPtbr // PHYSICAL MBOX INST -> MT PT20 IN 0,1 124 STALL // don't dual issue the load with mtpr -pb 125 ldq_p sp, PCB_Q_KSP(a1) 126 127 mtpr a0, excAddr // Load the dispatch address. 128 STALL // don't dual issue the load with mtpr -pb 129 bis a3, zero, a0 // first free PFN 130 ldq_p a1, PCB_Q_PTBR(a1) // ptbr 131 ldq_p a2, 24(zero) // argc 132 ldq_p a3, 32(zero) // argv 133 ldq_p a4, 40(zero) // environ 134 lda a5, 0(zero) // osf_param 135 STALL // don't dual issue the load with mtpr -pb 136 mtpr zero, dtbIa // Flush all D-stream TB entries 137 mtpr zero, itbIa // Flush all I-stream TB entries 138 br zero, 2f 139 140 ALIGN_BLOCK 141 1422: NOP 143 mtpr zero, icFlush // Flush the icache. 144 NOP 145 NOP 146 147 NOP // Required NOPs ... 1-10 148 NOP 149 NOP 150 NOP 151 NOP 152 NOP 153 NOP 154 NOP 155 NOP 156 NOP 157 158 NOP // Required NOPs ... 11-20 159 NOP 160 NOP 161 NOP 162 NOP 163 NOP 164 NOP 165 NOP 166 NOP 167 NOP 168 169 NOP // Required NOPs ... 21-30 170 NOP 171 NOP 172 NOP 173 NOP 174 NOP 175 NOP 176 NOP 177 NOP 178 NOP 179 180 NOP // Required NOPs ... 31-40 181 NOP 182 NOP 183 NOP 184 NOP 185 NOP 186 NOP 187 NOP 188 NOP 189 NOP 190 191 NOP // Required NOPs ... 41-44 192 NOP 193 NOP 194 NOP 195 196 hw_rei_stall // Dispatch to kernel 197