paljtokern.S revision 8013:2dfcde2e9998
1/* 2 * Copyright (c) 2003, 2004 3 * The Regents of The University of Michigan 4 * All Rights Reserved 5 * 6 * This code is part of the M5 simulator, developed by Nathan Binkert, 7 * Erik Hallnor, Steve Raasch, and Steve Reinhardt, with contributions 8 * from Ron Dreslinski, Dave Greene, Lisa Hsu, Ali Saidi, and Andrew 9 * Schultz. 10 * 11 * Permission is granted to use, copy, create derivative works and 12 * redistribute this software and such derivative works for any purpose, 13 * so long as the copyright notice above, this grant of permission, and 14 * the disclaimer below appear in all copies made; and so long as the 15 * name of The University of Michigan is not used in any advertising or 16 * publicity pertaining to the use or distribution of this software 17 * without specific, written prior authorization. 18 * 19 * THIS SOFTWARE IS PROVIDED AS IS, WITHOUT REPRESENTATION FROM THE 20 * UNIVERSITY OF MICHIGAN AS TO ITS FITNESS FOR ANY PURPOSE, AND WITHOUT 21 * WARRANTY BY THE UNIVERSITY OF MICHIGAN OF ANY KIND, EITHER EXPRESS OR 22 * IMPLIED, INCLUDING WITHOUT LIMITATION THE IMPLIED WARRANTIES OF 23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE REGENTS OF 24 * THE UNIVERSITY OF MICHIGAN SHALL NOT BE LIABLE FOR ANY DAMAGES, 25 * INCLUDING DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL 26 * DAMAGES, WITH RESPECT TO ANY CLAIM ARISING OUT OF OR IN CONNECTION 27 * WITH THE USE OF THE SOFTWARE, EVEN IF IT HAS BEEN OR IS HEREAFTER 28 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. 29 */ 30 31/* 32 * Copyright 1993 Hewlett-Packard Development Company, L.P. 33 * 34 * Permission is hereby granted, free of charge, to any person 35 * obtaining a copy of this software and associated documentation 36 * files (the "Software"), to deal in the Software without 37 * restriction, including without limitation the rights to use, copy, 38 * modify, merge, publish, distribute, sublicense, and/or sell copies 39 * of the Software, and to permit persons to whom the Software is 40 * furnished to do so, subject to the following conditions: 41 * 42 * The above copyright notice and this permission notice shall be 43 * included in all copies or substantial portions of the Software. 44 * 45 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 46 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 47 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 48 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 49 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 50 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 51 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 52 * SOFTWARE. 53 */ 54 55#include "dc21164FromGasSources.h" // DECchip 21164 specific definitions 56#include "ev5_defs.h" 57#include "fromHudsonOsf.h" // OSF/1 specific definitions 58#include "fromHudsonMacros.h" // Global macro definitions 59 60/* Jump to kernel 61 * args: 62 * Kernel address - a0 63 * PCBB - a1 64 * First free PFN - a3? 65 * 66 * Enable kseg addressing in ICSR 67 * Enable kseg addressing in MCSR 68 * Set VTBR -- Set to 1GB as per SRM, or maybe 8GB?? 69 * Set PCBB -- pass pointer in arg 70 * Set PTBR -- get it out of PCB 71 * Set KSP -- get it out of PCB 72 * 73 * Jump to kernel address 74 * 75 * Kernel args- 76 * s0 first free PFN 77 * s1 ptbr 78 * s2 argc 0 79 * s3 argv NULL 80 * s5 osf_param (sysconfigtab) NULL 81 */ 82 83 .global palJToKern 84 .text 3 85palJToKern: 86 ALIGN_BRANCH 87 88 ldq_p a0, 0(zero) 89 ldq_p a1, 8(zero) 90 ldq_p a3, 16(zero) 91 92 /* Point the Vptbr at 8GB */ 93 lda t0, 0x1(zero) 94 sll t0, 33, t0 95 96 mtpr t0, mVptBr // Load Mbox copy 97 mtpr t0, iVptBr // Load Ibox copy 98 STALL // don't dual issue the load with mtpr -pb 99 100 /* Turn on superpage mapping in the mbox and icsr */ 101 lda t0, (2<<MCSR_V_SP)(zero) // Get a '10' (binary) in MCSR<SP> 102 STALL // don't dual issue the load with mtpr -pb 103 mtpr t0, mcsr // Set the super page mode enable bit 104 STALL // don't dual issue the load with mtpr -pb 105 106 lda t0, 0(zero) 107 mtpr t0, dtbAsn 108 mtpr t0, itbAsn 109 110 LDLI (t1,0x20000000) 111 STALL // don't dual issue the load with mtpr -pb 112 mfpr t0, icsr // Enable superpage mapping 113 STALL // don't dual issue the load with mtpr -pb 114 bis t0, t1, t0 115 mtpr t0, icsr 116 117 STALL // Required stall to update chip ... 118 STALL 119 STALL 120 STALL 121 STALL 122 123 ldq_p s0, PCB_Q_PTBR(a1) 124 sll s0, VA_S_OFF, s0 // Shift PTBR into position 125 STALL // don't dual issue the load with mtpr -pb 126 mtpr s0, ptPtbr // PHYSICAL MBOX INST -> MT PT20 IN 0,1 127 STALL // don't dual issue the load with mtpr -pb 128 ldq_p sp, PCB_Q_KSP(a1) 129 130 mtpr a0, excAddr // Load the dispatch address. 131 STALL // don't dual issue the load with mtpr -pb 132 bis a3, zero, a0 // first free PFN 133 ldq_p a1, PCB_Q_PTBR(a1) // ptbr 134 ldq_p a2, 24(zero) // argc 135 ldq_p a3, 32(zero) // argv 136 ldq_p a4, 40(zero) // environ 137 lda a5, 0(zero) // osf_param 138 STALL // don't dual issue the load with mtpr -pb 139 mtpr zero, dtbIa // Flush all D-stream TB entries 140 mtpr zero, itbIa // Flush all I-stream TB entries 141 br zero, 2f 142 143 ALIGN_BLOCK 144 1452: NOP 146 mtpr zero, icFlush // Flush the icache. 147 NOP 148 NOP 149 150 NOP // Required NOPs ... 1-10 151 NOP 152 NOP 153 NOP 154 NOP 155 NOP 156 NOP 157 NOP 158 NOP 159 NOP 160 161 NOP // Required NOPs ... 11-20 162 NOP 163 NOP 164 NOP 165 NOP 166 NOP 167 NOP 168 NOP 169 NOP 170 NOP 171 172 NOP // Required NOPs ... 21-30 173 NOP 174 NOP 175 NOP 176 NOP 177 NOP 178 NOP 179 NOP 180 NOP 181 NOP 182 183 NOP // Required NOPs ... 31-40 184 NOP 185 NOP 186 NOP 187 NOP 188 NOP 189 NOP 190 NOP 191 NOP 192 NOP 193 194 NOP // Required NOPs ... 41-44 195 NOP 196 NOP 197 NOP 198 199 hw_rei_stall // Dispatch to kernel 200