paljtokern.S revision 8012:2f71125bf413 
1/*
2Copyright (c) 2003, 2004
3The Regents of The University of Michigan
4All Rights Reserved
5
6This code is part of the M5 simulator, developed by Nathan Binkert,
7Erik Hallnor, Steve Raasch, and Steve Reinhardt, with contributions
8from Ron Dreslinski, Dave Greene, Lisa Hsu, Ali Saidi, and Andrew
9Schultz.
10
11Permission is granted to use, copy, create derivative works and
12redistribute this software and such derivative works for any purpose,
13so long as the copyright notice above, this grant of permission, and
14the disclaimer below appear in all copies made; and so long as the
15name of The University of Michigan is not used in any advertising or
16publicity pertaining to the use or distribution of this software
17without specific, written prior authorization.
18
19THIS SOFTWARE IS PROVIDED AS IS, WITHOUT REPRESENTATION FROM THE
20UNIVERSITY OF MICHIGAN AS TO ITS FITNESS FOR ANY PURPOSE, AND WITHOUT
21WARRANTY BY THE UNIVERSITY OF MICHIGAN OF ANY KIND, EITHER EXPRESS OR
22IMPLIED, INCLUDING WITHOUT LIMITATION THE IMPLIED WARRANTIES OF
23MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE REGENTS OF
24THE UNIVERSITY OF MICHIGAN SHALL NOT BE LIABLE FOR ANY DAMAGES,
25INCLUDING DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL
26DAMAGES, WITH RESPECT TO ANY CLAIM ARISING OUT OF OR IN CONNECTION
27WITH THE USE OF THE SOFTWARE, EVEN IF IT HAS BEEN OR IS HEREAFTER
28ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
29*/
30/*
31Copyright 1993 Hewlett-Packard Development Company, L.P.
32
33Permission is hereby granted, free of charge, to any person obtaining a copy of
34this software and associated documentation files (the "Software"), to deal in
35the Software without restriction, including without limitation the rights to
36use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
37of the Software, and to permit persons to whom the Software is furnished to do
38so, subject to the following conditions:
39
40The above copyright notice and this permission notice shall be included in all
41copies or substantial portions of the Software.
42
43THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
44IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
45FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
46AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
47LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
48OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
49SOFTWARE.
50*/
51#include "dc21164FromGasSources.h"	// DECchip 21164 specific definitions
52#include "ev5_defs.h"
53#include "fromHudsonOsf.h"	// OSF/1 specific definitions
54#include "fromHudsonMacros.h"	// Global macro definitions
55#include "ev5_impure.h"	// Scratch & logout area data structures
56#include "platform.h"	// Platform specific definitions
57
58        .global	palJToKern
59        .text	3
60palJToKern:
61/* Jump to kernel
62args:
63        Kernel address	- a0
64        PCBB		- a1
65        First free PFN	- a3?
66
67        Enable kseg addressing in ICSR
68        Enable kseg addressing in MCSR
69        Set VTBR -- Set to 1GB as per SRM, or maybe 8GB??
70        Set PCBB -- pass pointer in arg
71        Set PTBR -- get it out of PCB
72        Set KSP  -- get it out of PCB
73
74        Jump to kernel address
75
76        Kernel args-
77                s0 first free PFN
78                s1 ptbr
79                s2 argc 0
80                s3 argv NULL
81                s5 osf_param (sysconfigtab) NULL
82 */
83
84        ALIGN_BRANCH
85
86        ldq_p	a0, 0(zero)
87        ldq_p	a1, 8(zero)
88        ldq_p	a3, 16(zero)
89
90#ifdef undef
91        LDLI(t0,0x200000000)		// 8GB, like the Mikasa
92        LDLI(t0,0x40000000)		// 1GB, like the SRM
93        STALL			// don't dual issue the load with mtpr -pb
94#endif
95        /* Point the Vptbr at 8GB */
96        lda	t0, 0x1(zero)
97        sll	t0, 33, t0
98
99        mtpr	t0, mVptBr	// Load Mbox copy
100        mtpr	t0, iVptBr	// Load Ibox copy
101        STALL			// don't dual issue the load with mtpr -pb
102
103        /* Turn on superpage mapping in the mbox and icsr */
104        lda	t0, (2<<MCSR_V_SP)(zero) // Get a '10' (binary) in MCSR<SP>
105        STALL			// don't dual issue the load with mtpr -pb
106        mtpr	t0, mcsr		// Set the super page mode enable bit
107        STALL			// don't dual issue the load with mtpr -pb
108
109        lda	t0, 0(zero)
110        mtpr	t0, dtbAsn
111        mtpr	t0, itbAsn
112
113        LDLI	(t1,0x20000000)
114        STALL			// don't dual issue the load with mtpr -pb
115        mfpr	t0, icsr		// Enable superpage mapping
116        STALL			// don't dual issue the load with mtpr -pb
117        bis	t0, t1, t0
118        mtpr	t0, icsr
119
120        STALL                           // Required stall to update chip ...
121        STALL
122        STALL
123        STALL
124        STALL
125
126        ldq_p	s0, PCB_Q_PTBR(a1)
127        sll	s0, VA_S_OFF, s0	// Shift PTBR into position
128        STALL			// don't dual issue the load with mtpr -pb
129        mtpr	s0, ptPtbr		// PHYSICAL MBOX INST -> MT PT20 IN 0,1
130        STALL			// don't dual issue the load with mtpr -pb
131        ldq_p	sp, PCB_Q_KSP(a1)
132
133        mtpr	a0, excAddr		// Load the dispatch address.
134        STALL			// don't dual issue the load with mtpr -pb
135        bis	a3, zero, a0		// first free PFN
136        ldq_p	a1, PCB_Q_PTBR(a1)	// ptbr
137        ldq_p	a2, 24(zero)		// argc
138        ldq_p	a3, 32(zero)		// argv
139        ldq_p	a4, 40(zero)		// environ
140        lda	a5, 0(zero)		// osf_param
141        STALL			// don't dual issue the load with mtpr -pb
142        mtpr	zero, dtbIa		// Flush all D-stream TB entries
143        mtpr	zero, itbIa		// Flush all I-stream TB entries
144        br	zero, 2f
145
146        ALIGN_BLOCK
147
1482:	NOP
149        mtpr	zero, icFlush		// Flush the icache.
150        NOP
151        NOP
152
153        NOP				// Required NOPs ... 1-10
154        NOP
155        NOP
156        NOP
157        NOP
158        NOP
159        NOP
160        NOP
161        NOP
162        NOP
163
164        NOP                           // Required NOPs ... 11-20
165        NOP
166        NOP
167        NOP
168        NOP
169        NOP
170        NOP
171        NOP
172        NOP
173        NOP
174
175        NOP                           // Required NOPs ... 21-30
176        NOP
177        NOP
178        NOP
179        NOP
180        NOP
181        NOP
182        NOP
183        NOP
184        NOP
185
186        NOP                           // Required NOPs ... 31-40
187        NOP
188        NOP
189        NOP
190        NOP
191        NOP
192        NOP
193        NOP
194        NOP
195        NOP
196
197
198
199        NOP				// Required NOPs ... 41-44
200        NOP
201        NOP
202        NOP
203
204        hw_rei_stall				// Dispatch to kernel
205
206
207