dbmentry.S revision 8013:2dfcde2e9998 
1/*
2 * Copyright (c) 2003, 2004
3 * The Regents of The University of Michigan
4 * All Rights Reserved
5 *
6 * This code is part of the M5 simulator, developed by Nathan Binkert,
7 * Erik Hallnor, Steve Raasch, and Steve Reinhardt, with contributions
8 * from Ron Dreslinski, Dave Greene, Lisa Hsu, Ali Saidi, and Andrew
9 * Schultz.
10 *
11 * Permission is granted to use, copy, create derivative works and
12 * redistribute this software and such derivative works for any purpose,
13 * so long as the copyright notice above, this grant of permission, and
14 * the disclaimer below appear in all copies made; and so long as the
15 * name of The University of Michigan is not used in any advertising or
16 * publicity pertaining to the use or distribution of this software
17 * without specific, written prior authorization.
18 *
19 * THIS SOFTWARE IS PROVIDED AS IS, WITHOUT REPRESENTATION FROM THE
20 * UNIVERSITY OF MICHIGAN AS TO ITS FITNESS FOR ANY PURPOSE, AND WITHOUT
21 * WARRANTY BY THE UNIVERSITY OF MICHIGAN OF ANY KIND, EITHER EXPRESS OR
22 * IMPLIED, INCLUDING WITHOUT LIMITATION THE IMPLIED WARRANTIES OF
23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE REGENTS OF
24 * THE UNIVERSITY OF MICHIGAN SHALL NOT BE LIABLE FOR ANY DAMAGES,
25 * INCLUDING DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL
26 * DAMAGES, WITH RESPECT TO ANY CLAIM ARISING OUT OF OR IN CONNECTION
27 * WITH THE USE OF THE SOFTWARE, EVEN IF IT HAS BEEN OR IS HEREAFTER
28 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
29 */
30/*
31 * Copyright 1993 Hewlett-Packard Development Company, L.P.
32 *
33 * Permission is hereby granted, free of charge, to any person
34 * obtaining a copy of this software and associated documentation
35 * files (the "Software"), to deal in the Software without
36 * restriction, including without limitation the rights to use, copy,
37 * modify, merge, publish, distribute, sublicense, and/or sell copies
38 * of the Software, and to permit persons to whom the Software is
39 * furnished to do so, subject to the following conditions:
40 *
41 * The above copyright notice and this permission notice shall be
42 * included in all copies or substantial portions of the Software.
43 *
44 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
45 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
46 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
47 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
48 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
49 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
50 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
51 * SOFTWARE.
52 */
53
54/*
55 * Debug Monitor Entry code
56 */
57#include "fromHudsonOsf.h"
58
59        .text
60
61/* return address and padding to octaword align */
62#define STARTFRM 16
63
64        .globl  _start
65        .ent    _start, 0
66_start:
67_entry:
68        br      t0, 2f			# get the current PC
692:	ldgp    gp, 0(t0)               # init gp
70
71        /*
72         * SimOS. Stack pointer is start of a valid phys or KSEG page
73         */
74
75        bis	sp,sp,s0 /* save sp */
76
77slave:	lda	v0,(8*1024)(sp) /* end of page  */
78
79        subq	zero, 1, t0
80        sll	t0, 42, t0
81        bis	t0, v0, sp
82
83        lda     sp, -STARTFRM(sp)	# Create a stack frame
84        stq     ra, 0(sp)		# Place return address on the stack
85
86        .mask   0x84000000, -8
87        .frame  sp, STARTFRM, ra
88
89/*
90 *	Enable the Floating Point Unit
91 */
92        lda	a0, 1(zero)
93        call_pal PAL_WRFEN_ENTRY
94
95/*
96 *	Every good C program has a main()
97 */
98
99        beq	s0,master
100
101        call_pal PAL_WHAMI_ENTRY
102        bis	v0,v0,a0
103        jsr	ra, SlaveLoop
104master:
105        jsr	ra, main
106
107
108
109/*
110 *	The Debug Monitor should never return.
111 *	However, just incase...
112 */
113        ldgp	gp, 0(ra)
114        bsr	zero, _exit
115
116.end	_start
117
118
119
120        .globl  _exit
121        .ent    _exit, 0
122_exit:
123
124        ldq     ra, 0(sp)		# restore return address
125        lda	sp, STARTFRM(sp)	# prune back the stack
126        ret	zero, (ra)		# Back from whence we came
127.end	_exit
128
129                .globl	cServe
130        .ent	cServe 2
131cServe:
132        .option	O1
133        .frame	sp, 0, ra
134        call_pal PAL_CSERVE_ENTRY
135        ret	zero, (ra)
136        .end	cServe
137
138        .globl	wrfen
139        .ent	wrfen 2
140wrfen:
141        .option	O1
142        .frame	sp, 0, ra
143        call_pal PAL_WRFEN_ENTRY
144        ret	zero, (ra)
145        .end	wrfen
146        .globl	consoleCallback
147        .ent	consoleCallback 2
148consoleCallback:
149        br      t0, 2f			# get the current PC
1502:	ldgp    gp, 0(t0)               # init gp
151        lda     sp,-64(sp)
152        stq     ra,0(sp)
153        jsr     CallBackDispatcher
154        ldq     ra,0(sp)
155        lda     sp,64(sp)
156        ret     zero,(ra)
157        .end    consoleCallback
158
159
160        .globl	consoleFixup
161        .ent	consoleFixup 2
162consoleFixup:
163        br      t0, 2f			# get the current PC
1642:	ldgp    gp, 0(t0)               # init gp
165        lda     sp,-64(sp)
166        stq     ra,0(sp)
167        jsr     CallBackFixup
168        ldq     ra,0(sp)
169        lda     sp,64(sp)
170        ret     zero,(ra)
171        .end    consoleFixup
172
173
174
175        .globl	SpinLock
176        .ent	SpinLock 2
177SpinLock:
1781:
179        ldq_l	a1,0(a0)		# interlock complete lock state
180        subl	ra,3,v0			# get calling addr[31:0] + 1
181        blbs	a1,2f			# branch if lock is busy
182        stq_c	v0,0(a0)		# attempt to acquire lock
183        beq	v0,2f			# branch if lost atomicity
184        mb				# ensure memory coherence
185        ret	zero,(ra)		# return to caller (v0 is 1)
1862:
187        br	zero,1b
188        .end	SpinLock
189
190        .globl	loadContext
191        .ent	loadContext 2
192loadContext:
193        .option	O1
194        .frame	sp, 0, ra
195        call_pal PAL_SWPCTX_ENTRY
196        ret	zero, (ra)
197        .end	loadContext
198
199
200        .globl	SlaveSpin          # Very carefully spin wait
201        .ent	SlaveSpin 2        # and swap context without
202SlaveSpin:                         # using any stack space
203        .option	O1
204        .frame	sp, 0, ra
205        mov a0, t0                 # cpu number
206        mov a1, t1                 # cpu rpb pointer (virtual)
207        mov a2, t2                 # what to spin on
208
209test:   ldl  t3, 0(t2)
210        beq  t3, test
211        zapnot t1,0x1f,a0          # make rpb physical
212        call_pal PAL_SWPCTX_ENTRY  # switch to pcb
213        mov t0, a0                 # setup args for SlaveCmd
214        mov t1, a1
215        jsr SlaveCmd               # call SlaveCmd
216        ret	zero, (ra)         # Should never be reached
217        .end	SlaveSpin
218
219
220