dbmentry.S revision 8012:2f71125bf413 
1/*
2Copyright (c) 2003, 2004
3The Regents of The University of Michigan
4All Rights Reserved
5
6This code is part of the M5 simulator, developed by Nathan Binkert,
7Erik Hallnor, Steve Raasch, and Steve Reinhardt, with contributions
8from Ron Dreslinski, Dave Greene, Lisa Hsu, Ali Saidi, and Andrew
9Schultz.
10
11Permission is granted to use, copy, create derivative works and
12redistribute this software and such derivative works for any purpose,
13so long as the copyright notice above, this grant of permission, and
14the disclaimer below appear in all copies made; and so long as the
15name of The University of Michigan is not used in any advertising or
16publicity pertaining to the use or distribution of this software
17without specific, written prior authorization.
18
19THIS SOFTWARE IS PROVIDED AS IS, WITHOUT REPRESENTATION FROM THE
20UNIVERSITY OF MICHIGAN AS TO ITS FITNESS FOR ANY PURPOSE, AND WITHOUT
21WARRANTY BY THE UNIVERSITY OF MICHIGAN OF ANY KIND, EITHER EXPRESS OR
22IMPLIED, INCLUDING WITHOUT LIMITATION THE IMPLIED WARRANTIES OF
23MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE REGENTS OF
24THE UNIVERSITY OF MICHIGAN SHALL NOT BE LIABLE FOR ANY DAMAGES,
25INCLUDING DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL
26DAMAGES, WITH RESPECT TO ANY CLAIM ARISING OUT OF OR IN CONNECTION
27WITH THE USE OF THE SOFTWARE, EVEN IF IT HAS BEEN OR IS HEREAFTER
28ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
29*/
30/*
31Copyright 1993 Hewlett-Packard Development Company, L.P.
32
33Permission is hereby granted, free of charge, to any person obtaining a copy of
34this software and associated documentation files (the "Software"), to deal in
35the Software without restriction, including without limitation the rights to
36use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
37of the Software, and to permit persons to whom the Software is furnished to do
38so, subject to the following conditions:
39
40The above copyright notice and this permission notice shall be included in all
41copies or substantial portions of the Software.
42
43THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
44IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
45FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
46AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
47LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
48OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
49SOFTWARE.
50*/
51
52/* taken from ebfw/rom/dbmentry.s */
53
54#define EB164
55/*#ifndef LINT
56.data
57.asciiz "$Id: dbmentry.s,v 1.1.1.1 1997/10/30 23:27:12 verghese Exp $"
58.text
59#endif
60*/
61/*
62 * Debug Monitor Entry code
63 */
64
65#ifndef MAKEDEPEND
66#include "ev5_impure.h"
67#include "cserve.h"
68#include "fromHudsonOsf.h"
69#endif
70
71//#include "paldefs.h"
72#include "regdefs.h"
73#include "eb164.h"
74//#include "ledcodes.h"
75
76        .text
77
78/* return address and padding to octaword align */
79#define STARTFRM 16
80
81        .globl  __start
82        .ent    __start, 0
83__start:
84_entry:
85        br      t0, 2f			# get the current PC
862:	ldgp    gp, 0(t0)               # init gp
87
88
89#ifdef original_xxm
90        lda	a2, CSERVE_K_RD_IMPURE
91        call_pal PAL_CSERVE_ENTRY
92        lda	v0,  CNS_Q_BASE(v0)
93
94        # Add KSEG offset to the impure area
95        subq	zero, 1, t0
96        sll	t0, 42, t0
97        addq	t0, v0, v0
98
99        lda	t0, CNS_Q_SIGNATURE(v0)
100        bic 	t0, 0x07, t0		# Clear bottom 3 bits to avoid
101                                        # allignment errors if the
102                                        # impure area is total rubbish
103        ldq	t0, 0x00(t0)
104        srl	t0, 16, t0		# Shift signature into bottom 16 bits.
105        lda	t6, 0xDECB(zero)	# Load the expected valid signature.
106        zap	t6, 0xFC, t6		# Clear the upper bits.
107        cmpeq	t0, t6, t0		# Is this a valid signature?
108        beq	t0, 1f			# Not valid, don't trust input params.
109
110/*
111 *	Init the stack at the first 8K boundary
112 *	below the top of memory.
113 */
114        lda	t0, CNS_Q_MEM_SIZE(v0)
115        ldq	t0, 0x00(t0)		# Load memory size.
116        subq	t0, 1, t0		# Last address in memory
117        srl	t0, 13, t0		# Align to first 8KB boundary
118        sll	t0, 13, sp		# below the top of memory.
119        br	zero, 2f
120
121/*
122 *	If memory size was not passed in via the
123 *	PALcode impure data use the system specific
124 *	MINIMUM_SYSTEM_MEMORY definition.
125 */
1261:
127        lda	sp, (MINIMUM_SYSTEM_MEMORY&0xffff)(zero)
128        ldah	sp, ((MINIMUM_SYSTEM_MEMORY+0x8000)>>16)(sp)
129        lda	t0, (8*1024)(zero)	# Allow for 8KB guard page.
130        subq	sp, t0, sp
131
1322:
133
134#endif /* original_xxm */
135
136
137        /*
138         * SimOS. Stack pointer is start of a valid phys or KSEG page
139         */
140
141        bis	sp,sp,s0 /* save sp */
142
143slave:	lda	v0,(8*1024)(sp) /* end of page  */
144
145        subq	zero, 1, t0
146        sll	t0, 42, t0
147        bis	t0, v0, sp
148
149#ifdef original_xxm
150        # Add KSEG offset to the stack pointer
151        subq	zero, 1, t0
152        sll	t0, 42, t0
153        addq	t0, sp, sp
154#endif
155
156        lda     sp, -STARTFRM(sp)	# Create a stack frame
157        stq     ra, 0(sp)		# Place return address on the stack
158
159        .mask   0x84000000, -8
160        .frame  sp, STARTFRM, ra
161
162/*
163 *	Enable the Floating Point Unit
164 */
165        lda	a0, 1(zero)
166        call_pal PAL_WRFEN_ENTRY
167
168/*
169 *	Every good C program has a main()
170 */
171
172        beq	s0,master
173
174        call_pal PAL_WHAMI_ENTRY
175        bis	v0,v0,a0
176        jsr	ra, SlaveLoop
177master:
178        jsr	ra, main
179
180
181
182/*
183 *	The Debug Monitor should never return.
184 *	However, just incase...
185 */
186        ldgp	gp, 0(ra)
187        bsr	zero, _exit
188
189.end	__start
190
191
192
193        .globl  _exit
194        .ent    _exit, 0
195_exit:
196
197        ldq     ra, 0(sp)		# restore return address
198        lda	sp, STARTFRM(sp)	# prune back the stack
199        ret	zero, (ra)		# Back from whence we came
200.end	_exit
201
202                .globl	cServe
203        .ent	cServe 2
204cServe:
205        .option	O1
206        .frame	sp, 0, ra
207        call_pal PAL_CSERVE_ENTRY
208        ret	zero, (ra)
209        .end	cServe
210
211        .globl	wrfen
212        .ent	wrfen 2
213wrfen:
214        .option	O1
215        .frame	sp, 0, ra
216        call_pal PAL_WRFEN_ENTRY
217        ret	zero, (ra)
218        .end	wrfen
219        .globl	consoleCallback
220        .ent	consoleCallback 2
221consoleCallback:
222        br      t0, 2f			# get the current PC
2232:	ldgp    gp, 0(t0)               # init gp
224        lda     sp,-64(sp)
225        stq     ra,0(sp)
226        jsr     CallBackDispatcher
227        ldq     ra,0(sp)
228        lda     sp,64(sp)
229        ret     zero,(ra)
230        .end    consoleCallback
231
232
233        .globl	consoleFixup
234        .ent	consoleFixup 2
235consoleFixup:
236        br      t0, 2f			# get the current PC
2372:	ldgp    gp, 0(t0)               # init gp
238        lda     sp,-64(sp)
239        stq     ra,0(sp)
240        jsr     CallBackFixup
241        ldq     ra,0(sp)
242        lda     sp,64(sp)
243        ret     zero,(ra)
244        .end    consoleFixup
245
246
247
248        .globl	SpinLock
249        .ent	SpinLock 2
250SpinLock:
2511:
252        ldq_l	a1,0(a0)		# interlock complete lock state
253        subl	ra,3,v0			# get calling addr[31:0] + 1
254        blbs	a1,2f			# branch if lock is busy
255        stq_c	v0,0(a0)		# attempt to acquire lock
256        beq	v0,2f			# branch if lost atomicity
257        mb				# ensure memory coherence
258        ret	zero,(ra)		# return to caller (v0 is 1)
2592:
260        br	zero,1b
261        .end	SpinLock
262
263        .globl	loadContext
264        .ent	loadContext 2
265loadContext:
266        .option	O1
267        .frame	sp, 0, ra
268        call_pal PAL_SWPCTX_ENTRY
269        ret	zero, (ra)
270        .end	loadContext
271
272
273        .globl	SlaveSpin          # Very carefully spin wait
274        .ent	SlaveSpin 2        # and swap context without
275SlaveSpin:                         # using any stack space
276        .option	O1
277        .frame	sp, 0, ra
278        mov a0, t0                 # cpu number
279        mov a1, t1                 # cpu rpb pointer (virtual)
280        mov a2, t2                 # what to spin on
281
282test:   ldl  t3, 0(t2)
283        beq  t3, test
284        zapnot t1,0x1f,a0          # make rpb physical
285        call_pal PAL_SWPCTX_ENTRY  # switch to pcb
286        mov t0, a0                 # setup args for SlaveCmd
287        mov t1, a1
288        jsr SlaveCmd               # call SlaveCmd
289        ret	zero, (ra)         # Should never be reached
290        .end	SlaveSpin
291
292
293