test01.cpp revision 12855:588919e0e4aa 
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20/*****************************************************************************
21
22  test01.cpp -- Test sc_vector
23
24  Original Author: Philipp A. Hartmann, OFFIS, 2010-01-10
25
26 *****************************************************************************/
27
28/*****************************************************************************
29
30  MODIFICATION LOG - modifiers, enter your name, affiliation, date and
31  changes you are making here.
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33      Name, Affiliation, Date:
34  Description of Modification:
35
36 *****************************************************************************/
37
38#include "systemc.h"
39
40#include "sysc/utils/sc_vector.h"
41using sc_core::sc_vector;
42
43SC_MODULE( sub_module )
44{
45  sc_in<bool> in;
46  SC_CTOR(sub_module) {}
47};
48
49SC_MODULE( module )
50{
51  // vector of sub-modules
52  sc_vector< sub_module > m_sub_vec;
53
54  // vector of ports
55  sc_vector< sc_in<bool> > in_vec;
56
57  module( sc_core::sc_module_name, unsigned n_sub )
58    : m_sub_vec( "sub_modules", n_sub ) // set name prefix, and create sub-modules
59    // , in_vec()                       // use default constructor
60    // , in_vec( "in_vec" )             // set name prefix
61  {
62    // delayed initialisation of port vector
63    // here with default prefix sc_core::sc_gen_unique_name("vector")
64    in_vec.init( n_sub );
65
66    // bind ports of sub-modules -- sc_assemble_vector
67    sc_assemble_vector( m_sub_vec, &sub_module::in ).bind( in_vec );
68  }
69};
70
71int sc_main(int , char* [])
72{
73  module m("dut", 4);
74
75  std::vector<sc_object*> children = m.get_child_objects();
76
77  for (size_t i=0; i<children.size(); ++i )
78    cout << children[i]->name() << " - "
79         << children[i]->kind()
80         << endl;
81
82  cout << "Program completed" << endl;
83  return 0;
84}
85