1/***************************************************************************** 2 3 Licensed to Accellera Systems Initiative Inc. (Accellera) under one or 4 more contributor license agreements. See the NOTICE file distributed 5 with this work for additional information regarding copyright ownership. 6 Accellera licenses this file to you under the Apache License, Version 2.0 7 (the "License"); you may not use this file except in compliance with the 8 License. You may obtain a copy of the License at 9 10 http://www.apache.org/licenses/LICENSE-2.0 11 12 Unless required by applicable law or agreed to in writing, software 13 distributed under the License is distributed on an "AS IS" BASIS, 14 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or 15 implied. See the License for the specific language governing 16 permissions and limitations under the License. 17 18 *****************************************************************************/ 19 20/***************************************************************************** 21 22 disaproc2.cpp -- 23 24 Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 25 26 *****************************************************************************/ 27 28/***************************************************************************** 29 30 MODIFICATION LOG - modifiers, enter your name, affiliation, date and 31 changes you are making here. 32 33 Name, Affiliation, Date: 34 Description of Modification: 35 36 *****************************************************************************/ 37 38#include "systemc.h" 39 40typedef sc_signal<sc_bv<32> > sc_signal_bool_vector; 41 42int val1[17] = { 34329, 32492, 1034, 12000, 102, 12981, 1902, 19409, 43 10029, 2149, 12030, 20099, 90, 10009, 9345, 57483, 44 10903 }; 45 46int val2[19] = { 239, 923, 1240, 129, 191, 101, 1010, 190, 47 19820, 2349, 24039, 34728, 5745, 78234, 17838, 37482, 48 17498, 1347, 3721 }; 49 50SC_MODULE( aproc1 ) 51{ 52 SC_HAS_PROCESS( aproc1 ); 53 54 const sc_signal_bool_vector& a; 55 const sc_signal_bool_vector& b; 56 sc_signal_bool_vector& c; 57 58 aproc1( sc_module_name NAME, 59 60 const sc_signal_bool_vector& A, 61 const sc_signal_bool_vector& B, 62 sc_signal_bool_vector& C ) 63 : a(A), b(B), c(C) 64 { 65 SC_THREAD( entry ); 66 sensitive << a << b; 67 } 68 void entry(); 69}; 70 71void 72aproc1::entry() 73{ 74 wait(); 75 wait(); 76 c = a.read().to_int() + b.read().to_int(); 77 cout << "c is (a + b)" << endl; 78 wait(); 79 c = a.read().to_int() - b.read().to_int(); 80 cout << "c is (a - b)" << endl; 81 wait(); 82 cout << name() << " is exiting." << endl; 83} 84 85 86SC_MODULE( aproc2 ) 87{ 88 SC_HAS_PROCESS( aproc2 ); 89 90 const sc_signal_bool_vector& a; 91 const sc_signal_bool_vector& b; 92 sc_signal_bool_vector& d; 93 94 aproc2( sc_module_name NAME, 95 96 const sc_signal_bool_vector& A, 97 const sc_signal_bool_vector& B, 98 sc_signal_bool_vector& D ) 99 : a(A), b(B), d(D) 100 { 101 SC_THREAD( entry ); 102 sensitive << a << b; 103 } 104 void entry(); 105}; 106 107void 108aproc2::entry() 109{ 110 wait(); 111 int loops = 0; 112 while (true) { 113 wait(); 114 d = a.read().to_int() * b.read().to_int(); 115 cout << "d is (a * b)" << endl; 116 wait(); 117 if (b.read().to_int() == 0) { 118 d = a.read().to_int() / (b.read().to_int() + 1); 119 cout << "d is (a / (b + 1))" << endl; 120 } else { 121 d = a.read().to_int() / b.read().to_int(); 122 cout << "d is (a / b)" << endl; 123 } 124 if (loops < 1) { 125 // for (int i = 0; i < a.length(); ++i) { 126 // sc_assert( a[i].sensitive_aprocs_neg.size() == 2 ); 127 // sc_assert( a[i].sensitive_aprocs.size() == 2 ); 128 // } 129 } 130 if (loops > 5) { 131 // for (int i = 0; i < a.length(); ++i) { 132 // /* By this time aproc1 should have died. */ 133 // sc_assert( a[i].sensitive_aprocs_neg.size() == 1 ); 134 // sc_assert( a[i].sensitive_aprocs.size() == 1 ); 135 // } 136 } 137 loops++; 138 } 139} 140 141SC_MODULE( sync1 ) 142{ 143 SC_HAS_PROCESS( sync1 ); 144 145 sc_in_clk clk; 146 147 sc_signal_bool_vector& a; 148 sc_signal_bool_vector& b; 149 const sc_signal_bool_vector& c; 150 const sc_signal_bool_vector& d; 151 152 int count; 153 sync1( sc_module_name NAME, 154 sc_clock& CLK, 155 sc_signal_bool_vector& A, 156 sc_signal_bool_vector& B, 157 const sc_signal_bool_vector& C, 158 const sc_signal_bool_vector& D ) 159 : 160 a(A), b(B), c(C), d(D) 161 162 { 163 clk(CLK); 164 SC_CTHREAD( entry, clk.pos() ); 165 count = 0; 166 } 167 void entry(); 168}; 169 170void 171sync1::entry() 172{ 173 while (true) { 174 a = (val1[count % (sizeof(val1)/sizeof(val1[0]))]); 175 b = (val2[count % (sizeof(val2)/sizeof(val2[0]))]); 176 count++; 177 wait(); 178 cout << " a = " << a.read().to_int(); 179 cout << " b = " << b.read().to_int(); 180 cout << " c = " << c.read().to_int(); 181 cout << " d = " << d.read().to_int() << endl; 182 } 183} 184 185 186 187int 188sc_main(int argc, char** argv) 189{ 190 sc_clock clk("clk"); 191 sc_signal_bool_vector a("a"); 192 sc_signal_bool_vector b("b"); 193 sc_signal_bool_vector c("c"); 194 sc_signal_bool_vector d("d"); 195 196 a = 0; 197 b = 0; 198 c = 0; 199 d = 0; 200 201 aproc1 p1("p1", a, b, c); 202 aproc2 p2("p2", a, b, d); 203 sync1 s1("s1", clk, a, b, c, d); 204 205 sc_start(2000, SC_NS); 206 return 0; 207} 208