1/***************************************************************************** 2 3 Licensed to Accellera Systems Initiative Inc. (Accellera) under one or 4 more contributor license agreements. See the NOTICE file distributed 5 with this work for additional information regarding copyright ownership. 6 Accellera licenses this file to you under the Apache License, Version 2.0 7 (the "License"); you may not use this file except in compliance with the 8 License. You may obtain a copy of the License at 9 10 http://www.apache.org/licenses/LICENSE-2.0 11 12 Unless required by applicable law or agreed to in writing, software 13 distributed under the License is distributed on an "AS IS" BASIS, 14 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or 15 implied. See the License for the specific language governing 16 permissions and limitations under the License. 17 18 *****************************************************************************/ 19 20/***************************************************************************** 21 22 test15.cpp -- 23 24 Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 25 Martin Janssen, Synopsys, Inc., 2002-02-15 26 27 *****************************************************************************/ 28 29/***************************************************************************** 30 31 MODIFICATION LOG - modifiers, enter your name, affiliation, date and 32 changes you are making here. 33 34 Name, Affiliation, Date: 35 Description of Modification: 36 37 *****************************************************************************/ 38 39// test of sc_prim_channel::wait(double, sc_time_unit, sc_event_and_list&) 40 41#include <systemc.h> 42 43//write and read interfaces 44class write_if : virtual public 45sc_interface 46 { 47 public: 48 virtual void write() = 0; 49}; 50 51class read_if : virtual public 52sc_interface 53{ 54 public: 55 virtual void read( ) = 0; 56}; 57 58// channel implements write_if and read_if interfaces 59class channel : 60 public sc_channel, 61 public write_if, 62 public read_if 63{ 64 65 public : 66 67 //constructor 68 channel(sc_module_name name):sc_channel(name) , data(0) 69 { } 70 71 //write to channel 72 void write(){ 73 int i = 0; 74 75 while(1){ 76 wait(10, SC_NS); 77 data = i; 78 cout <<"simulation time" << ":" << sc_time_stamp()<<" "; 79 cout<<"writing "<< data <<" to channel" << endl; 80 81 if(i < 3){ 82 write_event_1.notify(20, SC_NS); 83 } 84 else if(3 <= i && i < 6) { 85 write_event_2.notify(5, SC_NS); 86 } 87 else{ 88 write_event_2.notify(5, SC_NS); 89 write_event_1.notify(5, SC_NS); 90 } 91 i++; 92 } 93 } 94 //read from channel 95 void read( ){ 96 int j; 97 98 while(1){ 99 wait(10, SC_NS, write_event_1 & write_event_2); 100 j = data; 101 cout <<"simulation time" << ":" << sc_time_stamp(); 102 cout<<" reading "<<j<<" from channel" << endl; 103 } 104 } 105 106 private: 107 int data; 108 sc_event write_event_1, write_event_2; 109 110}; 111 112//source module 113SC_MODULE(mod_a) 114{ 115 sc_port<write_if> out; 116 117 void write( ) 118 { 119 out->write(); 120 } 121 122 SC_CTOR( mod_a ){ 123 124 SC_THREAD(write); 125 } 126}; 127 128//sink module 129SC_MODULE(mod_b) 130{ 131 sc_port<read_if> input; 132 int i; 133 134 void read( ) 135 { 136 input->read(); 137 } 138 139 SC_CTOR( mod_b ){ 140 141 SC_THREAD(read); 142 } 143}; 144 145 146int sc_main(int, char*[] ) 147{ 148 channel a("a"); 149 mod_a modul_a("modul_a"); 150 mod_b modul_b("modul_b"); 151 modul_a.out(a); 152 modul_b.input(a); 153 154 sc_start(120, SC_NS); 155 return 0; 156} 157