system.cc revision 9524
12689Sktlim@umich.edu/* 28703Sandreas.hansson@arm.com * Copyright (c) 2011-2012 ARM Limited 38666SPrakash.Ramrakhyani@arm.com * All rights reserved 48666SPrakash.Ramrakhyani@arm.com * 58666SPrakash.Ramrakhyani@arm.com * The license below extends only to copyright in the software and shall 68666SPrakash.Ramrakhyani@arm.com * not be construed as granting a license to any other intellectual 78666SPrakash.Ramrakhyani@arm.com * property including but not limited to intellectual property relating 88666SPrakash.Ramrakhyani@arm.com * to a hardware implementation of the functionality of the software 98666SPrakash.Ramrakhyani@arm.com * licensed hereunder. You may use the software subject to the license 108666SPrakash.Ramrakhyani@arm.com * terms below provided that you ensure that this notice is replicated 118666SPrakash.Ramrakhyani@arm.com * unmodified and in its entirety in all distributions of the software, 128666SPrakash.Ramrakhyani@arm.com * modified or unmodified, in source code or in binary form. 138666SPrakash.Ramrakhyani@arm.com * 142689Sktlim@umich.edu * Copyright (c) 2003-2006 The Regents of The University of Michigan 157897Shestness@cs.utexas.edu * Copyright (c) 2011 Regents of the University of California 162689Sktlim@umich.edu * All rights reserved. 172689Sktlim@umich.edu * 182689Sktlim@umich.edu * Redistribution and use in source and binary forms, with or without 192689Sktlim@umich.edu * modification, are permitted provided that the following conditions are 202689Sktlim@umich.edu * met: redistributions of source code must retain the above copyright 212689Sktlim@umich.edu * notice, this list of conditions and the following disclaimer; 222689Sktlim@umich.edu * redistributions in binary form must reproduce the above copyright 232689Sktlim@umich.edu * notice, this list of conditions and the following disclaimer in the 242689Sktlim@umich.edu * documentation and/or other materials provided with the distribution; 252689Sktlim@umich.edu * neither the name of the copyright holders nor the names of its 262689Sktlim@umich.edu * contributors may be used to endorse or promote products derived from 272689Sktlim@umich.edu * this software without specific prior written permission. 282689Sktlim@umich.edu * 292689Sktlim@umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 302689Sktlim@umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 312689Sktlim@umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 322689Sktlim@umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 332689Sktlim@umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 342689Sktlim@umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 352689Sktlim@umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 362689Sktlim@umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 372689Sktlim@umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 382689Sktlim@umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 392689Sktlim@umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 402689Sktlim@umich.edu * 412689Sktlim@umich.edu * Authors: Steve Reinhardt 422689Sktlim@umich.edu * Lisa Hsu 432689Sktlim@umich.edu * Nathan Binkert 442689Sktlim@umich.edu * Ali Saidi 457897Shestness@cs.utexas.edu * Rick Strong 462689Sktlim@umich.edu */ 472689Sktlim@umich.edu 482521SN/A#include "arch/isa_traits.hh" 493960Sgblack@eecs.umich.edu#include "arch/remote_gdb.hh" 504194Ssaidi@eecs.umich.edu#include "arch/utility.hh" 518769Sgblack@eecs.umich.edu#include "arch/vtophys.hh" 521070SN/A#include "base/loader/object_file.hh" 531070SN/A#include "base/loader/symtab.hh" 549142Ssteve.reinhardt@amd.com#include "base/str.hh" 552521SN/A#include "base/trace.hh" 566658Snate@binkert.org#include "config/the_isa.hh" 578229Snate@binkert.org#include "cpu/thread_context.hh" 588232Snate@binkert.org#include "debug/Loader.hh" 598666SPrakash.Ramrakhyani@arm.com#include "debug/WorkItems.hh" 608769Sgblack@eecs.umich.edu#include "kern/kernel_stats.hh" 619293Sandreas.hansson@arm.com#include "mem/abstract_mem.hh" 622522SN/A#include "mem/physical.hh" 638769Sgblack@eecs.umich.edu#include "params/System.hh" 642037SN/A#include "sim/byteswap.hh" 658229Snate@binkert.org#include "sim/debug.hh" 668769Sgblack@eecs.umich.edu#include "sim/full_system.hh" 6756SN/A#include "sim/system.hh" 686658Snate@binkert.org 692SN/Ausing namespace std; 702107SN/Ausing namespace TheISA; 712SN/A 722SN/Avector<System *> System::systemList; 732SN/A 742SN/Aint System::numSystemsRunning = 0; 752SN/A 761070SN/ASystem::System(Params *p) 778703Sandreas.hansson@arm.com : MemObject(p), _systemPort("system_port", this), 788703Sandreas.hansson@arm.com _numContexts(0), 798826Snilay@cs.wisc.edu pagePtr(0), 802521SN/A init_param(p->init_param), 818852Sandreas.hansson@arm.com physProxy(_systemPort), 828852Sandreas.hansson@arm.com virtProxy(_systemPort), 837580SAli.Saidi@arm.com loadAddrMask(p->load_addr_mask), 847770SAli.Saidi@ARM.com nextPID(0), 859293Sandreas.hansson@arm.com physmem(name() + ".physmem", p->memories), 867914SBrad.Beckmann@amd.com memoryMode(p->mem_mode), 877914SBrad.Beckmann@amd.com workItemsBegin(0), 887914SBrad.Beckmann@amd.com workItemsEnd(0), 898666SPrakash.Ramrakhyani@arm.com numWorkIds(p->num_work_ids), 907914SBrad.Beckmann@amd.com _params(p), 918666SPrakash.Ramrakhyani@arm.com totalNumInsts(0), 927897Shestness@cs.utexas.edu instEventQueue("system instruction-based event queue") 932SN/A{ 941070SN/A // add self to global system list 951070SN/A systemList.push_back(this); 961070SN/A 978769Sgblack@eecs.umich.edu if (FullSystem) { 988769Sgblack@eecs.umich.edu kernelSymtab = new SymbolTable; 998769Sgblack@eecs.umich.edu if (!debugSymbolTable) 1008769Sgblack@eecs.umich.edu debugSymbolTable = new SymbolTable; 1018666SPrakash.Ramrakhyani@arm.com } 1028832SAli.Saidi@ARM.com 1038832SAli.Saidi@ARM.com // Get the generic system master IDs 1048832SAli.Saidi@ARM.com MasterID tmp_id M5_VAR_USED; 1058832SAli.Saidi@ARM.com tmp_id = getMasterId("writebacks"); 1068832SAli.Saidi@ARM.com assert(tmp_id == Request::wbMasterId); 1078832SAli.Saidi@ARM.com tmp_id = getMasterId("functional"); 1088832SAli.Saidi@ARM.com assert(tmp_id == Request::funcMasterId); 1098832SAli.Saidi@ARM.com tmp_id = getMasterId("interrupt"); 1108832SAli.Saidi@ARM.com assert(tmp_id == Request::intMasterId); 1118832SAli.Saidi@ARM.com 1128885SAli.Saidi@ARM.com if (FullSystem) { 1138885SAli.Saidi@ARM.com if (params()->kernel == "") { 1148885SAli.Saidi@ARM.com inform("No kernel set for full system simulation. " 1159147Snilay@cs.wisc.edu "Assuming you know what you're doing\n"); 1169147Snilay@cs.wisc.edu 1179147Snilay@cs.wisc.edu kernel = NULL; 1188885SAli.Saidi@ARM.com } else { 1198885SAli.Saidi@ARM.com // Get the kernel code 1208885SAli.Saidi@ARM.com kernel = createObjectFile(params()->kernel); 1218885SAli.Saidi@ARM.com inform("kernel located at: %s", params()->kernel); 1228885SAli.Saidi@ARM.com 1238885SAli.Saidi@ARM.com if (kernel == NULL) 1248885SAli.Saidi@ARM.com fatal("Could not load kernel file %s", params()->kernel); 1258885SAli.Saidi@ARM.com 1268885SAli.Saidi@ARM.com // setup entry points 1278885SAli.Saidi@ARM.com kernelStart = kernel->textBase(); 1288885SAli.Saidi@ARM.com kernelEnd = kernel->bssBase() + kernel->bssSize(); 1298885SAli.Saidi@ARM.com kernelEntry = kernel->entryPoint(); 1308885SAli.Saidi@ARM.com 1318885SAli.Saidi@ARM.com // load symbols 1328885SAli.Saidi@ARM.com if (!kernel->loadGlobalSymbols(kernelSymtab)) 1338885SAli.Saidi@ARM.com fatal("could not load kernel symbols\n"); 1348885SAli.Saidi@ARM.com 1358885SAli.Saidi@ARM.com if (!kernel->loadLocalSymbols(kernelSymtab)) 1368885SAli.Saidi@ARM.com fatal("could not load kernel local symbols\n"); 1378885SAli.Saidi@ARM.com 1388885SAli.Saidi@ARM.com if (!kernel->loadGlobalSymbols(debugSymbolTable)) 1398885SAli.Saidi@ARM.com fatal("could not load kernel symbols\n"); 1408885SAli.Saidi@ARM.com 1418885SAli.Saidi@ARM.com if (!kernel->loadLocalSymbols(debugSymbolTable)) 1428885SAli.Saidi@ARM.com fatal("could not load kernel local symbols\n"); 1438885SAli.Saidi@ARM.com 1448885SAli.Saidi@ARM.com // Loading only needs to happen once and after memory system is 1458885SAli.Saidi@ARM.com // connected so it will happen in initState() 1468885SAli.Saidi@ARM.com } 1478885SAli.Saidi@ARM.com } 1488885SAli.Saidi@ARM.com 1498885SAli.Saidi@ARM.com // increment the number of running systms 1508885SAli.Saidi@ARM.com numSystemsRunning++; 1518885SAli.Saidi@ARM.com 1529053Sdam.sunwoo@arm.com // Set back pointers to the system in all memories 1539053Sdam.sunwoo@arm.com for (int x = 0; x < params()->memories.size(); x++) 1549053Sdam.sunwoo@arm.com params()->memories[x]->system(this); 1552SN/A} 1562SN/A 1572SN/ASystem::~System() 1582SN/A{ 1591070SN/A delete kernelSymtab; 1601070SN/A delete kernel; 1618666SPrakash.Ramrakhyani@arm.com 1628666SPrakash.Ramrakhyani@arm.com for (uint32_t j = 0; j < numWorkIds; j++) 1638666SPrakash.Ramrakhyani@arm.com delete workItemStats[j]; 1642SN/A} 1652SN/A 1668706Sandreas.hansson@arm.comvoid 1678706Sandreas.hansson@arm.comSystem::init() 1688706Sandreas.hansson@arm.com{ 1698706Sandreas.hansson@arm.com // check that the system port is connected 1708706Sandreas.hansson@arm.com if (!_systemPort.isConnected()) 1718706Sandreas.hansson@arm.com panic("System port on %s is not connected.\n", name()); 1728706Sandreas.hansson@arm.com} 1738706Sandreas.hansson@arm.com 1749294Sandreas.hansson@arm.comBaseMasterPort& 1759294Sandreas.hansson@arm.comSystem::getMasterPort(const std::string &if_name, PortID idx) 1768703Sandreas.hansson@arm.com{ 1778703Sandreas.hansson@arm.com // no need to distinguish at the moment (besides checking) 1788922Swilliam.wang@arm.com return _systemPort; 1798703Sandreas.hansson@arm.com} 1808703Sandreas.hansson@arm.com 1812901Ssaidi@eecs.umich.eduvoid 1824762Snate@binkert.orgSystem::setMemoryMode(Enums::MemoryMode mode) 1832901Ssaidi@eecs.umich.edu{ 1849342SAndreas.Sandberg@arm.com assert(getDrainState() == Drainable::Drained); 1852901Ssaidi@eecs.umich.edu memoryMode = mode; 1862901Ssaidi@eecs.umich.edu} 1872901Ssaidi@eecs.umich.edu 1883960Sgblack@eecs.umich.edubool System::breakpoint() 1893960Sgblack@eecs.umich.edu{ 1904095Sbinkertn@umich.edu if (remoteGDB.size()) 1914095Sbinkertn@umich.edu return remoteGDB[0]->breakpoint(); 1924095Sbinkertn@umich.edu return false; 1933960Sgblack@eecs.umich.edu} 1943960Sgblack@eecs.umich.edu 1957445Ssteve.reinhardt@amd.com/** 1967445Ssteve.reinhardt@amd.com * Setting rgdb_wait to a positive integer waits for a remote debugger to 1977445Ssteve.reinhardt@amd.com * connect to that context ID before continuing. This should really 1987445Ssteve.reinhardt@amd.com be a parameter on the CPU object or something... 1997445Ssteve.reinhardt@amd.com */ 2007445Ssteve.reinhardt@amd.comint rgdb_wait = -1; 2017445Ssteve.reinhardt@amd.com 202180SN/Aint 2035718Shsul@eecs.umich.eduSystem::registerThreadContext(ThreadContext *tc, int assigned) 2042SN/A{ 2055712Shsul@eecs.umich.edu int id; 2065718Shsul@eecs.umich.edu if (assigned == -1) { 2075718Shsul@eecs.umich.edu for (id = 0; id < threadContexts.size(); id++) { 2085718Shsul@eecs.umich.edu if (!threadContexts[id]) 2095718Shsul@eecs.umich.edu break; 2105718Shsul@eecs.umich.edu } 2115718Shsul@eecs.umich.edu 2125718Shsul@eecs.umich.edu if (threadContexts.size() <= id) 2135718Shsul@eecs.umich.edu threadContexts.resize(id + 1); 2145718Shsul@eecs.umich.edu } else { 2155718Shsul@eecs.umich.edu if (threadContexts.size() <= assigned) 2165718Shsul@eecs.umich.edu threadContexts.resize(assigned + 1); 2175718Shsul@eecs.umich.edu id = assigned; 2181806SN/A } 2191806SN/A 2202680Sktlim@umich.edu if (threadContexts[id]) 2215823Ssaidi@eecs.umich.edu fatal("Cannot have two CPUs with the same id (%d)\n", id); 2221806SN/A 2232680Sktlim@umich.edu threadContexts[id] = tc; 2245714Shsul@eecs.umich.edu _numContexts++; 2251070SN/A 2265512SMichael.Adler@intel.com int port = getRemoteGDBPort(); 2277445Ssteve.reinhardt@amd.com if (port) { 2284095Sbinkertn@umich.edu RemoteGDB *rgdb = new RemoteGDB(this, tc); 2295512SMichael.Adler@intel.com GDBListener *gdbl = new GDBListener(rgdb, port + id); 2304095Sbinkertn@umich.edu gdbl->listen(); 2317445Ssteve.reinhardt@amd.com 2324095Sbinkertn@umich.edu if (rgdb_wait != -1 && rgdb_wait == id) 2334095Sbinkertn@umich.edu gdbl->accept(); 2341070SN/A 2354095Sbinkertn@umich.edu if (remoteGDB.size() <= id) { 2364095Sbinkertn@umich.edu remoteGDB.resize(id + 1); 2374095Sbinkertn@umich.edu } 2384095Sbinkertn@umich.edu 2394095Sbinkertn@umich.edu remoteGDB[id] = rgdb; 2401070SN/A } 2411070SN/A 2427914SBrad.Beckmann@amd.com activeCpus.push_back(false); 2437914SBrad.Beckmann@amd.com 2441806SN/A return id; 245180SN/A} 24675SN/A 2476029Ssteve.reinhardt@amd.comint 2486029Ssteve.reinhardt@amd.comSystem::numRunningContexts() 2496029Ssteve.reinhardt@amd.com{ 2506029Ssteve.reinhardt@amd.com int running = 0; 2516029Ssteve.reinhardt@amd.com for (int i = 0; i < _numContexts; ++i) { 2526029Ssteve.reinhardt@amd.com if (threadContexts[i]->status() != ThreadContext::Halted) 2536029Ssteve.reinhardt@amd.com ++running; 2546029Ssteve.reinhardt@amd.com } 2556029Ssteve.reinhardt@amd.com return running; 2566029Ssteve.reinhardt@amd.com} 2576029Ssteve.reinhardt@amd.com 258180SN/Avoid 2597733SAli.Saidi@ARM.comSystem::initState() 2601129SN/A{ 2618769Sgblack@eecs.umich.edu if (FullSystem) { 2629172Snilay@cs.wisc.edu for (int i = 0; i < threadContexts.size(); i++) 2638769Sgblack@eecs.umich.edu TheISA::startupCPU(threadContexts[i], i); 2648799Sgblack@eecs.umich.edu // Moved from the constructor to here since it relies on the 2658799Sgblack@eecs.umich.edu // address map being resolved in the interconnect 2668799Sgblack@eecs.umich.edu /** 2678799Sgblack@eecs.umich.edu * Load the kernel code into memory 2688799Sgblack@eecs.umich.edu */ 2698885SAli.Saidi@ARM.com if (params()->kernel != "") { 2709187SKrishnendra.Nathella@arm.com // Validate kernel mapping before loading binary 2719187SKrishnendra.Nathella@arm.com if (!(isMemAddr(kernelStart & loadAddrMask) && 2729187SKrishnendra.Nathella@arm.com isMemAddr(kernelEnd & loadAddrMask))) { 2739187SKrishnendra.Nathella@arm.com fatal("Kernel is mapped to invalid location (not memory). " 2749187SKrishnendra.Nathella@arm.com "kernelStart 0x(%x) - kernelEnd 0x(%x)\n", kernelStart, 2759187SKrishnendra.Nathella@arm.com kernelEnd); 2769187SKrishnendra.Nathella@arm.com } 2778799Sgblack@eecs.umich.edu // Load program sections into memory 2788799Sgblack@eecs.umich.edu kernel->loadSections(physProxy, loadAddrMask); 2798706Sandreas.hansson@arm.com 2808799Sgblack@eecs.umich.edu DPRINTF(Loader, "Kernel start = %#x\n", kernelStart); 2818799Sgblack@eecs.umich.edu DPRINTF(Loader, "Kernel end = %#x\n", kernelEnd); 2828799Sgblack@eecs.umich.edu DPRINTF(Loader, "Kernel entry = %#x\n", kernelEntry); 2838799Sgblack@eecs.umich.edu DPRINTF(Loader, "Kernel loaded...\n"); 2848799Sgblack@eecs.umich.edu } 2858706Sandreas.hansson@arm.com } 2868706Sandreas.hansson@arm.com 2878706Sandreas.hansson@arm.com activeCpus.clear(); 2881129SN/A} 2891129SN/A 2901129SN/Avoid 2915713Shsul@eecs.umich.eduSystem::replaceThreadContext(ThreadContext *tc, int context_id) 292180SN/A{ 2935713Shsul@eecs.umich.edu if (context_id >= threadContexts.size()) { 2942680Sktlim@umich.edu panic("replaceThreadContext: bad id, %d >= %d\n", 2955713Shsul@eecs.umich.edu context_id, threadContexts.size()); 296180SN/A } 297180SN/A 2985713Shsul@eecs.umich.edu threadContexts[context_id] = tc; 2995713Shsul@eecs.umich.edu if (context_id < remoteGDB.size()) 3005713Shsul@eecs.umich.edu remoteGDB[context_id]->replaceThreadContext(tc); 3012SN/A} 3022SN/A 3032378SN/AAddr 3048601Ssteve.reinhardt@amd.comSystem::allocPhysPages(int npages) 3052378SN/A{ 3067770SAli.Saidi@ARM.com Addr return_addr = pagePtr << LogVMPageSize; 3078601Ssteve.reinhardt@amd.com pagePtr += npages; 3089007Slena@cs.wisc.edu if ((pagePtr << LogVMPageSize) > physmem.totalSize()) 3093162Ssaidi@eecs.umich.edu fatal("Out of memory, please increase size of physical memory."); 3102378SN/A return return_addr; 3112378SN/A} 3125795Ssaidi@eecs.umich.edu 3135795Ssaidi@eecs.umich.eduAddr 3148931Sandreas.hansson@arm.comSystem::memSize() const 3155795Ssaidi@eecs.umich.edu{ 3168931Sandreas.hansson@arm.com return physmem.totalSize(); 3175795Ssaidi@eecs.umich.edu} 3185795Ssaidi@eecs.umich.edu 3195795Ssaidi@eecs.umich.eduAddr 3208931Sandreas.hansson@arm.comSystem::freeMemSize() const 3215795Ssaidi@eecs.umich.edu{ 3228931Sandreas.hansson@arm.com return physmem.totalSize() - (pagePtr << LogVMPageSize); 3235795Ssaidi@eecs.umich.edu} 3245795Ssaidi@eecs.umich.edu 3258460SAli.Saidi@ARM.combool 3268931Sandreas.hansson@arm.comSystem::isMemAddr(Addr addr) const 3278460SAli.Saidi@ARM.com{ 3288931Sandreas.hansson@arm.com return physmem.isMemAddr(addr); 3298460SAli.Saidi@ARM.com} 3308460SAli.Saidi@ARM.com 3319342SAndreas.Sandberg@arm.comunsigned int 3329342SAndreas.Sandberg@arm.comSystem::drain(DrainManager *dm) 3339342SAndreas.Sandberg@arm.com{ 3349342SAndreas.Sandberg@arm.com setDrainState(Drainable::Drained); 3359342SAndreas.Sandberg@arm.com return 0; 3369342SAndreas.Sandberg@arm.com} 3379342SAndreas.Sandberg@arm.com 3381070SN/Avoid 3399342SAndreas.Sandberg@arm.comSystem::drainResume() 3407897Shestness@cs.utexas.edu{ 3419342SAndreas.Sandberg@arm.com Drainable::drainResume(); 3427897Shestness@cs.utexas.edu totalNumInsts = 0; 3437897Shestness@cs.utexas.edu} 3447897Shestness@cs.utexas.edu 3457897Shestness@cs.utexas.eduvoid 3461070SN/ASystem::serialize(ostream &os) 3471070SN/A{ 3488769Sgblack@eecs.umich.edu if (FullSystem) 3498769Sgblack@eecs.umich.edu kernelSymtab->serialize("kernel_symtab", os); 3507770SAli.Saidi@ARM.com SERIALIZE_SCALAR(pagePtr); 3517770SAli.Saidi@ARM.com SERIALIZE_SCALAR(nextPID); 3529292Sandreas.hansson@arm.com serializeSymtab(os); 3539293Sandreas.hansson@arm.com 3549293Sandreas.hansson@arm.com // also serialize the memories in the system 3559293Sandreas.hansson@arm.com nameOut(os, csprintf("%s.physmem", name())); 3569293Sandreas.hansson@arm.com physmem.serialize(os); 3571070SN/A} 3581070SN/A 3591070SN/A 3601070SN/Avoid 3611070SN/ASystem::unserialize(Checkpoint *cp, const string §ion) 3621070SN/A{ 3638769Sgblack@eecs.umich.edu if (FullSystem) 3648769Sgblack@eecs.umich.edu kernelSymtab->unserialize("kernel_symtab", cp, section); 3657770SAli.Saidi@ARM.com UNSERIALIZE_SCALAR(pagePtr); 3667770SAli.Saidi@ARM.com UNSERIALIZE_SCALAR(nextPID); 3679292Sandreas.hansson@arm.com unserializeSymtab(cp, section); 3689293Sandreas.hansson@arm.com 3699293Sandreas.hansson@arm.com // also unserialize the memories in the system 3709293Sandreas.hansson@arm.com physmem.unserialize(cp, csprintf("%s.physmem", name())); 3711070SN/A} 3722SN/A 3732SN/Avoid 3748666SPrakash.Ramrakhyani@arm.comSystem::regStats() 3758666SPrakash.Ramrakhyani@arm.com{ 3768666SPrakash.Ramrakhyani@arm.com for (uint32_t j = 0; j < numWorkIds ; j++) { 3778666SPrakash.Ramrakhyani@arm.com workItemStats[j] = new Stats::Histogram(); 3788666SPrakash.Ramrakhyani@arm.com stringstream namestr; 3798666SPrakash.Ramrakhyani@arm.com ccprintf(namestr, "work_item_type%d", j); 3808666SPrakash.Ramrakhyani@arm.com workItemStats[j]->init(20) 3818666SPrakash.Ramrakhyani@arm.com .name(name() + "." + namestr.str()) 3828666SPrakash.Ramrakhyani@arm.com .desc("Run time stat for" + namestr.str()) 3838666SPrakash.Ramrakhyani@arm.com .prereq(*workItemStats[j]); 3848666SPrakash.Ramrakhyani@arm.com } 3858666SPrakash.Ramrakhyani@arm.com} 3868666SPrakash.Ramrakhyani@arm.com 3878666SPrakash.Ramrakhyani@arm.comvoid 3888666SPrakash.Ramrakhyani@arm.comSystem::workItemEnd(uint32_t tid, uint32_t workid) 3898666SPrakash.Ramrakhyani@arm.com{ 3908666SPrakash.Ramrakhyani@arm.com std::pair<uint32_t,uint32_t> p(tid, workid); 3918666SPrakash.Ramrakhyani@arm.com if (!lastWorkItemStarted.count(p)) 3928666SPrakash.Ramrakhyani@arm.com return; 3938666SPrakash.Ramrakhyani@arm.com 3948666SPrakash.Ramrakhyani@arm.com Tick samp = curTick() - lastWorkItemStarted[p]; 3958666SPrakash.Ramrakhyani@arm.com DPRINTF(WorkItems, "Work item end: %d\t%d\t%lld\n", tid, workid, samp); 3968666SPrakash.Ramrakhyani@arm.com 3978666SPrakash.Ramrakhyani@arm.com if (workid >= numWorkIds) 3988666SPrakash.Ramrakhyani@arm.com fatal("Got workid greater than specified in system configuration\n"); 3998666SPrakash.Ramrakhyani@arm.com 4008666SPrakash.Ramrakhyani@arm.com workItemStats[workid]->sample(samp); 4018666SPrakash.Ramrakhyani@arm.com lastWorkItemStarted.erase(p); 4028666SPrakash.Ramrakhyani@arm.com} 4038666SPrakash.Ramrakhyani@arm.com 4048666SPrakash.Ramrakhyani@arm.comvoid 4052SN/ASystem::printSystems() 4062SN/A{ 4072SN/A vector<System *>::iterator i = systemList.begin(); 4082SN/A vector<System *>::iterator end = systemList.end(); 4092SN/A for (; i != end; ++i) { 4102SN/A System *sys = *i; 4112SN/A cerr << "System " << sys->name() << ": " << hex << sys << endl; 4122SN/A } 4132SN/A} 4142SN/A 4152SN/Avoid 4162SN/AprintSystems() 4172SN/A{ 4182SN/A System::printSystems(); 4192SN/A} 4202SN/A 4218832SAli.Saidi@ARM.comMasterID 4228832SAli.Saidi@ARM.comSystem::getMasterId(std::string master_name) 4238832SAli.Saidi@ARM.com{ 4248832SAli.Saidi@ARM.com // strip off system name if the string starts with it 4259142Ssteve.reinhardt@amd.com if (startswith(master_name, name())) 4268832SAli.Saidi@ARM.com master_name = master_name.erase(0, name().size() + 1); 4278832SAli.Saidi@ARM.com 4288832SAli.Saidi@ARM.com // CPUs in switch_cpus ask for ids again after switching 4298832SAli.Saidi@ARM.com for (int i = 0; i < masterIds.size(); i++) { 4308832SAli.Saidi@ARM.com if (masterIds[i] == master_name) { 4318832SAli.Saidi@ARM.com return i; 4328832SAli.Saidi@ARM.com } 4338832SAli.Saidi@ARM.com } 4348832SAli.Saidi@ARM.com 4358986SAli.Saidi@ARM.com // Verify that the statistics haven't been enabled yet 4368986SAli.Saidi@ARM.com // Otherwise objects will have sized their stat buckets and 4378986SAli.Saidi@ARM.com // they will be too small 4388832SAli.Saidi@ARM.com 4398986SAli.Saidi@ARM.com if (Stats::enabled()) 4408832SAli.Saidi@ARM.com fatal("Can't request a masterId after regStats(). \ 4418832SAli.Saidi@ARM.com You must do so in init().\n"); 4428832SAli.Saidi@ARM.com 4438832SAli.Saidi@ARM.com masterIds.push_back(master_name); 4448832SAli.Saidi@ARM.com 4458832SAli.Saidi@ARM.com return masterIds.size() - 1; 4468832SAli.Saidi@ARM.com} 4478832SAli.Saidi@ARM.com 4488832SAli.Saidi@ARM.comstd::string 4498832SAli.Saidi@ARM.comSystem::getMasterName(MasterID master_id) 4508832SAli.Saidi@ARM.com{ 4518832SAli.Saidi@ARM.com if (master_id >= masterIds.size()) 4528832SAli.Saidi@ARM.com fatal("Invalid master_id passed to getMasterName()\n"); 4538832SAli.Saidi@ARM.com 4548832SAli.Saidi@ARM.com return masterIds[master_id]; 4558832SAli.Saidi@ARM.com} 4568832SAli.Saidi@ARM.com 4579524SAndreas.Sandberg@ARM.comconst char *System::MemoryModeStrings[4] = {"invalid", "atomic", "timing", 4589524SAndreas.Sandberg@ARM.com "atomic_noncaching"}; 4592902Ssaidi@eecs.umich.edu 4604762Snate@binkert.orgSystem * 4614762Snate@binkert.orgSystemParams::create() 4622424SN/A{ 4635530Snate@binkert.org return new System(this); 4642424SN/A} 465