system.cc revision 9292
12689Sktlim@umich.edu/* 28703Sandreas.hansson@arm.com * Copyright (c) 2011-2012 ARM Limited 38666SPrakash.Ramrakhyani@arm.com * All rights reserved 48666SPrakash.Ramrakhyani@arm.com * 58666SPrakash.Ramrakhyani@arm.com * The license below extends only to copyright in the software and shall 68666SPrakash.Ramrakhyani@arm.com * not be construed as granting a license to any other intellectual 78666SPrakash.Ramrakhyani@arm.com * property including but not limited to intellectual property relating 88666SPrakash.Ramrakhyani@arm.com * to a hardware implementation of the functionality of the software 98666SPrakash.Ramrakhyani@arm.com * licensed hereunder. You may use the software subject to the license 108666SPrakash.Ramrakhyani@arm.com * terms below provided that you ensure that this notice is replicated 118666SPrakash.Ramrakhyani@arm.com * unmodified and in its entirety in all distributions of the software, 128666SPrakash.Ramrakhyani@arm.com * modified or unmodified, in source code or in binary form. 138666SPrakash.Ramrakhyani@arm.com * 142689Sktlim@umich.edu * Copyright (c) 2003-2006 The Regents of The University of Michigan 157897Shestness@cs.utexas.edu * Copyright (c) 2011 Regents of the University of California 162689Sktlim@umich.edu * All rights reserved. 172689Sktlim@umich.edu * 182689Sktlim@umich.edu * Redistribution and use in source and binary forms, with or without 192689Sktlim@umich.edu * modification, are permitted provided that the following conditions are 202689Sktlim@umich.edu * met: redistributions of source code must retain the above copyright 212689Sktlim@umich.edu * notice, this list of conditions and the following disclaimer; 222689Sktlim@umich.edu * redistributions in binary form must reproduce the above copyright 232689Sktlim@umich.edu * notice, this list of conditions and the following disclaimer in the 242689Sktlim@umich.edu * documentation and/or other materials provided with the distribution; 252689Sktlim@umich.edu * neither the name of the copyright holders nor the names of its 262689Sktlim@umich.edu * contributors may be used to endorse or promote products derived from 272689Sktlim@umich.edu * this software without specific prior written permission. 282689Sktlim@umich.edu * 292689Sktlim@umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 302689Sktlim@umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 312689Sktlim@umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 322689Sktlim@umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 332689Sktlim@umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 342689Sktlim@umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 352689Sktlim@umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 362689Sktlim@umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 372689Sktlim@umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 382689Sktlim@umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 392689Sktlim@umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 402689Sktlim@umich.edu * 412689Sktlim@umich.edu * Authors: Steve Reinhardt 422689Sktlim@umich.edu * Lisa Hsu 432689Sktlim@umich.edu * Nathan Binkert 442689Sktlim@umich.edu * Ali Saidi 457897Shestness@cs.utexas.edu * Rick Strong 462689Sktlim@umich.edu */ 472689Sktlim@umich.edu 482521SN/A#include "arch/isa_traits.hh" 493960Sgblack@eecs.umich.edu#include "arch/remote_gdb.hh" 504194Ssaidi@eecs.umich.edu#include "arch/utility.hh" 518769Sgblack@eecs.umich.edu#include "arch/vtophys.hh" 521070SN/A#include "base/loader/object_file.hh" 531070SN/A#include "base/loader/symtab.hh" 549142Ssteve.reinhardt@amd.com#include "base/str.hh" 552521SN/A#include "base/trace.hh" 566658Snate@binkert.org#include "config/the_isa.hh" 578229Snate@binkert.org#include "cpu/thread_context.hh" 588232Snate@binkert.org#include "debug/Loader.hh" 598666SPrakash.Ramrakhyani@arm.com#include "debug/WorkItems.hh" 608769Sgblack@eecs.umich.edu#include "kern/kernel_stats.hh" 612522SN/A#include "mem/physical.hh" 628769Sgblack@eecs.umich.edu#include "params/System.hh" 632037SN/A#include "sim/byteswap.hh" 648229Snate@binkert.org#include "sim/debug.hh" 658769Sgblack@eecs.umich.edu#include "sim/full_system.hh" 6656SN/A#include "sim/system.hh" 676658Snate@binkert.org 682SN/Ausing namespace std; 692107SN/Ausing namespace TheISA; 702SN/A 712SN/Avector<System *> System::systemList; 722SN/A 732SN/Aint System::numSystemsRunning = 0; 742SN/A 751070SN/ASystem::System(Params *p) 768703Sandreas.hansson@arm.com : MemObject(p), _systemPort("system_port", this), 778703Sandreas.hansson@arm.com _numContexts(0), 788826Snilay@cs.wisc.edu pagePtr(0), 792521SN/A init_param(p->init_param), 808852Sandreas.hansson@arm.com physProxy(_systemPort), 818852Sandreas.hansson@arm.com virtProxy(_systemPort), 827580SAli.Saidi@arm.com loadAddrMask(p->load_addr_mask), 837770SAli.Saidi@ARM.com nextPID(0), 848931Sandreas.hansson@arm.com physmem(p->memories), 857914SBrad.Beckmann@amd.com memoryMode(p->mem_mode), 867914SBrad.Beckmann@amd.com workItemsBegin(0), 877914SBrad.Beckmann@amd.com workItemsEnd(0), 888666SPrakash.Ramrakhyani@arm.com numWorkIds(p->num_work_ids), 897914SBrad.Beckmann@amd.com _params(p), 908666SPrakash.Ramrakhyani@arm.com totalNumInsts(0), 917897Shestness@cs.utexas.edu instEventQueue("system instruction-based event queue") 922SN/A{ 931070SN/A // add self to global system list 941070SN/A systemList.push_back(this); 951070SN/A 968769Sgblack@eecs.umich.edu if (FullSystem) { 978769Sgblack@eecs.umich.edu kernelSymtab = new SymbolTable; 988769Sgblack@eecs.umich.edu if (!debugSymbolTable) 998769Sgblack@eecs.umich.edu debugSymbolTable = new SymbolTable; 1008666SPrakash.Ramrakhyani@arm.com } 1018832SAli.Saidi@ARM.com 1028832SAli.Saidi@ARM.com // Get the generic system master IDs 1038832SAli.Saidi@ARM.com MasterID tmp_id M5_VAR_USED; 1048832SAli.Saidi@ARM.com tmp_id = getMasterId("writebacks"); 1058832SAli.Saidi@ARM.com assert(tmp_id == Request::wbMasterId); 1068832SAli.Saidi@ARM.com tmp_id = getMasterId("functional"); 1078832SAli.Saidi@ARM.com assert(tmp_id == Request::funcMasterId); 1088832SAli.Saidi@ARM.com tmp_id = getMasterId("interrupt"); 1098832SAli.Saidi@ARM.com assert(tmp_id == Request::intMasterId); 1108832SAli.Saidi@ARM.com 1118885SAli.Saidi@ARM.com if (FullSystem) { 1128885SAli.Saidi@ARM.com if (params()->kernel == "") { 1138885SAli.Saidi@ARM.com inform("No kernel set for full system simulation. " 1149147Snilay@cs.wisc.edu "Assuming you know what you're doing\n"); 1159147Snilay@cs.wisc.edu 1169147Snilay@cs.wisc.edu kernel = NULL; 1178885SAli.Saidi@ARM.com } else { 1188885SAli.Saidi@ARM.com // Get the kernel code 1198885SAli.Saidi@ARM.com kernel = createObjectFile(params()->kernel); 1208885SAli.Saidi@ARM.com inform("kernel located at: %s", params()->kernel); 1218885SAli.Saidi@ARM.com 1228885SAli.Saidi@ARM.com if (kernel == NULL) 1238885SAli.Saidi@ARM.com fatal("Could not load kernel file %s", params()->kernel); 1248885SAli.Saidi@ARM.com 1258885SAli.Saidi@ARM.com // setup entry points 1268885SAli.Saidi@ARM.com kernelStart = kernel->textBase(); 1278885SAli.Saidi@ARM.com kernelEnd = kernel->bssBase() + kernel->bssSize(); 1288885SAli.Saidi@ARM.com kernelEntry = kernel->entryPoint(); 1298885SAli.Saidi@ARM.com 1308885SAli.Saidi@ARM.com // load symbols 1318885SAli.Saidi@ARM.com if (!kernel->loadGlobalSymbols(kernelSymtab)) 1328885SAli.Saidi@ARM.com fatal("could not load kernel symbols\n"); 1338885SAli.Saidi@ARM.com 1348885SAli.Saidi@ARM.com if (!kernel->loadLocalSymbols(kernelSymtab)) 1358885SAli.Saidi@ARM.com fatal("could not load kernel local symbols\n"); 1368885SAli.Saidi@ARM.com 1378885SAli.Saidi@ARM.com if (!kernel->loadGlobalSymbols(debugSymbolTable)) 1388885SAli.Saidi@ARM.com fatal("could not load kernel symbols\n"); 1398885SAli.Saidi@ARM.com 1408885SAli.Saidi@ARM.com if (!kernel->loadLocalSymbols(debugSymbolTable)) 1418885SAli.Saidi@ARM.com fatal("could not load kernel local symbols\n"); 1428885SAli.Saidi@ARM.com 1438885SAli.Saidi@ARM.com // Loading only needs to happen once and after memory system is 1448885SAli.Saidi@ARM.com // connected so it will happen in initState() 1458885SAli.Saidi@ARM.com } 1468885SAli.Saidi@ARM.com } 1478885SAli.Saidi@ARM.com 1488885SAli.Saidi@ARM.com // increment the number of running systms 1498885SAli.Saidi@ARM.com numSystemsRunning++; 1508885SAli.Saidi@ARM.com 1519053Sdam.sunwoo@arm.com // Set back pointers to the system in all memories 1529053Sdam.sunwoo@arm.com for (int x = 0; x < params()->memories.size(); x++) 1539053Sdam.sunwoo@arm.com params()->memories[x]->system(this); 1542SN/A} 1552SN/A 1562SN/ASystem::~System() 1572SN/A{ 1581070SN/A delete kernelSymtab; 1591070SN/A delete kernel; 1608666SPrakash.Ramrakhyani@arm.com 1618666SPrakash.Ramrakhyani@arm.com for (uint32_t j = 0; j < numWorkIds; j++) 1628666SPrakash.Ramrakhyani@arm.com delete workItemStats[j]; 1632SN/A} 1642SN/A 1658706Sandreas.hansson@arm.comvoid 1668706Sandreas.hansson@arm.comSystem::init() 1678706Sandreas.hansson@arm.com{ 1688706Sandreas.hansson@arm.com // check that the system port is connected 1698706Sandreas.hansson@arm.com if (!_systemPort.isConnected()) 1708706Sandreas.hansson@arm.com panic("System port on %s is not connected.\n", name()); 1718706Sandreas.hansson@arm.com} 1728706Sandreas.hansson@arm.com 1738922Swilliam.wang@arm.comMasterPort& 1748922Swilliam.wang@arm.comSystem::getMasterPort(const std::string &if_name, int idx) 1758703Sandreas.hansson@arm.com{ 1768703Sandreas.hansson@arm.com // no need to distinguish at the moment (besides checking) 1778922Swilliam.wang@arm.com return _systemPort; 1788703Sandreas.hansson@arm.com} 1798703Sandreas.hansson@arm.com 1802901Ssaidi@eecs.umich.eduvoid 1814762Snate@binkert.orgSystem::setMemoryMode(Enums::MemoryMode mode) 1822901Ssaidi@eecs.umich.edu{ 1832901Ssaidi@eecs.umich.edu assert(getState() == Drained); 1842901Ssaidi@eecs.umich.edu memoryMode = mode; 1852901Ssaidi@eecs.umich.edu} 1862901Ssaidi@eecs.umich.edu 1873960Sgblack@eecs.umich.edubool System::breakpoint() 1883960Sgblack@eecs.umich.edu{ 1894095Sbinkertn@umich.edu if (remoteGDB.size()) 1904095Sbinkertn@umich.edu return remoteGDB[0]->breakpoint(); 1914095Sbinkertn@umich.edu return false; 1923960Sgblack@eecs.umich.edu} 1933960Sgblack@eecs.umich.edu 1947445Ssteve.reinhardt@amd.com/** 1957445Ssteve.reinhardt@amd.com * Setting rgdb_wait to a positive integer waits for a remote debugger to 1967445Ssteve.reinhardt@amd.com * connect to that context ID before continuing. This should really 1977445Ssteve.reinhardt@amd.com be a parameter on the CPU object or something... 1987445Ssteve.reinhardt@amd.com */ 1997445Ssteve.reinhardt@amd.comint rgdb_wait = -1; 2007445Ssteve.reinhardt@amd.com 201180SN/Aint 2025718Shsul@eecs.umich.eduSystem::registerThreadContext(ThreadContext *tc, int assigned) 2032SN/A{ 2045712Shsul@eecs.umich.edu int id; 2055718Shsul@eecs.umich.edu if (assigned == -1) { 2065718Shsul@eecs.umich.edu for (id = 0; id < threadContexts.size(); id++) { 2075718Shsul@eecs.umich.edu if (!threadContexts[id]) 2085718Shsul@eecs.umich.edu break; 2095718Shsul@eecs.umich.edu } 2105718Shsul@eecs.umich.edu 2115718Shsul@eecs.umich.edu if (threadContexts.size() <= id) 2125718Shsul@eecs.umich.edu threadContexts.resize(id + 1); 2135718Shsul@eecs.umich.edu } else { 2145718Shsul@eecs.umich.edu if (threadContexts.size() <= assigned) 2155718Shsul@eecs.umich.edu threadContexts.resize(assigned + 1); 2165718Shsul@eecs.umich.edu id = assigned; 2171806SN/A } 2181806SN/A 2192680Sktlim@umich.edu if (threadContexts[id]) 2205823Ssaidi@eecs.umich.edu fatal("Cannot have two CPUs with the same id (%d)\n", id); 2211806SN/A 2222680Sktlim@umich.edu threadContexts[id] = tc; 2235714Shsul@eecs.umich.edu _numContexts++; 2241070SN/A 2255512SMichael.Adler@intel.com int port = getRemoteGDBPort(); 2267445Ssteve.reinhardt@amd.com if (port) { 2274095Sbinkertn@umich.edu RemoteGDB *rgdb = new RemoteGDB(this, tc); 2285512SMichael.Adler@intel.com GDBListener *gdbl = new GDBListener(rgdb, port + id); 2294095Sbinkertn@umich.edu gdbl->listen(); 2307445Ssteve.reinhardt@amd.com 2314095Sbinkertn@umich.edu if (rgdb_wait != -1 && rgdb_wait == id) 2324095Sbinkertn@umich.edu gdbl->accept(); 2331070SN/A 2344095Sbinkertn@umich.edu if (remoteGDB.size() <= id) { 2354095Sbinkertn@umich.edu remoteGDB.resize(id + 1); 2364095Sbinkertn@umich.edu } 2374095Sbinkertn@umich.edu 2384095Sbinkertn@umich.edu remoteGDB[id] = rgdb; 2391070SN/A } 2401070SN/A 2417914SBrad.Beckmann@amd.com activeCpus.push_back(false); 2427914SBrad.Beckmann@amd.com 2431806SN/A return id; 244180SN/A} 24575SN/A 2466029Ssteve.reinhardt@amd.comint 2476029Ssteve.reinhardt@amd.comSystem::numRunningContexts() 2486029Ssteve.reinhardt@amd.com{ 2496029Ssteve.reinhardt@amd.com int running = 0; 2506029Ssteve.reinhardt@amd.com for (int i = 0; i < _numContexts; ++i) { 2516029Ssteve.reinhardt@amd.com if (threadContexts[i]->status() != ThreadContext::Halted) 2526029Ssteve.reinhardt@amd.com ++running; 2536029Ssteve.reinhardt@amd.com } 2546029Ssteve.reinhardt@amd.com return running; 2556029Ssteve.reinhardt@amd.com} 2566029Ssteve.reinhardt@amd.com 257180SN/Avoid 2587733SAli.Saidi@ARM.comSystem::initState() 2591129SN/A{ 2608769Sgblack@eecs.umich.edu if (FullSystem) { 2619172Snilay@cs.wisc.edu for (int i = 0; i < threadContexts.size(); i++) 2628769Sgblack@eecs.umich.edu TheISA::startupCPU(threadContexts[i], i); 2638799Sgblack@eecs.umich.edu // Moved from the constructor to here since it relies on the 2648799Sgblack@eecs.umich.edu // address map being resolved in the interconnect 2658799Sgblack@eecs.umich.edu /** 2668799Sgblack@eecs.umich.edu * Load the kernel code into memory 2678799Sgblack@eecs.umich.edu */ 2688885SAli.Saidi@ARM.com if (params()->kernel != "") { 2699187SKrishnendra.Nathella@arm.com // Validate kernel mapping before loading binary 2709187SKrishnendra.Nathella@arm.com if (!(isMemAddr(kernelStart & loadAddrMask) && 2719187SKrishnendra.Nathella@arm.com isMemAddr(kernelEnd & loadAddrMask))) { 2729187SKrishnendra.Nathella@arm.com fatal("Kernel is mapped to invalid location (not memory). " 2739187SKrishnendra.Nathella@arm.com "kernelStart 0x(%x) - kernelEnd 0x(%x)\n", kernelStart, 2749187SKrishnendra.Nathella@arm.com kernelEnd); 2759187SKrishnendra.Nathella@arm.com } 2768799Sgblack@eecs.umich.edu // Load program sections into memory 2778799Sgblack@eecs.umich.edu kernel->loadSections(physProxy, loadAddrMask); 2788706Sandreas.hansson@arm.com 2798799Sgblack@eecs.umich.edu DPRINTF(Loader, "Kernel start = %#x\n", kernelStart); 2808799Sgblack@eecs.umich.edu DPRINTF(Loader, "Kernel end = %#x\n", kernelEnd); 2818799Sgblack@eecs.umich.edu DPRINTF(Loader, "Kernel entry = %#x\n", kernelEntry); 2828799Sgblack@eecs.umich.edu DPRINTF(Loader, "Kernel loaded...\n"); 2838799Sgblack@eecs.umich.edu } 2848706Sandreas.hansson@arm.com } 2858706Sandreas.hansson@arm.com 2868706Sandreas.hansson@arm.com activeCpus.clear(); 2871129SN/A} 2881129SN/A 2891129SN/Avoid 2905713Shsul@eecs.umich.eduSystem::replaceThreadContext(ThreadContext *tc, int context_id) 291180SN/A{ 2925713Shsul@eecs.umich.edu if (context_id >= threadContexts.size()) { 2932680Sktlim@umich.edu panic("replaceThreadContext: bad id, %d >= %d\n", 2945713Shsul@eecs.umich.edu context_id, threadContexts.size()); 295180SN/A } 296180SN/A 2975713Shsul@eecs.umich.edu threadContexts[context_id] = tc; 2985713Shsul@eecs.umich.edu if (context_id < remoteGDB.size()) 2995713Shsul@eecs.umich.edu remoteGDB[context_id]->replaceThreadContext(tc); 3002SN/A} 3012SN/A 3022378SN/AAddr 3038601Ssteve.reinhardt@amd.comSystem::allocPhysPages(int npages) 3042378SN/A{ 3057770SAli.Saidi@ARM.com Addr return_addr = pagePtr << LogVMPageSize; 3068601Ssteve.reinhardt@amd.com pagePtr += npages; 3079007Slena@cs.wisc.edu if ((pagePtr << LogVMPageSize) > physmem.totalSize()) 3083162Ssaidi@eecs.umich.edu fatal("Out of memory, please increase size of physical memory."); 3092378SN/A return return_addr; 3102378SN/A} 3115795Ssaidi@eecs.umich.edu 3125795Ssaidi@eecs.umich.eduAddr 3138931Sandreas.hansson@arm.comSystem::memSize() const 3145795Ssaidi@eecs.umich.edu{ 3158931Sandreas.hansson@arm.com return physmem.totalSize(); 3165795Ssaidi@eecs.umich.edu} 3175795Ssaidi@eecs.umich.edu 3185795Ssaidi@eecs.umich.eduAddr 3198931Sandreas.hansson@arm.comSystem::freeMemSize() const 3205795Ssaidi@eecs.umich.edu{ 3218931Sandreas.hansson@arm.com return physmem.totalSize() - (pagePtr << LogVMPageSize); 3225795Ssaidi@eecs.umich.edu} 3235795Ssaidi@eecs.umich.edu 3248460SAli.Saidi@ARM.combool 3258931Sandreas.hansson@arm.comSystem::isMemAddr(Addr addr) const 3268460SAli.Saidi@ARM.com{ 3278931Sandreas.hansson@arm.com return physmem.isMemAddr(addr); 3288460SAli.Saidi@ARM.com} 3298460SAli.Saidi@ARM.com 3301070SN/Avoid 3317897Shestness@cs.utexas.eduSystem::resume() 3327897Shestness@cs.utexas.edu{ 3337897Shestness@cs.utexas.edu SimObject::resume(); 3347897Shestness@cs.utexas.edu totalNumInsts = 0; 3357897Shestness@cs.utexas.edu} 3367897Shestness@cs.utexas.edu 3377897Shestness@cs.utexas.eduvoid 3381070SN/ASystem::serialize(ostream &os) 3391070SN/A{ 3408769Sgblack@eecs.umich.edu if (FullSystem) 3418769Sgblack@eecs.umich.edu kernelSymtab->serialize("kernel_symtab", os); 3427770SAli.Saidi@ARM.com SERIALIZE_SCALAR(pagePtr); 3437770SAli.Saidi@ARM.com SERIALIZE_SCALAR(nextPID); 3449292Sandreas.hansson@arm.com serializeSymtab(os); 3451070SN/A} 3461070SN/A 3471070SN/A 3481070SN/Avoid 3491070SN/ASystem::unserialize(Checkpoint *cp, const string §ion) 3501070SN/A{ 3518769Sgblack@eecs.umich.edu if (FullSystem) 3528769Sgblack@eecs.umich.edu kernelSymtab->unserialize("kernel_symtab", cp, section); 3537770SAli.Saidi@ARM.com UNSERIALIZE_SCALAR(pagePtr); 3547770SAli.Saidi@ARM.com UNSERIALIZE_SCALAR(nextPID); 3559292Sandreas.hansson@arm.com unserializeSymtab(cp, section); 3561070SN/A} 3572SN/A 3582SN/Avoid 3598666SPrakash.Ramrakhyani@arm.comSystem::regStats() 3608666SPrakash.Ramrakhyani@arm.com{ 3618666SPrakash.Ramrakhyani@arm.com for (uint32_t j = 0; j < numWorkIds ; j++) { 3628666SPrakash.Ramrakhyani@arm.com workItemStats[j] = new Stats::Histogram(); 3638666SPrakash.Ramrakhyani@arm.com stringstream namestr; 3648666SPrakash.Ramrakhyani@arm.com ccprintf(namestr, "work_item_type%d", j); 3658666SPrakash.Ramrakhyani@arm.com workItemStats[j]->init(20) 3668666SPrakash.Ramrakhyani@arm.com .name(name() + "." + namestr.str()) 3678666SPrakash.Ramrakhyani@arm.com .desc("Run time stat for" + namestr.str()) 3688666SPrakash.Ramrakhyani@arm.com .prereq(*workItemStats[j]); 3698666SPrakash.Ramrakhyani@arm.com } 3708666SPrakash.Ramrakhyani@arm.com} 3718666SPrakash.Ramrakhyani@arm.com 3728666SPrakash.Ramrakhyani@arm.comvoid 3738666SPrakash.Ramrakhyani@arm.comSystem::workItemEnd(uint32_t tid, uint32_t workid) 3748666SPrakash.Ramrakhyani@arm.com{ 3758666SPrakash.Ramrakhyani@arm.com std::pair<uint32_t,uint32_t> p(tid, workid); 3768666SPrakash.Ramrakhyani@arm.com if (!lastWorkItemStarted.count(p)) 3778666SPrakash.Ramrakhyani@arm.com return; 3788666SPrakash.Ramrakhyani@arm.com 3798666SPrakash.Ramrakhyani@arm.com Tick samp = curTick() - lastWorkItemStarted[p]; 3808666SPrakash.Ramrakhyani@arm.com DPRINTF(WorkItems, "Work item end: %d\t%d\t%lld\n", tid, workid, samp); 3818666SPrakash.Ramrakhyani@arm.com 3828666SPrakash.Ramrakhyani@arm.com if (workid >= numWorkIds) 3838666SPrakash.Ramrakhyani@arm.com fatal("Got workid greater than specified in system configuration\n"); 3848666SPrakash.Ramrakhyani@arm.com 3858666SPrakash.Ramrakhyani@arm.com workItemStats[workid]->sample(samp); 3868666SPrakash.Ramrakhyani@arm.com lastWorkItemStarted.erase(p); 3878666SPrakash.Ramrakhyani@arm.com} 3888666SPrakash.Ramrakhyani@arm.com 3898666SPrakash.Ramrakhyani@arm.comvoid 3902SN/ASystem::printSystems() 3912SN/A{ 3922SN/A vector<System *>::iterator i = systemList.begin(); 3932SN/A vector<System *>::iterator end = systemList.end(); 3942SN/A for (; i != end; ++i) { 3952SN/A System *sys = *i; 3962SN/A cerr << "System " << sys->name() << ": " << hex << sys << endl; 3972SN/A } 3982SN/A} 3992SN/A 4002SN/Avoid 4012SN/AprintSystems() 4022SN/A{ 4032SN/A System::printSystems(); 4042SN/A} 4052SN/A 4068832SAli.Saidi@ARM.comMasterID 4078832SAli.Saidi@ARM.comSystem::getMasterId(std::string master_name) 4088832SAli.Saidi@ARM.com{ 4098832SAli.Saidi@ARM.com // strip off system name if the string starts with it 4109142Ssteve.reinhardt@amd.com if (startswith(master_name, name())) 4118832SAli.Saidi@ARM.com master_name = master_name.erase(0, name().size() + 1); 4128832SAli.Saidi@ARM.com 4138832SAli.Saidi@ARM.com // CPUs in switch_cpus ask for ids again after switching 4148832SAli.Saidi@ARM.com for (int i = 0; i < masterIds.size(); i++) { 4158832SAli.Saidi@ARM.com if (masterIds[i] == master_name) { 4168832SAli.Saidi@ARM.com return i; 4178832SAli.Saidi@ARM.com } 4188832SAli.Saidi@ARM.com } 4198832SAli.Saidi@ARM.com 4208986SAli.Saidi@ARM.com // Verify that the statistics haven't been enabled yet 4218986SAli.Saidi@ARM.com // Otherwise objects will have sized their stat buckets and 4228986SAli.Saidi@ARM.com // they will be too small 4238832SAli.Saidi@ARM.com 4248986SAli.Saidi@ARM.com if (Stats::enabled()) 4258832SAli.Saidi@ARM.com fatal("Can't request a masterId after regStats(). \ 4268832SAli.Saidi@ARM.com You must do so in init().\n"); 4278832SAli.Saidi@ARM.com 4288832SAli.Saidi@ARM.com masterIds.push_back(master_name); 4298832SAli.Saidi@ARM.com 4308832SAli.Saidi@ARM.com return masterIds.size() - 1; 4318832SAli.Saidi@ARM.com} 4328832SAli.Saidi@ARM.com 4338832SAli.Saidi@ARM.comstd::string 4348832SAli.Saidi@ARM.comSystem::getMasterName(MasterID master_id) 4358832SAli.Saidi@ARM.com{ 4368832SAli.Saidi@ARM.com if (master_id >= masterIds.size()) 4378832SAli.Saidi@ARM.com fatal("Invalid master_id passed to getMasterName()\n"); 4388832SAli.Saidi@ARM.com 4398832SAli.Saidi@ARM.com return masterIds[master_id]; 4408832SAli.Saidi@ARM.com} 4418832SAli.Saidi@ARM.com 4422902Ssaidi@eecs.umich.educonst char *System::MemoryModeStrings[3] = {"invalid", "atomic", 4432902Ssaidi@eecs.umich.edu "timing"}; 4442902Ssaidi@eecs.umich.edu 4454762Snate@binkert.orgSystem * 4464762Snate@binkert.orgSystemParams::create() 4472424SN/A{ 4485530Snate@binkert.org return new System(this); 4492424SN/A} 450